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| author | Anup Patel <apatel@ventanamicro.com> | 2022-03-24 11:00:20 +0530 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@rivosinc.com> | 2022-03-31 13:28:32 -0700 |
| commit | 2e7451fb57632454aaccc8ca1aac167751df9fca (patch) | |
| tree | e018944045174193bd991a70f1bb4d72a772f320 | |
| parent | 617487600b94b83c9733d8e3cb55a3f09beee194 (diff) | |
| download | linux-2e7451fb57632454aaccc8ca1aac167751df9fca.tar.bz2 | |
RISC-V: Enable profiling by default
Let us enable profiling by default in RV32 and RV64 defconfigs so
that we can use RISC-V PMU drivers on various RISC-V platforms.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
| -rw-r--r-- | arch/riscv/configs/defconfig | 1 | ||||
| -rw-r--r-- | arch/riscv/configs/rv32_defconfig | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig index 9249ef7bcee7..50acf6363173 100644 --- a/arch/riscv/configs/defconfig +++ b/arch/riscv/configs/defconfig @@ -15,6 +15,7 @@ CONFIG_CHECKPOINT_RESTORE=y CONFIG_BLK_DEV_INITRD=y CONFIG_EXPERT=y # CONFIG_SYSFS_SYSCALL is not set +CONFIG_PROFILING=y CONFIG_SOC_MICROCHIP_POLARFIRE=y CONFIG_SOC_SIFIVE=y CONFIG_SOC_VIRT=y diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig index 17037d5f3ba3..36aa6ff5a001 100644 --- a/arch/riscv/configs/rv32_defconfig +++ b/arch/riscv/configs/rv32_defconfig @@ -15,6 +15,7 @@ CONFIG_CHECKPOINT_RESTORE=y CONFIG_BLK_DEV_INITRD=y CONFIG_EXPERT=y # CONFIG_SYSFS_SYSCALL is not set +CONFIG_PROFILING=y CONFIG_SOC_SIFIVE=y CONFIG_SOC_VIRT=y CONFIG_ARCH_RV32I=y |