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authorPaul Burton <paul.burton@imgtec.com>2015-05-24 16:11:14 +0100
committerRalf Baechle <ralf@linux-mips.org>2015-06-21 21:52:48 +0200
commit252617a4ab714db824876e3f9b2b2ede6623e9dc (patch)
treec9ab04d5144410d31fdc4695bc5a9cb36cc62991
parentde361e8bb9f666235d44ae9770238718be4f0483 (diff)
downloadlinux-252617a4ab714db824876e3f9b2b2ede6623e9dc.tar.bz2
MIPS: ingenic: Add newer vendor IDs
Ingenic have actually varied the vendor/company ID of the XBurst cores across their range of SoCs, whilst keeping the product ID & revision constant... Add definitions for vendor IDs known to be used in some of Ingenic's newer SoCs, and handle them in the same way as the existing Ingenic vendor ID from the JZ4740. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Co-authored-by: Paul Cercueil <paul@crapouillou.net> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: Joshua Kinard <kumba@gentoo.org> Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Cc: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-kernel@vger.kernel.org Cc: Huacai Chen <chenhc@lemote.com> Cc: Markos Chandras <markos.chandras@imgtec.com> Patchwork: https://patchwork.linux-mips.org/patch/10128/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/include/asm/cpu.h6
-rw-r--r--arch/mips/kernel/cpu-probe.c4
2 files changed, 7 insertions, 3 deletions
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index e3adca1d0b99..73dd35787d1a 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -42,7 +42,9 @@
#define PRID_COMP_LEXRA 0x0b0000
#define PRID_COMP_NETLOGIC 0x0c0000
#define PRID_COMP_CAVIUM 0x0d0000
-#define PRID_COMP_INGENIC 0xd00000
+#define PRID_COMP_INGENIC_D0 0xd00000 /* JZ4740, JZ4750 */
+#define PRID_COMP_INGENIC_D1 0xd10000 /* JZ4770, JZ4775 */
+#define PRID_COMP_INGENIC_E1 0xe10000 /* JZ4780 */
/*
* Assigned Processor ID (implementation) values for bits 15:8 of the PRId
@@ -168,7 +170,7 @@
#define PRID_IMP_CAVIUM_CN70XX 0x9600
/*
- * These are the PRID's for when 23:16 == PRID_COMP_INGENIC
+ * These are the PRID's for when 23:16 == PRID_COMP_INGENIC_*
*/
#define PRID_IMP_JZRISC 0x0200
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 209e5b76c1bc..f89eaa79785a 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -1443,7 +1443,9 @@ void cpu_probe(void)
case PRID_COMP_CAVIUM:
cpu_probe_cavium(c, cpu);
break;
- case PRID_COMP_INGENIC:
+ case PRID_COMP_INGENIC_D0:
+ case PRID_COMP_INGENIC_D1:
+ case PRID_COMP_INGENIC_E1:
cpu_probe_ingenic(c, cpu);
break;
case PRID_COMP_NETLOGIC: