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authorPali Rohár <pali@kernel.org>2022-05-04 20:08:22 +0200
committerMichael Ellerman <mpe@ellerman.id.au>2022-07-28 16:22:14 +1000
commit1f00b5ab992c122c51bc37662b3b4df5963462f3 (patch)
tree779f9808a25e2ef410b0ddc1089f59a557835ba0
parent0fe1e96fef0a5c53b4c0d1500d356f3906000f81 (diff)
downloadlinux-1f00b5ab992c122c51bc37662b3b4df5963462f3.tar.bz2
powerpc/85xx: P2020: Add law_trgt_if property to PCIe DT nodes
DT law_trgt_if property defines Local Access Window Target Interface. Local Access Window Target Interface is used for identifying individual peripheral and mapping its memory to CPU. Interface id is defined by hardware itself. U-Boot uses law_trgt_if DT property in PCIe nodes for configuring memory mapping of individual PCIe controllers. Linux kernel fsl_pci.c driver currently does not touch Local Access Window and expects that U-Boot configures it properly. Add law_trgt_if property to PCIe DT nodes for P2020. This allows usage of kernel P2020 PCIe DT nodes in U-Boot. And therefore allows to share P2020 DTS files between Linux kernel and U-Boot. Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20220504180822.29782-1-pali@kernel.org
-rw-r--r--arch/powerpc/boot/dts/fsl/p2020si-post.dtsi3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi
index 7a590c92fe56..81b9ab2119be 100644
--- a/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi
@@ -48,6 +48,7 @@
bus-range = <0 255>;
clock-frequency = <33333333>;
interrupts = <26 2 0 0>;
+ law_trgt_if = <2>;
pcie@0 {
reg = <0 0 0 0 0>;
@@ -76,6 +77,7 @@
bus-range = <0 255>;
clock-frequency = <33333333>;
interrupts = <25 2 0 0>;
+ law_trgt_if = <1>;
pcie@0 {
reg = <0 0 0 0 0>;
@@ -105,6 +107,7 @@
bus-range = <0 255>;
clock-frequency = <33333333>;
interrupts = <24 2 0 0>;
+ law_trgt_if = <0>;
pcie@0 {
reg = <0 0 0 0 0>;