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authorLowry Li (Arm Technology China) <Lowry.Li@arm.com>2019-04-22 04:16:30 +0100
committerLiviu Dudau <Liviu.Dudau@arm.com>2019-06-19 11:42:17 +0100
commit19358630f3a570e7ced509a65c28693840d2ae65 (patch)
tree9cc2860bc01bdbb49804b02915d0a68cf9ca4adc
parent429bfabe00549c3a5db4d7d6aacd7852a1f53f12 (diff)
downloadlinux-19358630f3a570e7ced509a65c28693840d2ae65.tar.bz2
drm/komeda: Adds limitation check for AFBC wide block not support Rot90
Komeda series hardware doesn't support Rot90 for AFBC wide block. So add limitation check to reject it if such configuration has been posted. Signed-off-by: Lowry Li (Arm Technology China) <lowry.li@arm.com> Reviewed-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
-rw-r--r--drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c15
-rw-r--r--drivers/gpu/drm/arm/display/komeda/komeda_format_caps.c7
-rw-r--r--drivers/gpu/drm/arm/display/komeda/komeda_format_caps.h8
-rw-r--r--drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c18
-rw-r--r--drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.h5
-rw-r--r--drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c8
-rw-r--r--drivers/gpu/drm/arm/display/komeda/komeda_plane.c2
7 files changed, 48 insertions, 15 deletions
diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
index 68f27c5cffcd..ac804a522e57 100644
--- a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
+++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
@@ -494,11 +494,26 @@ static struct komeda_format_caps d71_format_caps_table[] = {
{__HW_ID(6, 7), 0/*DRM_FORMAT_YUV420_10BIT*/, 1, RICH, Rot_ALL_H_V, LYT_NM, AFB_TH},
};
+static bool d71_format_mod_supported(const struct komeda_format_caps *caps,
+ u32 layer_type, u64 modifier, u32 rot)
+{
+ uint64_t layout = modifier & AFBC_FORMAT_MOD_BLOCK_SIZE_MASK;
+
+ if ((layout == AFBC_FORMAT_MOD_BLOCK_SIZE_32x8) &&
+ drm_rotation_90_or_270(rot)) {
+ DRM_DEBUG_ATOMIC("D71 doesn't support ROT90 for WB-AFBC.\n");
+ return false;
+ }
+
+ return true;
+}
+
static void d71_init_fmt_tbl(struct komeda_dev *mdev)
{
struct komeda_format_caps_table *table = &mdev->fmt_tbl;
table->format_caps = d71_format_caps_table;
+ table->format_mod_supported = d71_format_mod_supported;
table->n_formats = ARRAY_SIZE(d71_format_caps_table);
}
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.c b/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.c
index b2195142e3f3..cd4d9f53ddef 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.c
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.c
@@ -74,7 +74,8 @@ u64 komeda_supported_modifiers[] = {
};
bool komeda_format_mod_supported(struct komeda_format_caps_table *table,
- u32 layer_type, u32 fourcc, u64 modifier)
+ u32 layer_type, u32 fourcc, u64 modifier,
+ u32 rot)
{
const struct komeda_format_caps *caps;
@@ -85,6 +86,10 @@ bool komeda_format_mod_supported(struct komeda_format_caps_table *table,
if (!(caps->supported_layer_types & layer_type))
return false;
+ if (table->format_mod_supported)
+ return table->format_mod_supported(caps, layer_type, modifier,
+ rot);
+
return true;
}
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.h b/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.h
index 96de22ecfa08..381e87345e9c 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.h
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.h
@@ -71,10 +71,15 @@ struct komeda_format_caps {
*
* @n_formats: the size of format_caps list.
* @format_caps: format_caps list.
+ * @format_mod_supported: Optional. Some HW may have special requirements or
+ * limitations which can not be described by format_caps, this func supply HW
+ * the ability to do the further HW specific check.
*/
struct komeda_format_caps_table {
u32 n_formats;
const struct komeda_format_caps *format_caps;
+ bool (*format_mod_supported)(const struct komeda_format_caps *caps,
+ u32 layer_type, u64 modifier, u32 rot);
};
extern u64 komeda_supported_modifiers[];
@@ -100,6 +105,7 @@ u32 *komeda_get_layer_fourcc_list(struct komeda_format_caps_table *table,
void komeda_put_fourcc_list(u32 *fourcc_list);
bool komeda_format_mod_supported(struct komeda_format_caps_table *table,
- u32 layer_type, u32 fourcc, u64 modifier);
+ u32 layer_type, u32 fourcc, u64 modifier,
+ u32 rot);
#endif
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c b/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c
index d0e713aedb8e..5f63dec2822b 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c
@@ -240,20 +240,20 @@ komeda_fb_get_pixel_addr(struct komeda_fb *kfb, int x, int y, int plane)
}
/* if the fb can be supported by a specific layer */
-bool komeda_fb_is_layer_supported(struct komeda_fb *kfb, u32 layer_type)
+bool komeda_fb_is_layer_supported(struct komeda_fb *kfb, u32 layer_type,
+ u32 rot)
{
struct drm_framebuffer *fb = &kfb->base;
struct komeda_dev *mdev = fb->dev->dev_private;
- const struct komeda_format_caps *caps;
u32 fourcc = fb->format->format;
u64 modifier = fb->modifier;
+ bool supported;
- caps = komeda_get_format_caps(&mdev->fmt_tbl, fourcc, modifier);
- if (!caps)
- return false;
+ supported = komeda_format_mod_supported(&mdev->fmt_tbl, layer_type,
+ fourcc, modifier, rot);
+ if (!supported)
+ DRM_DEBUG_ATOMIC("Layer TYPE: %d doesn't support fb FMT: %s.\n",
+ layer_type, komeda_get_format_name(fourcc, modifier));
- if (!(caps->supported_layer_types & layer_type))
- return false;
-
- return true;
+ return supported;
}
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.h b/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.h
index e3bab0defd72..6cbb2f698862 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.h
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.h
@@ -35,9 +35,10 @@ struct komeda_fb {
struct drm_framebuffer *
komeda_fb_create(struct drm_device *dev, struct drm_file *file,
- const struct drm_mode_fb_cmd2 *mode_cmd);
+ const struct drm_mode_fb_cmd2 *mode_cmd);
dma_addr_t
komeda_fb_get_pixel_addr(struct komeda_fb *kfb, int x, int y, int plane);
-bool komeda_fb_is_layer_supported(struct komeda_fb *kfb, u32 layer_type);
+bool komeda_fb_is_layer_supported(struct komeda_fb *kfb, u32 layer_type,
+ u32 rot);
#endif
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c
index 34737c0b8156..042d4d749d18 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c
@@ -274,6 +274,11 @@ komeda_layer_check_cfg(struct komeda_layer *layer,
struct komeda_plane_state *kplane_st,
struct komeda_data_flow_cfg *dflow)
{
+ struct komeda_fb *kfb = to_kfb(kplane_st->base.fb);
+
+ if (!komeda_fb_is_layer_supported(kfb, layer->layer_type, dflow->rot))
+ return -EINVAL;
+
if (!in_range(&layer->hsize_in, dflow->in_w)) {
DRM_DEBUG_ATOMIC("src_w: %d is out of range.\n", dflow->in_w);
return -EINVAL;
@@ -359,7 +364,8 @@ komeda_wb_layer_validate(struct komeda_layer *wb_layer,
struct komeda_layer_state *st;
int i;
- if (!komeda_fb_is_layer_supported(kfb, wb_layer->layer_type))
+ if (!komeda_fb_is_layer_supported(kfb, wb_layer->layer_type,
+ dflow->rot))
return -EINVAL;
c_st = komeda_component_get_state_and_set_user(&wb_layer->base,
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_plane.c b/drivers/gpu/drm/arm/display/komeda/komeda_plane.c
index e55b7be9bbb0..9009f87b7323 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_plane.c
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_plane.c
@@ -214,7 +214,7 @@ komeda_plane_format_mod_supported(struct drm_plane *plane,
u32 layer_type = kplane->layer->layer_type;
return komeda_format_mod_supported(&mdev->fmt_tbl, layer_type,
- format, modifier);
+ format, modifier, 0);
}
static const struct drm_plane_funcs komeda_plane_funcs = {