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author | Arnd Bergmann <arnd@arndb.de> | 2012-05-16 15:43:21 +0200 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2012-05-16 15:43:21 +0200 |
commit | 0e896b1ddc1905df904df98c204bacf028219729 (patch) | |
tree | dc1965765c0a55e1260c4c3956db4ae2b23cc235 | |
parent | 48b9bf0953867d4fb21f44d8c1a061b5358fe53b (diff) | |
parent | 0573a2bb885848af67127b77dbebb900d0ae19b9 (diff) | |
download | linux-0e896b1ddc1905df904df98c204bacf028219729.tar.bz2 |
Merge branch 'clps711x/cleanup' into next/cleanup
* clps711x/cleanup:
ARM: clps711x: Cleanup IRQ handling
ARM clps711x: Removed unused header mach/time.h
ARM: clps711x: Added note about support EP731x CPU to Kconfig
ARM: clps711x: Added missing register definitions
ARM: clps711x: Used own subarch directory for store header file
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-rw-r--r-- | arch/arm/Kconfig | 4 | ||||
-rw-r--r-- | arch/arm/mach-clps711x/common.c | 12 | ||||
-rw-r--r-- | arch/arm/mach-clps711x/include/mach/clps711x.h (renamed from arch/arm/include/asm/hardware/clps7111.h) | 60 | ||||
-rw-r--r-- | arch/arm/mach-clps711x/include/mach/hardware.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-clps711x/include/mach/irqs.h | 5 | ||||
-rw-r--r-- | arch/arm/mach-clps711x/include/mach/time.h | 49 | ||||
-rw-r--r-- | arch/arm/mach-clps711x/include/mach/uncompress.h | 2 |
7 files changed, 57 insertions, 77 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index cece19202c6b..b5a696fc0a58 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -373,12 +373,12 @@ config ARCH_HIGHBANK Support for the Calxeda Highbank SoC based boards. config ARCH_CLPS711X - bool "Cirrus Logic CLPS711x/EP721x-based" + bool "Cirrus Logic CLPS711x/EP721x/EP731x-based" select CPU_ARM720T select ARCH_USES_GETTIMEOFFSET select NEED_MACH_MEMORY_H help - Support for Cirrus Logic 711x/721x based boards. + Support for Cirrus Logic 711x/721x/731x based boards. config ARCH_CNS3XXX bool "Cavium Networks CNS3XXX family" diff --git a/arch/arm/mach-clps711x/common.c b/arch/arm/mach-clps711x/common.c index b6dfd2f22cd4..c965fd8eb31a 100644 --- a/arch/arm/mach-clps711x/common.c +++ b/arch/arm/mach-clps711x/common.c @@ -66,12 +66,6 @@ static void int1_mask(struct irq_data *d) static void int1_ack(struct irq_data *d) { - u32 intmr1; - - intmr1 = clps_readl(INTMR1); - intmr1 &= ~(1 << d->irq); - clps_writel(intmr1, INTMR1); - switch (d->irq) { case IRQ_CSINT: clps_writel(0, COEOI); break; case IRQ_TC1OI: clps_writel(0, TC1EOI); break; @@ -108,12 +102,6 @@ static void int2_mask(struct irq_data *d) static void int2_ack(struct irq_data *d) { - u32 intmr2; - - intmr2 = clps_readl(INTMR2); - intmr2 &= ~(1 << (d->irq - 16)); - clps_writel(intmr2, INTMR2); - switch (d->irq) { case IRQ_KBDINT: clps_writel(0, KBDEOI); break; } diff --git a/arch/arm/include/asm/hardware/clps7111.h b/arch/arm/mach-clps711x/include/mach/clps711x.h index 0998606920b1..1dd806f2847e 100644 --- a/arch/arm/include/asm/hardware/clps7111.h +++ b/arch/arm/mach-clps711x/include/mach/clps711x.h @@ -1,8 +1,6 @@ /* - * arch/arm/include/asm/hardware/clps7111.h - * - * This file contains the hardware definitions of the CLPS7111 internal - * registers. + * This file contains the hardware definitions of the Cirrus Logic + * ARM7 CLPS711X internal registers. * * Copyright (C) 2000 Deep Blue Solutions Ltd. * @@ -20,8 +18,8 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#ifndef __ASM_HARDWARE_CLPS7111_H -#define __ASM_HARDWARE_CLPS7111_H +#ifndef __MACH_CLPS711X_H +#define __MACH_CLPS711X_H #define CLPS711X_PHYS_BASE (0x80000000) @@ -43,7 +41,7 @@ #define INTSR1 (0x0240) #define INTMR1 (0x0280) #define LCDCON (0x02c0) -#define TC1D (0x0300) +#define TC1D (0x0300) #define TC2D (0x0340) #define RTCDR (0x0380) #define RTCMR (0x03c0) @@ -89,6 +87,14 @@ #define LEDFLSH (0x22c0) #define SDCONF (0x2300) #define SDRFPR (0x2340) +#define UNIQID (0x2440) +#define DAI64FS (0x2600) +#define PLLW (0x2610) +#define PLLR (0xa5a8) +#define RANDID0 (0x2700) +#define RANDID1 (0x2704) +#define RANDID2 (0x2708) +#define RANDID3 (0x270c) /* common bits: SYSCON1 / SYSCON2 */ #define SYSCON_UARTEN (1 << 8) @@ -136,6 +142,8 @@ #define SYSFLG1_CTXFF (1 << 25) #define SYSFLG1_SSIBUSY (1 << 26) #define SYSFLG1_ID (1 << 29) +#define SYSFLG1_VERID(x) (((x) >> 30) & 3) +#define SYSFLG1_VERID_MASK (3 << 30) #define SYSFLG2_SSRXOF (1 << 0) #define SYSFLG2_RESVAL (1 << 1) @@ -183,9 +191,12 @@ #define UBRLCR_WRDLEN8 (3 << 17) #define UBRLCR_WRDLEN_MASK (3 << 17) +#define SYNCIO_FRMLEN(x) (((x) & 0x3f) << 7) +#define SYNCIO_CFGLEN(x) ((x) & 0x7f) #define SYNCIO_SMCKEN (1 << 13) #define SYNCIO_TXFRMEN (1 << 14) +#define DAIR_RESERVED (0x0404) #define DAIR_DAIEN (1 << 16) #define DAIR_ECS (1 << 17) #define DAIR_LCTM (1 << 19) @@ -212,11 +223,23 @@ #define DAISR_LCNE (1 << 11) #define DAISR_FIFO (1 << 12) +#define DAI64FS_I2SF64 (1 << 0) +#define DAI64FS_AUDIOCLKEN (1 << 1) +#define DAI64FS_AUDIOCLKSRC (1 << 2) +#define DAI64FS_MCLK256EN (1 << 3) +#define DAI64FS_LOOPBACK (1 << 5) + #define SYSCON3_ADCCON (1 << 0) +#define SYSCON3_CLKCTL0 (1 << 1) +#define SYSCON3_CLKCTL1 (1 << 2) #define SYSCON3_DAISEL (1 << 3) #define SYSCON3_ADCCKNSEN (1 << 4) +#define SYSCON3_VERSN(x) (((x) >> 5) & 7) +#define SYSCON3_VERSN_MASK (7 << 5) #define SYSCON3_FASTWAKE (1 << 8) #define SYSCON3_DAIEN (1 << 9) +#define SYSCON3_128FS SYSCON3_DAIEN +#define SYSCON3_ENPD67 (1 << 10) #define SDCONF_ACTIVE (1 << 10) #define SDCONF_CLKCTL (1 << 9) @@ -231,4 +254,25 @@ #define SDCONF_CASLAT_2 (2) #define SDCONF_CASLAT_3 (3) -#endif /* __ASM_HARDWARE_CLPS7111_H */ +#define MEMCFG_BUS_WIDTH_32 (1) +#define MEMCFG_BUS_WIDTH_16 (0) +#define MEMCFG_BUS_WIDTH_8 (3) + +#define MEMCFG_WAITSTATE_8_3 (0 << 2) +#define MEMCFG_WAITSTATE_7_3 (1 << 2) +#define MEMCFG_WAITSTATE_6_3 (2 << 2) +#define MEMCFG_WAITSTATE_5_3 (3 << 2) +#define MEMCFG_WAITSTATE_4_2 (4 << 2) +#define MEMCFG_WAITSTATE_3_2 (5 << 2) +#define MEMCFG_WAITSTATE_2_2 (6 << 2) +#define MEMCFG_WAITSTATE_1_2 (7 << 2) +#define MEMCFG_WAITSTATE_8_1 (8 << 2) +#define MEMCFG_WAITSTATE_7_1 (9 << 2) +#define MEMCFG_WAITSTATE_6_1 (10 << 2) +#define MEMCFG_WAITSTATE_5_1 (11 << 2) +#define MEMCFG_WAITSTATE_4_0 (12 << 2) +#define MEMCFG_WAITSTATE_3_0 (13 << 2) +#define MEMCFG_WAITSTATE_2_0 (14 << 2) +#define MEMCFG_WAITSTATE_1_0 (15 << 2) + +#endif /* __MACH_CLPS711X_H */ diff --git a/arch/arm/mach-clps711x/include/mach/hardware.h b/arch/arm/mach-clps711x/include/mach/hardware.h index d31fc791f516..13a64fcd7dd1 100644 --- a/arch/arm/mach-clps711x/include/mach/hardware.h +++ b/arch/arm/mach-clps711x/include/mach/hardware.h @@ -22,7 +22,7 @@ #ifndef __MACH_HARDWARE_H #define __MACH_HARDWARE_H -#include <asm/hardware/clps7111.h> +#include <mach/clps711x.h> #define CLPS711X_VIRT_BASE IOMEM(0xff000000) diff --git a/arch/arm/mach-clps711x/include/mach/irqs.h b/arch/arm/mach-clps711x/include/mach/irqs.h index 30b7e97285a4..14d215f8ca81 100644 --- a/arch/arm/mach-clps711x/include/mach/irqs.h +++ b/arch/arm/mach-clps711x/include/mach/irqs.h @@ -35,7 +35,6 @@ #define IRQ_SSEOTI 15 #define INT1_IRQS (0x0000fff0) -#define INT1_ACK_IRQS (0x00004f10) /* * Interrupts from INTSR2 @@ -47,7 +46,5 @@ #define IRQ_URXINT2 (16+13) /* bit 13 */ #define INT2_IRQS (0x30070000) -#define INT2_ACK_IRQS (0x00010000) - -#define NR_IRQS 30 +#define NR_IRQS 30 diff --git a/arch/arm/mach-clps711x/include/mach/time.h b/arch/arm/mach-clps711x/include/mach/time.h deleted file mode 100644 index 5f65865884ce..000000000000 --- a/arch/arm/mach-clps711x/include/mach/time.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * arch/arm/mach-clps711x/include/mach/time.h - * - * Copyright (C) 2000 Deep Blue Solutions Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#include <asm/leds.h> -#include <mach/hardware.h> - -extern void clps711x_setup_timer(void); - -/* - * IRQ handler for the timer - */ -static irqreturn_t -p720t_timer_interrupt(int irq, void *dev_id) -{ - struct pt_regs *regs = get_irq_regs(); - do_leds(); - xtime_update(1); -#ifndef CONFIG_SMP - update_process_times(user_mode(regs)); -#endif - do_profile(regs); - return IRQ_HANDLED; -} - -/* - * Set up timer interrupt, and return the current time in seconds. - */ -void __init time_init(void) -{ - clps711x_setup_timer(); - timer_irq.handler = p720t_timer_interrupt; - setup_irq(IRQ_TC2OI, &timer_irq); -} diff --git a/arch/arm/mach-clps711x/include/mach/uncompress.h b/arch/arm/mach-clps711x/include/mach/uncompress.h index 263f8393ccb7..7b28d6a47690 100644 --- a/arch/arm/mach-clps711x/include/mach/uncompress.h +++ b/arch/arm/mach-clps711x/include/mach/uncompress.h @@ -17,7 +17,7 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include <asm/hardware/clps7111.h> +#include <mach/clps711x.h> #ifdef CONFIG_DEBUG_CLPS711X_UART2 #define SYSFLGx SYSFLG2 |