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| author | Simon Horman <horms+renesas@verge.net.au> | 2013-12-15 16:24:53 +0900 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2014-02-24 08:54:42 +0900 |
| commit | 0e7ed0c1613aea101205b4e0413f75ef8141bf3d (patch) | |
| tree | 2156c312865beb8218016a0257bb6f84cb2221fd | |
| parent | d2eec3d5251216942e1d425300686f1a18bc615d (diff) | |
| download | linux-0e7ed0c1613aea101205b4e0413f75ef8141bf3d.tar.bz2 | |
ARM: shmobile: r7s72100: Add clock for r7s72100-ether
Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| -rw-r--r-- | arch/arm/mach-shmobile/clock-r7s72100.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/mach-shmobile/clock-r7s72100.c b/arch/arm/mach-shmobile/clock-r7s72100.c index 71c99feeff01..f17a5db00221 100644 --- a/arch/arm/mach-shmobile/clock-r7s72100.c +++ b/arch/arm/mach-shmobile/clock-r7s72100.c @@ -28,6 +28,7 @@ /* Standby Control Registers */ #define STBCR3 0xfcfe0420 #define STBCR4 0xfcfe0424 +#define STBCR7 0xfcfe0430 #define STBCR9 0xfcfe0438 #define STBCR10 0xfcfe043c @@ -150,6 +151,7 @@ struct clk div4_clks[DIV4_NR] = { enum { MSTP107, MSTP106, MSTP105, MSTP104, MSTP103, MSTP97, MSTP96, MSTP95, MSTP94, + MSTP74, MSTP47, MSTP46, MSTP45, MSTP44, MSTP43, MSTP42, MSTP41, MSTP40, MSTP33, MSTP_NR }; @@ -164,6 +166,7 @@ static struct clk mstp_clks[MSTP_NR] = { [MSTP96] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 6, 0), /* RIIC1 */ [MSTP95] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 5, 0), /* RIIC2 */ [MSTP94] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 4, 0), /* RIIC3 */ + [MSTP74] = SH_CLK_MSTP8(&peripheral1_clk, STBCR7, 4, 0), /* Ether */ [MSTP47] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 7, 0), /* SCIF0 */ [MSTP46] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 6, 0), /* SCIF1 */ [MSTP45] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 5, 0), /* SCIF2 */ @@ -200,6 +203,7 @@ static struct clk_lookup lookups[] = { CLKDEV_DEV_ID("fcfee400.i2c", &mstp_clks[MSTP96]), CLKDEV_DEV_ID("fcfee800.i2c", &mstp_clks[MSTP95]), CLKDEV_DEV_ID("fcfeec00.i2c", &mstp_clks[MSTP94]), + CLKDEV_DEV_ID("r7s72100-ether", &mstp_clks[MSTP74]), CLKDEV_CON_ID("mtu2_fck", &mstp_clks[MSTP33]), /* ICK */ |