diff options
| author | zhangqing <zhangqing@rock-chips.com> | 2016-01-25 08:56:01 -0800 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2016-01-25 11:04:51 +0100 |
| commit | 0bbe62eb92755ff7c16c859e96a3877de56e32c9 (patch) | |
| tree | 717c52dc1c27b2f8541c3749b44e9a288932d272 | |
| parent | d566ebc3c06c17b108b5b844f9d08259e3b7ba84 (diff) | |
| download | linux-0bbe62eb92755ff7c16c859e96a3877de56e32c9.tar.bz2 | |
clk: rockchip: rk3368: enable the CLK_SET_RATE_PARENT flag for spdif_8ch
SPDIF_8CH set freq need to select parent and calculate parent freq.
so just mark it as the CLK_SET_RATE_PARENT flag.
Signed-off-by: zhangqing <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| -rw-r--r-- | drivers/clk/rockchip/clk-rk3368.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/rockchip/clk-rk3368.c b/drivers/clk/rockchip/clk-rk3368.c index dab759b2d18c..caf0b944d813 100644 --- a/drivers/clk/rockchip/clk-rk3368.c +++ b/drivers/clk/rockchip/clk-rk3368.c @@ -353,7 +353,7 @@ static struct rockchip_clk_branch rk3368_clk_branches[] __initdata = { COMPOSITE_FRAC(0, "spdif_8ch_frac", "spdif_8ch_src", CLK_SET_RATE_PARENT, RK3368_CLKSEL_CON(32), 0, RK3368_CLKGATE_CON(6), 5, GFLAGS), - COMPOSITE_NODIV(SCLK_SPDIF_8CH, "sclk_spdif_8ch", mux_spdif_8ch_p, 0, + COMPOSITE_NODIV(SCLK_SPDIF_8CH, "sclk_spdif_8ch", mux_spdif_8ch_p, CLK_SET_RATE_PARENT, RK3368_CLKSEL_CON(31), 8, 2, MFLAGS, RK3368_CLKGATE_CON(6), 6, GFLAGS), COMPOSITE(0, "i2s_2ch_src", mux_pll_src_cpll_gpll_p, 0, |