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| author | Matt Atwood <matthew.s.atwood@intel.com> | 2020-02-24 14:36:51 -0800 |
|---|---|---|
| committer | Matt Roper <matthew.d.roper@intel.com> | 2020-02-26 15:07:42 -0800 |
| commit | 0b3a4dd4af97535551f1fe02501c485cc3c5329a (patch) | |
| tree | 4b6005f6272f3ff43d9b135913aec22ec6263366 | |
| parent | 3a1b82a19ff91cfef9b5d9d9faabb0ebcac15df0 (diff) | |
| download | linux-0b3a4dd4af97535551f1fe02501c485cc3c5329a.tar.bz2 | |
drm/i915/tgl: Add Wa_1606054188:tgl
On Tiger Lake we do not support source keying in the pixel formats P010,
P012, P016.
v2: Move WA to end of function. Create helper function for format
check. Less verbose debugging messaging.
v3: whitespace
v4(MattR):
- Actually return EINVAL to reject this combination.
- Pass format parameter as u32.
- Make test TGL-specific for now.
- Switch to per-device logging.
- Shorten/simplify comment.
Bspec: 52890
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200224223651.3801646-1-matthew.d.roper@intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_sprite.c | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c index 7abeefe8dce5..dc7d3f3f4eb3 100644 --- a/drivers/gpu/drm/i915/display/intel_sprite.c +++ b/drivers/gpu/drm/i915/display/intel_sprite.c @@ -2077,6 +2077,18 @@ vlv_sprite_check(struct intel_crtc_state *crtc_state, return 0; } +static bool intel_format_is_p01x(u32 format) +{ + switch (format) { + case DRM_FORMAT_P010: + case DRM_FORMAT_P012: + case DRM_FORMAT_P016: + return true; + default: + return false; + } +} + static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state, const struct intel_plane_state *plane_state) { @@ -2155,6 +2167,15 @@ static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state, return -EINVAL; } + /* Wa_1606054188:tgl */ + if (IS_TIGERLAKE(dev_priv) && + plane_state->ckey.flags & I915_SET_COLORKEY_SOURCE && + intel_format_is_p01x(fb->format->format)) { + drm_dbg_kms(&dev_priv->drm, + "Source color keying not supported with P01x formats\n"); + return -EINVAL; + } + return 0; } |