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authorJonas Gorski <jogo@openwrt.org>2013-12-18 14:12:06 +0100
committerRalf Baechle <ralf@linux-mips.org>2014-01-22 20:18:52 +0100
commit04fa8bf7c0900889c5a4b6f95f07b924265cc8f0 (patch)
tree099a40ddd8fa7cf0907ce6fc68997ccb709ce260
parentfe7f62c0c2122e0df3edb73bbfedc5cf399a3beb (diff)
downloadlinux-04fa8bf7c0900889c5a4b6f95f07b924265cc8f0.tar.bz2
MIPS: BMIPS: add a smp ops registration helper
Add a helper similar to the generic register_XXX_smp_ops() for bmips. Register SMP UP ops in case of BMIPS32/3300. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6248/
-rw-r--r--arch/mips/Kconfig1
-rw-r--r--arch/mips/bcm63xx/prom.c2
-rw-r--r--arch/mips/include/asm/bmips.h26
3 files changed, 28 insertions, 1 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 7eaa4129dbcc..f2f6c1de2389 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1479,6 +1479,7 @@ config CPU_LOONGSON1
select CPU_SUPPORTS_HIGHMEM
config CPU_BMIPS32_3300
+ select SMP_UP if SMP
bool
config CPU_BMIPS4350
diff --git a/arch/mips/bcm63xx/prom.c b/arch/mips/bcm63xx/prom.c
index 9872ca34d0c4..f93f4fc00ca5 100644
--- a/arch/mips/bcm63xx/prom.c
+++ b/arch/mips/bcm63xx/prom.c
@@ -61,7 +61,7 @@ void __init prom_init(void)
if (IS_ENABLED(CONFIG_CPU_BMIPS4350) && IS_ENABLED(CONFIG_SMP)) {
/* set up SMP */
- register_smp_ops(&bmips43xx_smp_ops);
+ register_bmips_smp_ops();
/*
* BCM6328 might not have its second CPU enabled, while BCM3368
diff --git a/arch/mips/include/asm/bmips.h b/arch/mips/include/asm/bmips.h
index 880f6aadeaea..cbaccebf5065 100644
--- a/arch/mips/include/asm/bmips.h
+++ b/arch/mips/include/asm/bmips.h
@@ -46,9 +46,35 @@
#include <linux/cpumask.h>
#include <asm/r4kcache.h>
+#include <asm/smp-ops.h>
extern struct plat_smp_ops bmips43xx_smp_ops;
extern struct plat_smp_ops bmips5000_smp_ops;
+
+static inline int register_bmips_smp_ops(void)
+{
+#if IS_ENABLED(CONFIG_CPU_BMIPS) && IS_ENABLED(CONFIG_SMP)
+ switch (current_cpu_type()) {
+ case CPU_BMIPS32:
+ case CPU_BMIPS3300:
+ return register_up_smp_ops();
+ case CPU_BMIPS4350:
+ case CPU_BMIPS4380:
+ register_smp_ops(&bmips43xx_smp_ops);
+ break;
+ case CPU_BMIPS5000:
+ register_smp_ops(&bmips5000_smp_ops);
+ break;
+ default:
+ return -ENODEV;
+ }
+
+ return 0;
+#else
+ return -ENODEV;
+#endif
+}
+
extern char bmips_reset_nmi_vec;
extern char bmips_reset_nmi_vec_end;
extern char bmips_smp_movevec;