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authorEmil Renner Berthing <kernel@esmil.dk>2018-10-31 11:57:11 +0100
committerMark Brown <broonie@kernel.org>2018-11-05 11:42:43 +0000
commit04290192f7ebe892828f69ac57c4684e25da378d (patch)
tree1d3a08a671d588314d7c88c4f4cc0a13d507c196
parent65498c6ae2414a1425aa6c4231e79e2998afec05 (diff)
downloadlinux-04290192f7ebe892828f69ac57c4684e25da378d.tar.bz2
spi: rockchip: support lsb-first mode
Add missing support for lsb-first mode. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r--drivers/spi/spi-rockchip.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c
index 9e47e81553a1..3912526ead66 100644
--- a/drivers/spi/spi-rockchip.c
+++ b/drivers/spi/spi-rockchip.c
@@ -476,6 +476,8 @@ static void rockchip_spi_config(struct rockchip_spi *rs,
cr0 |= rs->rsd << CR0_RSD_OFFSET;
cr0 |= (spi->mode & 0x3U) << CR0_SCPH_OFFSET;
+ if (spi->mode & SPI_LSB_FIRST)
+ cr0 |= CR0_FBM_LSB << CR0_FBM_OFFSET;
if (xfer->rx_buf && xfer->tx_buf)
cr0 |= CR0_XFM_TR << CR0_XFM_OFFSET;
@@ -681,7 +683,7 @@ static int rockchip_spi_probe(struct platform_device *pdev)
master->auto_runtime_pm = true;
master->bus_num = pdev->id;
- master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LOOP;
+ master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LOOP | SPI_LSB_FIRST;
master->num_chipselect = ROCKCHIP_SPI_MAX_CS_NUM;
master->dev.of_node = pdev->dev.of_node;
master->bits_per_word_mask = SPI_BPW_MASK(16) | SPI_BPW_MASK(8) | SPI_BPW_MASK(4);