diff options
| author | Aapo Vienamo <avienamo@nvidia.com> | 2018-08-10 21:08:08 +0300 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2018-08-27 12:25:17 +0200 |
| commit | 00ead3c913afe8872a428e56e2a815adb2b230d1 (patch) | |
| tree | d5156cc9193871b9c37d2d6a0fe6ecd80f3e60f0 | |
| parent | 13136a47a061c01c91df78b37f7708dd5ce7035f (diff) | |
| download | linux-00ead3c913afe8872a428e56e2a815adb2b230d1.tar.bz2 | |
soc/tegra: pmc: Factor out DPD register bit calculation
Factor out the the code to calculate the correct DPD register and bit
number for a given pad. This logic will be needed to query the status
register.
Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
| -rw-r--r-- | drivers/soc/tegra/pmc.c | 20 |
1 files changed, 17 insertions, 3 deletions
diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c index 75fd907fce23..c04ff5eb7cad 100644 --- a/drivers/soc/tegra/pmc.c +++ b/drivers/soc/tegra/pmc.c @@ -922,11 +922,12 @@ tegra_io_pad_find(struct tegra_pmc *pmc, enum tegra_io_pad id) return NULL; } -static int tegra_io_pad_prepare(enum tegra_io_pad id, unsigned long *request, - unsigned long *status, u32 *mask) +static int tegra_io_pad_get_dpd_register_bit(enum tegra_io_pad id, + unsigned long *request, + unsigned long *status, + u32 *mask) { const struct tegra_io_pad_soc *pad; - unsigned long rate, value; pad = tegra_io_pad_find(pmc, id); if (!pad) { @@ -947,6 +948,19 @@ static int tegra_io_pad_prepare(enum tegra_io_pad id, unsigned long *request, *request = pmc->soc->regs->dpd2_req; } + return 0; +} + +static int tegra_io_pad_prepare(enum tegra_io_pad id, unsigned long *request, + unsigned long *status, u32 *mask) +{ + unsigned long rate, value; + int err; + + err = tegra_io_pad_get_dpd_register_bit(id, request, status, mask); + if (err) + return err; + if (pmc->clk) { rate = clk_get_rate(pmc->clk); if (!rate) { |