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| author | Konstantin Aladyshev <aladyshev22@gmail.com> | 2021-01-27 21:23:26 +0300 |
|---|---|---|
| committer | Joel Stanley <joel@jms.id.au> | 2021-02-10 21:21:36 +1030 |
| commit | 99fa80c3de159a612f5f5d36bc0e6aae3d42fd2f (patch) | |
| tree | f8a6d73563ad51fe14f5eca4e85a0463a8df33a2 | |
| parent | a5c5168478d78ee1515487d6e1106381e6678f4d (diff) | |
| download | linux-99fa80c3de159a612f5f5d36bc0e6aae3d42fd2f.tar.bz2 | |
ARM: dts: aspeed: amd-ethanolx: Enable secondary LPC snooping address
AMD EthanolX CRB uses 2-byte POST codes which are sent to ports 0x80/0x81.
Currently ASPEED controller snoops only 0x80 port and therefore captures
only the lower byte of each POST code.
Enable secondary LPC snooping address to capture the higher byte of POST
codes.
Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20210127182326.424-1-aladyshev22@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
| -rw-r--r-- | arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts b/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts index 96ff0aea64e5..ac2d04cfaf2f 100644 --- a/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts +++ b/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts @@ -218,7 +218,7 @@ &lpc_snoop { status = "okay"; - snoop-ports = <0x80>; + snoop-ports = <0x80>, <0x81>; }; &lpc_ctrl { |