1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
|
/*
* Copyright (C) 2013 STMicroelectronics Limited
* Author: Stephen Gallimore <stephen.gallimore@st.com>
*
* Inspired by mach-imx/src.c
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/module.h>
#include <linux/err.h>
#include <linux/types.h>
#include <linux/of_device.h>
#include <linux/regmap.h>
#include <linux/mfd/syscon.h>
#include "reset-syscfg.h"
/**
* Reset channel regmap configuration
*
* @reset: regmap field for the channel's reset bit.
* @ack: regmap field for the channel's ack bit (optional).
*/
struct syscfg_reset_channel {
struct regmap_field *reset;
struct regmap_field *ack;
};
/**
* A reset controller which groups together a set of related reset bits, which
* may be located in different system configuration registers.
*
* @rst: base reset controller structure.
* @active_low: are the resets in this controller active low, i.e. clearing
* the reset bit puts the hardware into reset.
* @channels: An array of reset channels for this controller.
*/
struct syscfg_reset_controller {
struct reset_controller_dev rst;
bool active_low;
struct syscfg_reset_channel *channels;
};
#define to_syscfg_reset_controller(_rst) \
container_of(_rst, struct syscfg_reset_controller, rst)
static int syscfg_reset_program_hw(struct reset_controller_dev *rcdev,
unsigned long idx, int assert)
{
struct syscfg_reset_controller *rst = to_syscfg_reset_controller(rcdev);
const struct syscfg_reset_channel *ch;
u32 ctrl_val = rst->active_low ? !assert : !!assert;
int err;
if (idx >= rcdev->nr_resets)
return -EINVAL;
ch = &rst->channels[idx];
err = regmap_field_write(ch->reset, ctrl_val);
if (err)
return err;
if (ch->ack) {
unsigned long timeout = jiffies + msecs_to_jiffies(1000);
u32 ack_val;
while (true) {
err = regmap_field_read(ch->ack, &ack_val);
if (err)
return err;
if (ack_val == ctrl_val)
break;
if (time_after(jiffies, timeout))
return -ETIME;
cpu_relax();
}
}
return 0;
}
static int syscfg_reset_assert(struct reset_controller_dev *rcdev,
unsigned long idx)
{
return syscfg_reset_program_hw(rcdev, idx, true);
}
static int syscfg_reset_deassert(struct reset_controller_dev *rcdev,
unsigned long idx)
{
return syscfg_reset_program_hw(rcdev, idx, false);
}
static int syscfg_reset_dev(struct reset_controller_dev *rcdev,
unsigned long idx)
{
int err;
err = syscfg_reset_assert(rcdev, idx);
if (err)
return err;
return syscfg_reset_deassert(rcdev, idx);
}
static int syscfg_reset_status(struct reset_controller_dev *rcdev,
unsigned long idx)
{
struct syscfg_reset_controller *rst = to_syscfg_reset_controller(rcdev);
const struct syscfg_reset_channel *ch;
u32 ret_val = 0;
int err;
if (idx >= rcdev->nr_resets)
return -EINVAL;
ch = &rst->channels[idx];
if (ch->ack)
err = regmap_field_read(ch->ack, &ret_val);
else
err = regmap_field_read(ch->reset, &ret_val);
if (err)
return err;
return rst->active_low ? !ret_val : !!ret_val;
}
static const struct reset_control_ops syscfg_reset_ops = {
.reset = syscfg_reset_dev,
.assert = syscfg_reset_assert,
.deassert = syscfg_reset_deassert,
.status = syscfg_reset_status,
};
static int syscfg_reset_controller_register(struct device *dev,
const struct syscfg_reset_controller_data *data)
{
struct syscfg_reset_controller *rc;
size_t size;
int i, err;
rc = devm_kzalloc(dev, sizeof(*rc), GFP_KERNEL);
if (!rc)
return -ENOMEM;
size = sizeof(struct syscfg_reset_channel) * data->nr_channels;
rc->channels = devm_kzalloc(dev, size, GFP_KERNEL);
if (!rc->channels)
return -ENOMEM;
rc->rst.ops = &syscfg_reset_ops,
rc->rst.of_node = dev->of_node;
rc->rst.nr_resets = data->nr_channels;
rc->active_low = data->active_low;
for (i = 0; i < data->nr_channels; i++) {
struct regmap *map;
struct regmap_field *f;
const char *compatible = data->channels[i].compatible;
map = syscon_regmap_lookup_by_compatible(compatible);
if (IS_ERR(map))
return PTR_ERR(map);
f = devm_regmap_field_alloc(dev, map, data->channels[i].reset);
if (IS_ERR(f))
return PTR_ERR(f);
rc->channels[i].reset = f;
if (!data->wait_for_ack)
continue;
f = devm_regmap_field_alloc(dev, map, data->channels[i].ack);
if (IS_ERR(f))
return PTR_ERR(f);
rc->channels[i].ack = f;
}
err = reset_controller_register(&rc->rst);
if (!err)
dev_info(dev, "registered\n");
return err;
}
int syscfg_reset_probe(struct platform_device *pdev)
{
struct device *dev = pdev ? &pdev->dev : NULL;
const struct of_device_id *match;
if (!dev || !dev->driver)
return -ENODEV;
match = of_match_device(dev->driver->of_match_table, dev);
if (!match || !match->data)
return -EINVAL;
return syscfg_reset_controller_register(dev, match->data);
}
|
