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/*
* P1020 RDB Device Tree Source (36-bit address map)
*
* Copyright 2009-2011 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
/include/ "p1020si-pre.dtsi"
/ {
model = "fsl,P1020RDB";
compatible = "fsl,P1020RDB";
memory {
device_type = "memory";
};
board_lbc: lbc: localbus@fffe05000 {
reg = <0xf 0xffe05000 0 0x1000>;
/* NOR, NAND Flashes and Vitesse 5 port L2 switch */
ranges = <0x0 0x0 0xf 0xef000000 0x01000000
0x1 0x0 0xf 0xffa00000 0x00040000
0x2 0x0 0xf 0xffb00000 0x00020000>;
};
board_soc: soc: soc@fffe00000 {
ranges = <0x0 0xf 0xffe00000 0x100000>;
};
pci0: pcie@fffe09000 {
reg = <0xf 0xffe09000 0 0x1000>;
ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
pcie@0 {
ranges = <0x2000000 0x0 0xc0000000
0x2000000 0x0 0xc0000000
0x0 0x20000000
0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
};
pci1: pcie@fffe0a000 {
reg = <0xf 0xffe0a000 0 0x1000>;
ranges = <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
pcie@0 {
ranges = <0x2000000 0x0 0x80000000
0x2000000 0x0 0x80000000
0x0 0x20000000
0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
};
};
/include/ "p1020rdb.dtsi"
/include/ "p1020si-post.dtsi"
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