1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
|
#ifndef __ASM_MACH_LOONGSON64_BOOT_PARAM_H_
#define __ASM_MACH_LOONGSON64_BOOT_PARAM_H_
#define SYSTEM_RAM_LOW 1
#define SYSTEM_RAM_HIGH 2
#define MEM_RESERVED 3
#define PCI_IO 4
#define PCI_MEM 5
#define LOONGSON_CFG_REG 6
#define VIDEO_ROM 7
#define ADAPTER_ROM 8
#define ACPI_TABLE 9
#define SMBIOS_TABLE 10
#define MAX_MEMORY_TYPE 11
#define LOONGSON3_BOOT_MEM_MAP_MAX 128
struct efi_memory_map_loongson {
u16 vers; /* version of efi_memory_map */
u32 nr_map; /* number of memory_maps */
u32 mem_freq; /* memory frequence */
struct mem_map {
u32 node_id; /* node_id which memory attached to */
u32 mem_type; /* system memory, pci memory, pci io, etc. */
u64 mem_start; /* memory map start address */
u32 mem_size; /* each memory_map size, not the total size */
} map[LOONGSON3_BOOT_MEM_MAP_MAX];
} __packed;
enum loongson_cpu_type {
Loongson_2E = 0,
Loongson_2F = 1,
Loongson_3A = 2,
Loongson_3B = 3,
Loongson_1A = 4,
Loongson_1B = 5
};
/*
* Capability and feature descriptor structure for MIPS CPU
*/
struct efi_cpuinfo_loongson {
u16 vers; /* version of efi_cpuinfo_loongson */
u32 processor_id; /* PRID, e.g. 6305, 6306 */
u32 cputype; /* Loongson_3A/3B, etc. */
u32 total_node; /* num of total numa nodes */
u16 cpu_startup_core_id; /* Boot core id */
u16 reserved_cores_mask;
u32 cpu_clock_freq; /* cpu_clock */
u32 nr_cpus;
} __packed;
#define MAX_UARTS 64
struct uart_device {
u32 iotype; /* see include/linux/serial_core.h */
u32 uartclk;
u32 int_offset;
u64 uart_base;
} __packed;
#define MAX_SENSORS 64
#define SENSOR_TEMPER 0x00000001
#define SENSOR_VOLTAGE 0x00000002
#define SENSOR_FAN 0x00000004
struct sensor_device {
char name[32]; /* a formal name */
char label[64]; /* a flexible description */
u32 type; /* SENSOR_* */
u32 id; /* instance id of a sensor-class */
u32 fan_policy; /* see loongson_hwmon.h */
u32 fan_percent;/* only for constant speed policy */
u64 base_addr; /* base address of device registers */
} __packed;
struct system_loongson {
u16 vers; /* version of system_loongson */
u32 ccnuma_smp; /* 0: no numa; 1: has numa */
u32 sing_double_channel; /* 1:single; 2:double */
u32 nr_uarts;
struct uart_device uarts[MAX_UARTS];
u32 nr_sensors;
struct sensor_device sensors[MAX_SENSORS];
char has_ec;
char ec_name[32];
u64 ec_base_addr;
char has_tcm;
char tcm_name[32];
u64 tcm_base_addr;
u64 workarounds; /* see workarounds.h */
} __packed;
struct irq_source_routing_table {
u16 vers;
u16 size;
u16 rtr_bus;
u16 rtr_devfn;
u32 vendor;
u32 device;
u32 PIC_type; /* conform use HT or PCI to route to CPU-PIC */
u64 ht_int_bit; /* 3A: 1<<24; 3B: 1<<16 */
u64 ht_enable; /* irqs used in this PIC */
u32 node_id; /* node id: 0x0-0; 0x1-1; 0x10-2; 0x11-3 */
u64 pci_mem_start_addr;
u64 pci_mem_end_addr;
u64 pci_io_start_addr;
u64 pci_io_end_addr;
u64 pci_config_addr;
u32 dma_mask_bits;
} __packed;
struct interface_info {
u16 vers; /* version of the specificition */
u16 size;
u8 flag;
char description[64];
} __packed;
#define MAX_RESOURCE_NUMBER 128
struct resource_loongson {
u64 start; /* resource start address */
u64 end; /* resource end address */
char name[64];
u32 flags;
};
struct archdev_data {}; /* arch specific additions */
struct board_devices {
char name[64]; /* hold the device name */
u32 num_resources; /* number of device_resource */
/* for each device's resource */
struct resource_loongson resource[MAX_RESOURCE_NUMBER];
/* arch specific additions */
struct archdev_data archdata;
};
struct loongson_special_attribute {
u16 vers; /* version of this special */
char special_name[64]; /* special_atribute_name */
u32 loongson_special_type; /* type of special device */
/* for each device's resource */
struct resource_loongson resource[MAX_RESOURCE_NUMBER];
};
struct loongson_params {
u64 memory_offset; /* efi_memory_map_loongson struct offset */
u64 cpu_offset; /* efi_cpuinfo_loongson struct offset */
u64 system_offset; /* system_loongson struct offset */
u64 irq_offset; /* irq_source_routing_table struct offset */
u64 interface_offset; /* interface_info struct offset */
u64 special_offset; /* loongson_special_attribute struct offset */
u64 boarddev_table_offset; /* board_devices offset */
};
struct smbios_tables {
u16 vers; /* version of smbios */
u64 vga_bios; /* vga_bios address */
struct loongson_params lp;
};
struct efi_reset_system_t {
u64 ResetCold;
u64 ResetWarm;
u64 ResetType;
u64 Shutdown;
u64 DoSuspend; /* NULL if not support */
};
struct efi_loongson {
u64 mps; /* MPS table */
u64 acpi; /* ACPI table (IA64 ext 0.71) */
u64 acpi20; /* ACPI table (ACPI 2.0) */
struct smbios_tables smbios; /* SM BIOS table */
u64 sal_systab; /* SAL system table */
u64 boot_info; /* boot info table */
};
struct boot_params {
struct efi_loongson efi;
struct efi_reset_system_t reset_system;
};
struct loongson_system_configuration {
u32 nr_cpus;
u32 nr_nodes;
int cores_per_node;
int cores_per_package;
u16 boot_cpu_id;
u16 reserved_cpus_mask;
enum loongson_cpu_type cputype;
u64 ht_control_base;
u64 pci_mem_start_addr;
u64 pci_mem_end_addr;
u64 pci_io_base;
u64 restart_addr;
u64 poweroff_addr;
u64 suspend_addr;
u64 vgabios_addr;
u32 dma_mask_bits;
char ecname[32];
u32 nr_uarts;
struct uart_device uarts[MAX_UARTS];
u32 nr_sensors;
struct sensor_device sensors[MAX_SENSORS];
u64 workarounds;
};
extern struct efi_memory_map_loongson *loongson_memmap;
extern struct loongson_system_configuration loongson_sysconf;
#endif
|