summaryrefslogtreecommitdiffstats
path: root/arch/mips/boot/dts/ingenic/jz4780.dtsi
blob: b998301f179ce11d6faba1ac19ce5b226e8194b1 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
// SPDX-License-Identifier: GPL-2.0
#include <dt-bindings/clock/ingenic,jz4780-cgu.h>
#include <dt-bindings/clock/ingenic,tcu.h>
#include <dt-bindings/dma/jz4780-dma.h>

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	compatible = "ingenic,jz4780";

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			device_type = "cpu";
			compatible = "ingenic,xburst-fpu1.0-mxu1.1";
			reg = <0>;

			clocks = <&cgu JZ4780_CLK_CPU>;
			clock-names = "cpu";
		};

		cpu1: cpu@1 {
			device_type = "cpu";
			compatible = "ingenic,xburst-fpu1.0-mxu1.1";
			reg = <1>;

			clocks = <&cgu JZ4780_CLK_CORE1>;
			clock-names = "cpu";
		};
	};

	cpuintc: interrupt-controller {
		#address-cells = <0>;
		#interrupt-cells = <1>;
		interrupt-controller;
		compatible = "mti,cpu-interrupt-controller";
	};

	intc: interrupt-controller@10001000 {
		compatible = "ingenic,jz4780-intc";
		reg = <0x10001000 0x50>;

		interrupt-controller;
		#interrupt-cells = <1>;

		interrupt-parent = <&cpuintc>;
		interrupts = <2>;
	};

	ext: ext {
		compatible = "fixed-clock";
		#clock-cells = <0>;
	};

	rtc: rtc {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <32768>;
	};

	cgu: jz4780-cgu@10000000 {
		compatible = "ingenic,jz4780-cgu", "simple-mfd";
		reg = <0x10000000 0x100>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x0 0x10000000 0x100>;

		#clock-cells = <1>;

		clocks = <&ext>, <&rtc>;
		clock-names = "ext", "rtc";

		otg_phy: usb-phy@3c {
			compatible = "ingenic,jz4780-phy";
			reg = <0x3c 0x10>;

			clocks = <&cgu JZ4780_CLK_OTG1>;

			#phy-cells = <0>;

			status = "disabled";
		};

		rng: rng@d8 {
			compatible = "ingenic,jz4780-rng";
			reg = <0xd8 0x8>;

			status = "disabled";
		};
	};

	tcu: timer@10002000 {
		compatible = "ingenic,jz4780-tcu",
			     "ingenic,jz4770-tcu",
			     "simple-mfd";
		reg = <0x10002000 0x1000>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x0 0x10002000 0x1000>;

		#clock-cells = <1>;

		clocks = <&cgu JZ4780_CLK_RTCLK>,
			 <&cgu JZ4780_CLK_EXCLK>,
			 <&cgu JZ4780_CLK_PCLK>;
		clock-names = "rtc", "ext", "pclk";

		interrupt-controller;
		#interrupt-cells = <1>;

		interrupt-parent = <&intc>;
		interrupts = <27 26 25>;

		watchdog: watchdog@0 {
			compatible = "ingenic,jz4780-watchdog";
			reg = <0x0 0xc>;

			clocks = <&tcu TCU_CLK_WDT>;
			clock-names = "wdt";
		};

		pwm: pwm@40 {
			compatible = "ingenic,jz4780-pwm", "ingenic,jz4740-pwm";
			reg = <0x40 0x80>;

			#pwm-cells = <3>;

			clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
				 <&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_TIMER3>,
				 <&tcu TCU_CLK_TIMER4>, <&tcu TCU_CLK_TIMER5>,
				 <&tcu TCU_CLK_TIMER6>, <&tcu TCU_CLK_TIMER7>;
			clock-names = "timer0", "timer1", "timer2", "timer3",
				      "timer4", "timer5", "timer6", "timer7";
		};

		ost: timer@e0 {
			compatible = "ingenic,jz4780-ost", "ingenic,jz4770-ost";
			reg = <0xe0 0x20>;

			clocks = <&tcu TCU_CLK_OST>;
			clock-names = "ost";

			interrupts = <15>;
		};
	};

	rtc_dev: rtc@10003000 {
		compatible = "ingenic,jz4780-rtc";
		reg = <0x10003000 0x4c>;

		interrupt-parent = <&intc>;
		interrupts = <32>;

		clocks = <&cgu JZ4780_CLK_RTCLK>;
		clock-names = "rtc";
	};

	pinctrl: pin-controller@10010000 {
		compatible = "ingenic,jz4780-pinctrl";
		reg = <0x10010000 0x600>;

		#address-cells = <1>;
		#size-cells = <0>;

		gpa: gpio@0 {
			compatible = "ingenic,jz4780-gpio";
			reg = <0>;

			gpio-controller;
			gpio-ranges = <&pinctrl 0 0 32>;
			#gpio-cells = <2>;

			interrupt-controller;
			#interrupt-cells = <2>;

			interrupt-parent = <&intc>;
			interrupts = <17>;
		};

		gpb: gpio@1 {
			compatible = "ingenic,jz4780-gpio";
			reg = <1>;

			gpio-controller;
			gpio-ranges = <&pinctrl 0 32 32>;
			#gpio-cells = <2>;

			interrupt-controller;
			#interrupt-cells = <2>;

			interrupt-parent = <&intc>;
			interrupts = <16>;
		};

		gpc: gpio@2 {
			compatible = "ingenic,jz4780-gpio";
			reg = <2>;

			gpio-controller;
			gpio-ranges = <&pinctrl 0 64 32>;
			#gpio-cells = <2>;

			interrupt-controller;
			#interrupt-cells = <2>;

			interrupt-parent = <&intc>;
			interrupts = <15>;
		};

		gpd: gpio@3 {
			compatible = "ingenic,jz4780-gpio";
			reg = <3>;

			gpio-controller;
			gpio-ranges = <&pinctrl 0 96 32>;
			#gpio-cells = <2>;

			interrupt-controller;
			#interrupt-cells = <2>;

			interrupt-parent = <&intc>;
			interrupts = <14>;
		};

		gpe: gpio@4 {
			compatible = "ingenic,jz4780-gpio";
			reg = <4>;

			gpio-controller;
			gpio-ranges = <&pinctrl 0 128 32>;
			#gpio-cells = <2>;

			interrupt-controller;
			#interrupt-cells = <2>;

			interrupt-parent = <&intc>;
			interrupts = <13>;
		};

		gpf: gpio@5 {
			compatible = "ingenic,jz4780-gpio";
			reg = <5>;

			gpio-controller;
			gpio-ranges = <&pinctrl 0 160 32>;
			#gpio-cells = <2>;

			interrupt-controller;
			#interrupt-cells = <2>;

			interrupt-parent = <&intc>;
			interrupts = <12>;
		};
	};

	spi0: spi@10043000 {
		compatible = "ingenic,jz4780-spi";
		reg = <0x10043000 0x1c>;
		#address-cells = <1>;
		#size-cells = <0>;

		interrupt-parent = <&intc>;
		interrupts = <8>;

		clocks = <&cgu JZ4780_CLK_SSI0>;
		clock-names = "spi";

		dmas = <&dma JZ4780_DMA_SSI0_RX 0xffffffff>,
		       <&dma JZ4780_DMA_SSI0_TX 0xffffffff>;
		dma-names = "rx", "tx";

		status = "disabled";
	};

	uart0: serial@10030000 {
		compatible = "ingenic,jz4780-uart";
		reg = <0x10030000 0x100>;

		interrupt-parent = <&intc>;
		interrupts = <51>;

		clocks = <&ext>, <&cgu JZ4780_CLK_UART0>;
		clock-names = "baud", "module";

		status = "disabled";
	};

	uart1: serial@10031000 {
		compatible = "ingenic,jz4780-uart";
		reg = <0x10031000 0x100>;

		interrupt-parent = <&intc>;
		interrupts = <50>;

		clocks = <&ext>, <&cgu JZ4780_CLK_UART1>;
		clock-names = "baud", "module";

		status = "disabled";
	};

	uart2: serial@10032000 {
		compatible = "ingenic,jz4780-uart";
		reg = <0x10032000 0x100>;

		interrupt-parent = <&intc>;
		interrupts = <49>;

		clocks = <&ext>, <&cgu JZ4780_CLK_UART2>;
		clock-names = "baud", "module";

		status = "disabled";
	};

	uart3: serial@10033000 {
		compatible = "ingenic,jz4780-uart";
		reg = <0x10033000 0x100>;

		interrupt-parent = <&intc>;
		interrupts = <48>;

		clocks = <&ext>, <&cgu JZ4780_CLK_UART3>;
		clock-names = "baud", "module";

		status = "disabled";
	};

	uart4: serial@10034000 {
		compatible = "ingenic,jz4780-uart";
		reg = <0x10034000 0x100>;

		interrupt-parent = <&intc>;
		interrupts = <34>;

		clocks = <&ext>, <&cgu JZ4780_CLK_UART4>;
		clock-names = "baud", "module";

		status = "disabled";
	};

	spi1: spi@10044000 {
		compatible = "ingenic,jz4780-spi";
		reg = <0x10044000 0x1c>;
		#address-cells = <1>;
		#size-sells = <0>;

		interrupt-parent = <&intc>;
		interrupts = <7>;

		clocks = <&cgu JZ4780_CLK_SSI1>;
		clock-names = "spi";

		dmas = <&dma JZ4780_DMA_SSI1_RX 0xffffffff>,
		       <&dma JZ4780_DMA_SSI1_TX 0xffffffff>;
		dma-names = "rx", "tx";

		status = "disabled";
	};

	i2c0: i2c@10050000 {
		compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
		#address-cells = <1>;
		#size-cells = <0>;

		reg = <0x10050000 0x1000>;

		interrupt-parent = <&intc>;
		interrupts = <60>;

		clocks = <&cgu JZ4780_CLK_SMB0>;
		clock-frequency = <100000>;
		pinctrl-names = "default";
		pinctrl-0 = <&pins_i2c0_data>;

		status = "disabled";
	};

	i2c1: i2c@10051000 {
		compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0x10051000 0x1000>;

		interrupt-parent = <&intc>;
		interrupts = <59>;

		clocks = <&cgu JZ4780_CLK_SMB1>;
		clock-frequency = <100000>;
		pinctrl-names = "default";
		pinctrl-0 = <&pins_i2c1_data>;

		status = "disabled";
	};

	i2c2: i2c@10052000 {
		compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0x10052000 0x1000>;

		interrupt-parent = <&intc>;
		interrupts = <58>;

		clocks = <&cgu JZ4780_CLK_SMB2>;
		clock-frequency = <100000>;
		pinctrl-names = "default";
		pinctrl-0 = <&pins_i2c2_data>;

		status = "disabled";
	};

	i2c3: i2c@10053000 {
		compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0x10053000 0x1000>;

		interrupt-parent = <&intc>;
		interrupts = <57>;

		clocks = <&cgu JZ4780_CLK_SMB3>;
		clock-frequency = <100000>;
		pinctrl-names = "default";
		pinctrl-0 = <&pins_i2c3_data>;

		status = "disabled";
	};

	i2c4: i2c@10054000 {
		compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0x10054000 0x1000>;

		interrupt-parent = <&intc>;
		interrupts = <56>;

		clocks = <&cgu JZ4780_CLK_SMB4>;
		clock-frequency = <100000>;
		pinctrl-names = "default";
		pinctrl-0 = <&pins_i2c4_data>;

		status = "disabled";
	};

	hdmi: hdmi@10180000 {
		compatible = "ingenic,jz4780-dw-hdmi";
		reg = <0x10180000 0x8000>;
		reg-io-width = <4>;

		clocks = <&cgu JZ4780_CLK_AHB0>, <&cgu JZ4780_CLK_HDMI>;
		clock-names = "iahb", "isfr";

		interrupt-parent = <&intc>;
		interrupts = <3>;

		status = "disabled";
	};

	lcdc0: lcdc0@13050000 {
		compatible = "ingenic,jz4780-lcd";
		reg = <0x13050000 0x1800>;

		clocks = <&cgu JZ4780_CLK_TVE>, <&cgu JZ4780_CLK_LCD0PIXCLK>;
		clock-names = "lcd", "lcd_pclk";

		interrupt-parent = <&intc>;
		interrupts = <31>;

		status = "disabled";
	};

	lcdc1: lcdc1@130a0000 {
		compatible = "ingenic,jz4780-lcd";
		reg = <0x130a0000 0x1800>;

		clocks = <&cgu JZ4780_CLK_TVE>, <&cgu JZ4780_CLK_LCD1PIXCLK>;
		clock-names = "lcd", "lcd_pclk";

		interrupt-parent = <&intc>;
		interrupts = <23>;

		status = "disabled";
	};

	nemc: nemc@13410000 {
		compatible = "ingenic,jz4780-nemc", "simple-mfd";
		reg = <0x13410000 0x10000>;
		#address-cells = <2>;
		#size-cells = <1>;
		ranges = <0 0 0x13410000 0x10000>,
			 <1 0 0x1b000000 0x1000000>,
			 <2 0 0x1a000000 0x1000000>,
			 <3 0 0x19000000 0x1000000>,
			 <4 0 0x18000000 0x1000000>,
			 <5 0 0x17000000 0x1000000>,
			 <6 0 0x16000000 0x1000000>;

		clocks = <&cgu JZ4780_CLK_NEMC>;

		status = "disabled";

		efuse: efuse@d0 {
			reg = <0 0xd0 0x30>;
			compatible = "ingenic,jz4780-efuse";

			clocks = <&cgu JZ4780_CLK_AHB2>;

			#address-cells = <1>;
			#size-cells = <1>;

			eth0_addr: eth-mac-addr@22 {
				reg = <0x22 0x6>;
			};
		};
	};

	dma: dma@13420000 {
		compatible = "ingenic,jz4780-dma";
		reg = <0x13420000 0x400>, <0x13421000 0x40>;
		#dma-cells = <2>;

		interrupt-parent = <&intc>;
		interrupts = <10>;

		clocks = <&cgu JZ4780_CLK_PDMA>;
	};

	mmc0: mmc@13450000 {
		compatible = "ingenic,jz4780-mmc";
		reg = <0x13450000 0x1000>;

		interrupt-parent = <&intc>;
		interrupts = <37>;

		clocks = <&cgu JZ4780_CLK_MSC0>;
		clock-names = "mmc";

		cap-sd-highspeed;
		cap-mmc-highspeed;
		cap-sdio-irq;
		dmas = <&dma JZ4780_DMA_MSC0_RX 0xffffffff>,
		       <&dma JZ4780_DMA_MSC0_TX 0xffffffff>;
		dma-names = "rx", "tx";

		status = "disabled";
	};

	mmc1: mmc@13460000 {
		compatible = "ingenic,jz4780-mmc";
		reg = <0x13460000 0x1000>;

		interrupt-parent = <&intc>;
		interrupts = <36>;

		clocks = <&cgu JZ4780_CLK_MSC1>;
		clock-names = "mmc";

		cap-sd-highspeed;
		cap-mmc-highspeed;
		cap-sdio-irq;
		dmas = <&dma JZ4780_DMA_MSC1_RX 0xffffffff>,
		       <&dma JZ4780_DMA_MSC1_TX 0xffffffff>;
		dma-names = "rx", "tx";

		status = "disabled";
	};

	bch: bch@134d0000 {
		compatible = "ingenic,jz4780-bch";
		reg = <0x134d0000 0x10000>;

		clocks = <&cgu JZ4780_CLK_BCH>;

		status = "disabled";
	};

	otg: usb@13500000 {
		compatible = "ingenic,jz4780-otg", "snps,dwc2";
		reg = <0x13500000 0x40000>;

		interrupt-parent = <&intc>;
		interrupts = <21>;

		clocks = <&cgu JZ4780_CLK_UHC>;
		clock-names = "otg";

		phys = <&otg_phy>;
		phy-names = "usb2-phy";

		g-rx-fifo-size = <768>;
		g-np-tx-fifo-size = <256>;
		g-tx-fifo-size = <256 256 256 256 256 256 256 512>;

		status = "disabled";
	};
};