1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
|
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "brcm,bcm7358";
cpus {
#address-cells = <1>;
#size-cells = <0>;
mips-hpt-frequency = <375000000>;
cpu@0 {
compatible = "brcm,bmips3300";
device_type = "cpu";
reg = <0>;
};
};
aliases {
uart0 = &uart0;
uart1 = &uart1;
uart2 = &uart2;
};
cpu_intc: cpu_intc {
#address-cells = <0>;
compatible = "mti,cpu-interrupt-controller";
interrupt-controller;
#interrupt-cells = <1>;
};
clocks {
uart_clk: uart_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <81000000>;
};
};
rdb {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
ranges = <0 0x10000000 0x01000000>;
periph_intc: periph_intc@411400 {
compatible = "brcm,bcm7038-l1-intc";
reg = <0x411400 0x30>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&cpu_intc>;
interrupts = <2>;
};
sun_l2_intc: sun_l2_intc@403000 {
compatible = "brcm,l2-intc";
reg = <0x403000 0x30>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&periph_intc>;
interrupts = <48>;
};
gisb-arb@400000 {
compatible = "brcm,bcm7400-gisb-arb";
reg = <0x400000 0xdc>;
native-endian;
interrupt-parent = <&sun_l2_intc>;
interrupts = <0>, <2>;
brcm,gisb-arb-master-mask = <0x2f3>;
brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "bsp_0",
"rdc_0", "raaga_0",
"avd_0", "jtag_0";
};
upg_irq0_intc: upg_irq0_intc@406600 {
compatible = "brcm,bcm7120-l2-intc";
reg = <0x406600 0x8>;
brcm,int-map-mask = <0x44>;
brcm,int-fwd-mask = <0x70000>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&periph_intc>;
interrupts = <56>;
};
sun_top_ctrl: syscon@404000 {
compatible = "brcm,bcm7358-sun-top-ctrl", "syscon";
reg = <0x404000 0x51c>;
little-endian;
};
reboot {
compatible = "brcm,brcmstb-reboot";
syscon = <&sun_top_ctrl 0x304 0x308>;
};
uart0: serial@406800 {
compatible = "ns16550a";
reg = <0x406800 0x20>;
reg-io-width = <0x4>;
reg-shift = <0x2>;
native-endian;
interrupt-parent = <&periph_intc>;
interrupts = <61>;
clocks = <&uart_clk>;
status = "disabled";
};
uart1: serial@406840 {
compatible = "ns16550a";
reg = <0x406840 0x20>;
reg-io-width = <0x4>;
reg-shift = <0x2>;
native-endian;
interrupt-parent = <&periph_intc>;
interrupts = <62>;
clocks = <&uart_clk>;
status = "disabled";
};
uart2: serial@406880 {
compatible = "ns16550a";
reg = <0x406880 0x20>;
reg-io-width = <0x4>;
reg-shift = <0x2>;
native-endian;
interrupt-parent = <&periph_intc>;
interrupts = <63>;
clocks = <&uart_clk>;
status = "disabled";
};
enet0: ethernet@430000 {
phy-mode = "internal";
phy-handle = <&phy1>;
mac-address = [ 00 10 18 36 23 1a ];
compatible = "brcm,genet-v2";
#address-cells = <0x1>;
#size-cells = <0x1>;
reg = <0x430000 0x4c8c>;
interrupts = <24>, <25>;
interrupt-parent = <&periph_intc>;
status = "disabled";
mdio@e14 {
compatible = "brcm,genet-mdio-v2";
#address-cells = <0x1>;
#size-cells = <0x0>;
reg = <0xe14 0x8>;
phy1: ethernet-phy@1 {
max-speed = <100>;
reg = <0x1>;
compatible = "brcm,40nm-ephy",
"ethernet-phy-ieee802.3-c22";
};
};
};
ehci0: usb@480300 {
compatible = "brcm,bcm7358-ehci", "generic-ehci";
reg = <0x480300 0x100>;
native-endian;
interrupt-parent = <&periph_intc>;
interrupts = <65>;
status = "disabled";
};
ohci0: usb@480400 {
compatible = "brcm,bcm7358-ohci", "generic-ohci";
reg = <0x480400 0x100>;
native-endian;
no-big-frame-no;
interrupt-parent = <&periph_intc>;
interrupts = <66>;
status = "disabled";
};
};
};
|
