1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
|
/*
* Copyright (C) 2012 STMicroelectronics Limited.
* Author: Srinivas Kandagatla <srinivas.kandagatla@st.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* publishhed by the Free Software Foundation.
*/
#include "stih41x.dtsi"
#include "stih416-clock.dtsi"
#include "stih416-pinctrl.dtsi"
#include <dt-bindings/phy/phy.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/reset-controller/stih416-resets.h>
#include <dt-bindings/interrupt-controller/irq-st.h>
/ {
L2: cache-controller {
compatible = "arm,pl310-cache";
reg = <0xfffe2000 0x1000>;
arm,data-latency = <3 3 3>;
arm,tag-latency = <2 2 2>;
cache-unified;
cache-level = <2>;
};
arm-pmu {
compatible = "arm,cortex-a9-pmu";
interrupt-parent = <&intc>;
interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
};
soc {
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&intc>;
ranges;
compatible = "simple-bus";
restart {
compatible = "st,stih416-restart";
st,syscfg = <&syscfg_sbc>;
status = "okay";
};
powerdown: powerdown-controller {
#reset-cells = <1>;
compatible = "st,stih416-powerdown";
};
softreset: softreset-controller {
#reset-cells = <1>;
compatible = "st,stih416-softreset";
};
syscfg_sbc:sbc-syscfg@fe600000{
compatible = "st,stih416-sbc-syscfg", "syscon";
reg = <0xfe600000 0x1000>;
};
syscfg_front:front-syscfg@fee10000{
compatible = "st,stih416-front-syscfg", "syscon";
reg = <0xfee10000 0x1000>;
};
syscfg_rear:rear-syscfg@fe830000{
compatible = "st,stih416-rear-syscfg", "syscon";
reg = <0xfe830000 0x1000>;
};
/* MPE */
syscfg_fvdp_fe:fvdp-fe-syscfg@fddf0000{
compatible = "st,stih416-fvdp-fe-syscfg", "syscon";
reg = <0xfddf0000 0x1000>;
};
syscfg_fvdp_lite:fvdp-lite-syscfg@fd6a0000{
compatible = "st,stih416-fvdp-lite-syscfg", "syscon";
reg = <0xfd6a0000 0x1000>;
};
syscfg_cpu:cpu-syscfg@fdde0000{
compatible = "st,stih416-cpu-syscfg", "syscon";
reg = <0xfdde0000 0x1000>;
};
syscfg_compo:compo-syscfg@fd320000{
compatible = "st,stih416-compo-syscfg", "syscon";
reg = <0xfd320000 0x1000>;
};
syscfg_transport:transport-syscfg@fd690000{
compatible = "st,stih416-transport-syscfg", "syscon";
reg = <0xfd690000 0x1000>;
};
syscfg_lpm:lpm-syscfg@fe4b5100{
compatible = "st,stih416-lpm-syscfg", "syscon";
reg = <0xfe4b5100 0x8>;
};
irq-syscfg {
compatible = "st,stih416-irq-syscfg";
st,syscfg = <&syscfg_cpu>;
st,irq-device = <ST_IRQ_SYSCFG_PMU_0>,
<ST_IRQ_SYSCFG_PMU_1>;
st,fiq-device = <ST_IRQ_SYSCFG_DISABLED>,
<ST_IRQ_SYSCFG_DISABLED>;
};
serial2: serial@fed32000{
compatible = "st,asc";
status = "disabled";
reg = <0xfed32000 0x2c>;
interrupts = <0 197 0>;
clocks = <&clk_s_a0_ls CLK_ICN_REG>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_serial2 &pinctrl_serial2_oe>;
};
/* SBC_UART1 */
sbc_serial1: serial@fe531000 {
compatible = "st,asc";
status = "disabled";
reg = <0xfe531000 0x2c>;
interrupts = <0 210 0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sbc_serial1>;
clocks = <&clk_sysin>;
};
i2c@fed40000 {
compatible = "st,comms-ssc4-i2c";
reg = <0xfed40000 0x110>;
interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_s_a0_ls CLK_ICN_REG>;
clock-names = "ssc";
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c0_default>;
status = "disabled";
};
i2c@fed41000 {
compatible = "st,comms-ssc4-i2c";
reg = <0xfed41000 0x110>;
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_s_a0_ls CLK_ICN_REG>;
clock-names = "ssc";
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1_default>;
status = "disabled";
};
i2c@fe540000 {
compatible = "st,comms-ssc4-i2c";
reg = <0xfe540000 0x110>;
interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_sysin>;
clock-names = "ssc";
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sbc_i2c0_default>;
status = "disabled";
};
i2c@fe541000 {
compatible = "st,comms-ssc4-i2c";
reg = <0xfe541000 0x110>;
interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_sysin>;
clock-names = "ssc";
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sbc_i2c1_default>;
status = "disabled";
};
ethernet0: dwmac@fe810000 {
device_type = "network";
compatible = "st,stih416-dwmac", "snps,dwmac", "snps,dwmac-3.710";
status = "disabled";
reg = <0xfe810000 0x8000>;
reg-names = "stmmaceth";
interrupts = <0 133 0>, <0 134 0>, <0 135 0>;
interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
snps,pbl = <32>;
snps,mixed-burst;
st,syscon = <&syscfg_rear 0x8bc>;
resets = <&softreset STIH416_ETH0_SOFTRESET>;
reset-names = "stmmaceth";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mii0>;
clock-names = "stmmaceth", "sti-ethclk";
clocks = <&clk_s_a1_ls CLK_ICN_IF_2>, <&clk_s_a1_ls CLK_GMAC0_PHY>;
};
ethernet1: dwmac@fef08000 {
device_type = "network";
compatible = "st,stih416-dwmac", "snps,dwmac", "snps,dwmac-3.710";
status = "disabled";
reg = <0xfef08000 0x8000>;
reg-names = "stmmaceth";
interrupts = <0 136 0>, <0 137 0>, <0 138 0>;
interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
snps,pbl = <32>;
snps,mixed-burst;
st,syscon = <&syscfg_sbc 0x7f0>;
resets = <&softreset STIH416_ETH1_SOFTRESET>;
reset-names = "stmmaceth";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mii1>;
clock-names = "stmmaceth", "sti-ethclk";
clocks = <&clk_s_a0_ls CLK_ICN_REG>, <&clk_s_a0_ls CLK_ETH1_PHY>;
};
rc: rc@fe518000 {
compatible = "st,comms-irb";
reg = <0xfe518000 0x234>;
interrupts = <0 203 0>;
rx-mode = "infrared";
clocks = <&clk_sysin>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ir>;
resets = <&softreset STIH416_IRB_SOFTRESET>;
};
/* FSM */
spifsm: spifsm@fe902000 {
compatible = "st,spi-fsm";
reg = <0xfe902000 0x1000>;
pinctrl-0 = <&pinctrl_fsm>;
st,syscfg = <&syscfg_rear>;
st,boot-device-reg = <0x958>;
st,boot-device-spi = <0x1a>;
status = "disabled";
};
keyscan: keyscan@fe4b0000 {
compatible = "st,sti-keyscan";
status = "disabled";
reg = <0xfe4b0000 0x2000>;
interrupts = <GIC_SPI 212 IRQ_TYPE_NONE>;
clocks = <&clk_sysin>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_keyscan>;
resets = <&powerdown STIH416_KEYSCAN_POWERDOWN>,
<&softreset STIH416_KEYSCAN_SOFTRESET>;
};
temp0 {
compatible = "st,stih416-sas-thermal";
clock-names = "thermal";
clocks = <&clockgen_c_vcc 14>;
status = "okay";
};
temp1@fdfe8000 {
compatible = "st,stih416-mpe-thermal";
reg = <0xfdfe8000 0x10>;
clocks = <&clockgen_e 3>;
clock-names = "thermal";
interrupts = <GIC_SPI 23 IRQ_TYPE_EDGE_RISING>;
status = "okay";
};
mmc0: sdhci@fe81e000 {
compatible = "st,sdhci";
status = "disabled";
reg = <0xfe81e000 0x1000>;
interrupts = <GIC_SPI 127 IRQ_TYPE_NONE>;
interrupt-names = "mmcirq";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mmc0>;
clock-names = "mmc";
clocks = <&clk_s_a1_ls 1>;
};
mmc1: sdhci@fe81f000 {
compatible = "st,sdhci";
status = "disabled";
reg = <0xfe81f000 0x1000>;
interrupts = <GIC_SPI 128 IRQ_TYPE_NONE>;
interrupt-names = "mmcirq";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mmc1>;
clock-names = "mmc";
clocks = <&clk_s_a1_ls 8>;
};
miphy365x_phy: phy@fe382000 {
compatible = "st,miphy365x-phy";
st,syscfg = <&syscfg_rear 0x824 0x828>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
phy_port0: port@fe382000 {
#phy-cells = <1>;
reg = <0xfe382000 0x100>, <0xfe394000 0x100>;
reg-names = "sata", "pcie";
};
phy_port1: port@fe38a000 {
#phy-cells = <1>;
reg = <0xfe38a000 0x100>, <0xfe804000 0x100>;
reg-names = "sata", "pcie";
};
};
sata0: sata@fe380000 {
compatible = "st,sti-ahci";
reg = <0xfe380000 0x1000>;
interrupts = <GIC_SPI 157 IRQ_TYPE_NONE>;
interrupt-names = "hostc";
phys = <&phy_port0 PHY_TYPE_SATA>;
phy-names = "sata-phy";
resets = <&powerdown STIH416_SATA0_POWERDOWN>,
<&softreset STIH416_SATA0_SOFTRESET>;
reset-names = "pwr-dwn", "sw-rst";
clock-names = "ahci_clk";
clocks = <&clk_s_a0_ls CLK_ICN_REG>;
status = "disabled";
};
usb2_phy: phy@0 {
compatible = "st,stih416-usb-phy";
#phy-cells = <0>;
st,syscfg = <&syscfg_rear>;
clocks = <&clk_sysin>;
clock-names = "osc_phy";
};
ehci0: usb@fe1ffe00 {
compatible = "st,st-ehci-300x";
reg = <0xfe1ffe00 0x100>;
interrupts = <GIC_SPI 148 IRQ_TYPE_NONE>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb0>;
clocks = <&clk_s_a1_ls 0>,
<&clockgen_b0 0>;
clock-names = "ic", "clk48";
phys = <&usb2_phy>;
phy-names = "usb";
resets = <&powerdown STIH416_USB0_POWERDOWN>,
<&softreset STIH416_USB0_SOFTRESET>;
reset-names = "power", "softreset";
};
ohci0: usb@fe1ffc00 {
compatible = "st,st-ohci-300x";
reg = <0xfe1ffc00 0x100>;
interrupts = <GIC_SPI 149 IRQ_TYPE_NONE>;
clocks = <&clk_s_a1_ls 0>,
<&clockgen_b0 0>;
clock-names = "ic", "clk48";
phys = <&usb2_phy>;
phy-names = "usb";
status = "okay";
resets = <&powerdown STIH416_USB0_POWERDOWN>,
<&softreset STIH416_USB0_SOFTRESET>;
reset-names = "power", "softreset";
};
ehci1: usb@fe203e00 {
compatible = "st,st-ehci-300x";
reg = <0xfe203e00 0x100>;
interrupts = <GIC_SPI 150 IRQ_TYPE_NONE>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb1>;
clocks = <&clk_s_a1_ls 0>,
<&clockgen_b0 0>;
clock-names = "ic", "clk48";
phys = <&usb2_phy>;
phy-names = "usb";
resets = <&powerdown STIH416_USB1_POWERDOWN>,
<&softreset STIH416_USB1_SOFTRESET>;
reset-names = "power", "softreset";
};
ohci1: usb@fe203c00 {
compatible = "st,st-ohci-300x";
reg = <0xfe203c00 0x100>;
interrupts = <GIC_SPI 151 IRQ_TYPE_NONE>;
clocks = <&clk_s_a1_ls 0>,
<&clockgen_b0 0>;
clock-names = "ic", "clk48";
phys = <&usb2_phy>;
phy-names = "usb";
resets = <&powerdown STIH416_USB1_POWERDOWN>,
<&softreset STIH416_USB1_SOFTRESET>;
reset-names = "power", "softreset";
};
ehci2: usb@fe303e00 {
compatible = "st,st-ehci-300x";
reg = <0xfe303e00 0x100>;
interrupts = <GIC_SPI 152 IRQ_TYPE_NONE>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb2>;
clocks = <&clk_s_a1_ls 0>,
<&clockgen_b0 0>;
clock-names = "ic", "clk48";
phys = <&usb2_phy>;
phy-names = "usb";
resets = <&powerdown STIH416_USB2_POWERDOWN>,
<&softreset STIH416_USB2_SOFTRESET>;
reset-names = "power", "softreset";
};
ohci2: usb@fe303c00 {
compatible = "st,st-ohci-300x";
reg = <0xfe303c00 0x100>;
interrupts = <GIC_SPI 153 IRQ_TYPE_NONE>;
clocks = <&clk_s_a1_ls 0>,
<&clockgen_b0 0>;
clock-names = "ic", "clk48";
phys = <&usb2_phy>;
phy-names = "usb";
resets = <&powerdown STIH416_USB2_POWERDOWN>,
<&softreset STIH416_USB2_SOFTRESET>;
reset-names = "power", "softreset";
};
ehci3: usb@fe343e00 {
compatible = "st,st-ehci-300x";
reg = <0xfe343e00 0x100>;
interrupts = <GIC_SPI 154 IRQ_TYPE_NONE>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb3>;
clocks = <&clk_s_a1_ls 0>,
<&clockgen_b0 0>;
clock-names = "ic", "clk48";
phys = <&usb2_phy>;
phy-names = "usb";
resets = <&powerdown STIH416_USB3_POWERDOWN>,
<&softreset STIH416_USB3_SOFTRESET>;
reset-names = "power", "softreset";
};
ohci3: usb@fe343c00 {
compatible = "st,st-ohci-300x";
reg = <0xfe343c00 0x100>;
interrupts = <GIC_SPI 155 IRQ_TYPE_NONE>;
clocks = <&clk_s_a1_ls 0>,
<&clockgen_b0 0>;
clock-names = "ic", "clk48";
phys = <&usb2_phy>;
phy-names = "usb";
resets = <&powerdown STIH416_USB3_POWERDOWN>,
<&softreset STIH416_USB3_SOFTRESET>;
reset-names = "power", "softreset";
};
/* SAS PWM Module */
pwm0: pwm@fed10000 {
compatible = "st,sti-pwm";
status = "disabled";
#pwm-cells = <2>;
reg = <0xfed10000 0x68>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_chan0_default
&pinctrl_pwm0_chan1_default
&pinctrl_pwm0_chan2_default
&pinctrl_pwm0_chan3_default>;
clock-names = "pwm";
clocks = <&clk_sysin>;
st,pwm-num-chan = <4>;
};
/* SBC PWM Module */
pwm1: pwm@fe510000 {
compatible = "st,sti-pwm";
status = "disabled";
#pwm-cells = <2>;
reg = <0xfe510000 0x68>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm1_chan0_default
/*
* Shared with SBC_OBS_NOTRST. Don't
* enable unless you really know what
* you're doing.
*
* &pinctrl_pwm1_chan1_default
*/
&pinctrl_pwm1_chan2_default
&pinctrl_pwm1_chan3_default>;
clock-names = "pwm";
clocks = <&clk_sysin>;
st,pwm-num-chan = <3>;
};
};
};
|
