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/*
* Device Tree Source for OMAP34xx/OMAP35xx SoC
*
* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
#include "omap3.dtsi"
/ {
cpus {
cpu@0 {
/* OMAP343x/OMAP35xx variants OPP1-5 */
operating-points = <
/* kHz uV */
125000 975000
250000 1075000
500000 1200000
550000 1270000
600000 1350000
>;
clock-latency = <300000>; /* From legacy driver */
};
};
ocp {
ssi: ssi-controller@48058000 {
compatible = "ti,omap3-ssi";
ti,hwmods = "ssi";
reg = <0x48058000 0x1000>,
<0x48059000 0x1000>;
reg-names = "sys",
"gdd";
interrupts = <55>;
interrupt-names = "gdd_mpu";
#address-cells = <1>;
#size-cells = <1>;
ranges;
ssi_port1: ssi-port@0 {
compatible = "ti,omap3-ssi-port";
reg = <0x4805a000 0x800>,
<0x4805a800 0x800>;
reg-names = "tx",
"rx";
interrupt-parent = <&intc>;
interrupts = <51>,
<52>;
interrupt-names = "mpu_irq0",
"mpu_irq1";
};
ssi_port2: ssi-port@1 {
compatible = "ti,omap3-ssi-port";
reg = <0x4805b000 0x800>,
<0x4805b800 0x800>;
reg-names = "tx",
"rx";
interrupt-parent = <&intc>;
interrupts = <53>,
<54>;
interrupt-names = "mpu_irq0",
"mpu_irq1";
};
};
};
};
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