blob: 9a8b631904fd6569ab9ddbe8f26ee43d0bce550b (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
|
Amlogic Meson GX DWC3 USB SoC controller
Required properties:
- compatible: depending on the SoC this should contain one of:
* amlogic,meson-axg-dwc3
* amlogic,meson-gxl-dwc3
- clocks: a handle for the "USB general" clock
- clock-names: must be "usb_general"
- resets: a handle for the shared "USB OTG" reset line
- reset-names: must be "usb_otg"
Required child node:
A child node must exist to represent the core DWC3 IP block. The name of
the node is not important. The content of the node is defined in dwc3.txt.
PHY documentation is provided in the following places:
- Documentation/devicetree/bindings/phy/meson-gxl-usb2-phy.txt
- Documentation/devicetree/bindings/phy/meson-gxl-usb3-phy.txt
Example device nodes:
usb0: usb@ff500000 {
compatible = "amlogic,meson-axg-dwc3";
#address-cells = <2>;
#size-cells = <2>;
ranges;
clocks = <&clkc CLKID_USB>;
clock-names = "usb_general";
resets = <&reset RESET_USB_OTG>;
reset-names = "usb_otg";
dwc3: dwc3@ff500000 {
compatible = "snps,dwc3";
reg = <0x0 0xff500000 0x0 0x100000>;
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
dr_mode = "host";
maximum-speed = "high-speed";
snps,dis_u2_susphy_quirk;
phys = <&usb3_phy>, <&usb2_phy0>;
phy-names = "usb2-phy", "usb3-phy";
};
};
|
