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2022-12-05dt-bindings: power: rpmpd: Add SM4250 supportBhupesh Sharma1-0/+10
2022-12-05PCI/MSI: Provide pci_ims_alloc/free_irq()Thomas Gleixner1-0/+3
2022-12-05PCI/MSI: Provide IMS (Interrupt Message Store) supportThomas Gleixner1-0/+5
2022-12-05genirq/msi: Provide constants for PCI/IMS supportThomas Gleixner3-0/+4
2022-12-05PCI/MSI: Provide post-enable dynamic allocation interfaces for MSI-XThomas Gleixner1-0/+6
2022-12-05genirq/msi: Provide MSI_FLAG_MSIX_ALLOC_DYNThomas Gleixner1-1/+2
2022-12-05genirq/msi: Provide msi_domain_alloc_irq_at()Thomas Gleixner2-0/+11
2022-12-05genirq/msi: Provide msi_domain_ops:: Prepare_desc()Thomas Gleixner1-1/+5
2022-12-05genirq/msi: Provide msi_desc:: Msi_dataThomas Gleixner2-1/+54
2022-12-05genirq/msi: Provide struct msi_mapThomas Gleixner1-0/+13
2022-12-05iommu/amd: Switch to MSI base domainsThomas Gleixner1-0/+1
2022-12-05iommu/vt-d: Switch to MSI parent domainsThomas Gleixner1-0/+1
2022-12-05PCI/MSI: Remove unused pci_dev_has_special_msi_domain()Thomas Gleixner1-1/+0
2022-12-05genirq/msi: Provide BUS_DEVICE_PCI_MSI[X]Thomas Gleixner1-0/+2
2022-12-05soc: qcom: llcc: Add configuration data for SM8550Abel Vesa1-0/+12
2022-12-05soc: qcom: socinfo: Add SM8550 IDAbel Vesa1-0/+1
2022-12-05dt-bindings: power: rpmpd: Add SM8550 to rpmpd bindingAbel Vesa1-0/+16
2022-12-05dt-bindings: arm: qcom,ids: Add SoC IDs for MSM8956 and MSM8976AngeloGioacchino Del Regno1-0/+2
2022-12-05Merge branch 'for-6.2/cxl-xor' into for-6.2/cxlDan Williams5-5/+202
2022-12-05Merge branch 'for-6.2/cxl-aer' into for-6.2/cxlDan Williams2-0/+115
2022-12-05genirq/msi: Provide msi_match_device_domain()Thomas Gleixner1-0/+3
2022-12-05genirq/msi: Provide msi_create/free_device_irq_domain()Thomas Gleixner1-0/+6
2022-12-05genirq/irqdomain: Add irq_domain:: Dev for per device MSI domainsThomas Gleixner1-0/+4
2022-12-05genirq/msi: Add size info to struct msi_domain_infoThomas Gleixner1-0/+5
2022-12-05genirq/msi: Provide data structs for per device domainsThomas Gleixner1-1/+15
2022-12-05genirq/msi: Provide struct msi_parent_opsThomas Gleixner2-0/+26
2022-12-05genirq/msi: Rearrange MSI domain flagsThomas Gleixner1-15/+34
2022-12-05genirq/msi: Remove unused alloc/free interfacesThomas Gleixner1-7/+0
2022-12-05genirq/msi: Provide new domain id allocation functionsThomas Gleixner1-8/+10
2022-12-05genirq/msi: Provide new domain id based interfaces for freeing interruptsThomas Gleixner1-0/+9
2022-12-05genirq/msi: Make descriptor freeing domain awareThomas Gleixner1-2/+17
2022-12-05genirq/msi: Make descriptor allocation device domain awareThomas Gleixner1-1/+15
2022-12-05genirq/msi: Rename msi_add_msi_desc() to msi_insert_msi_desc()Thomas Gleixner1-1/+1
2022-12-05genirq/msi: Make msi_get_virq() device domain awareAhmed S. Darwish1-1/+13
2022-12-05genirq/msi: Make MSI descriptor iterators device domain awareThomas Gleixner1-6/+42
2022-12-05genirq/msi: Add pointers for per device irq domainsThomas Gleixner1-0/+3
2022-12-05genirq/msi: Move xarray into a separate struct and create an arrayThomas Gleixner2-2/+19
2022-12-05genirq/irqdomain: Provide IRQ_DOMAIN_FLAG_MSI_DEVICEThomas Gleixner1-0/+13
2022-12-05genirq/irqdomain: Provide IRQ_DOMAIN_FLAG_MSI_PARENTThomas Gleixner1-0/+14
2022-12-05genirq/msi: Create msi_api.hThomas Gleixner2-2/+19
2022-12-05genirq/irqdomain: Rename irq_domain::dev to irq_domain:: Pm_devThomas Gleixner1-3/+3
2022-12-05genirq/irqdomain: Make struct irqdomain readableThomas Gleixner1-37/+37
2022-12-05genirq/msi: Move IRQ_DOMAIN_MSI_NOMASK_QUIRK to MSI flagsThomas Gleixner2-8/+7
2022-12-05soc: fsl: qe: request pins non-exclusivelyDmitry Torokhov1-2/+3
2022-12-05Merge tag 'devfreq-next-for-6.2' of git://git.kernel.org/pub/scm/linux/kernel...Rafael J. Wysocki1-3/+4
2022-12-05xen: fix xen.h build for CONFIG_XEN_PVH=yJani Nikula1-2/+2
2022-12-05xen/virtio: Optimize the setup of "xen-grant-dma" devicesOleksandr Tyshchenko2-19/+1
2022-12-03Merge "ACPICA: Add CXL 3.0 structures..." into for-6.2/cxl-xorDan Williams5-5/+202
2022-12-03PCI/AER: Add optional logging callback for correctable errorDave Jiang1-0/+3
2022-12-03cxl/pci: add tracepoint events for CXL RASDave Jiang1-0/+112
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