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2006-03-22[ALSA] semaphore -> mutex (ISA part)Ingo Molnar4-7/+7
2006-03-22[ALSA] semaphore -> mutex (driver part)Ingo Molnar6-10/+13
2006-03-22[ALSA] semaphore -> mutex (core part)Ingo Molnar8-12/+12
2006-03-22[ALSA] Fix snd_xxx_t typedefsTakashi Iwai1-2/+2
2006-03-22[ALSA] PCM midlevel & PCM OSS - make procfs & OSS plugin code optionalJaroslav Kysela1-0/+2
2006-03-20Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6Linus Torvalds38-682/+3797
2006-03-20Merge branch 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/...Linus Torvalds6-29/+191
2006-03-20Merge branch 'block-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/v...Linus Torvalds2-5/+15
2006-03-20Merge branch 'master'Jeff Garzik10-86/+138
2006-03-20[SPARC64]: Fix 2 bugs in huge page support.David S. Miller1-0/+1
2006-03-20[SPARC64]: Optimized TSB table initialization.David S. Miller1-0/+1
2006-03-20[SPARC64]: Increase top of 32-bit process stack.David S. Miller1-2/+4
2006-03-20[SPARC64]: Top-down address space allocation for 32-bit tasks.David S. Miller2-1/+6
2006-03-20[SPARC64]: Fix and re-enable dynamic TSB sizing.David S. Miller1-12/+38
2006-03-20[SPARC64]: Fix system type in /proc/cpuinfo and remove bogus OBP check.David S. Miller1-21/+2
2006-03-20[SPARC64]: Add SMT scheduling support for Niagara.David S. Miller1-0/+2
2006-03-20[SPARC64]: Move over to sparsemem.David S. Miller4-11/+19
2006-03-20[SPARC64]: Fix new context version SMP handling.David S. Miller1-1/+3
2006-03-20[SPARC64]: Bulletproof MMU context locking.David S. Miller1-3/+3
2006-03-20[SPARC64]: Do not allow mapping pages within 4GB of 64-bit VA hole.David S. Miller2-2/+5
2006-03-20[SPARC64]: Kill bogus function externs in asm/pgtable.hDavid S. Miller1-24/+0
2006-03-20[SPARC64]: Fix bugs in SUN4V cpu mondo dispatch.David S. Miller1-0/+10
2006-03-20[SPARC64]: Use 13-bit context size always.David S. Miller1-13/+1
2006-03-20[SPARC64]: Niagara optimized XOR functions for RAID.David S. Miller1-4/+30
2006-03-20[SPARC64]: Fix TLB context allocation with SMT style shared TLBs.David S. Miller2-13/+13
2006-03-20[SPARC64]: Fix %tstate ASI handling in start_thread{,32}()David S. Miller1-3/+4
2006-03-20[SPARC64]: Create a seperate kernel TSB for 4MB/256MB mappings.David S. Miller1-0/+15
2006-03-20[SPARC64]: Add sun4v_cpu_yield().David S. Miller1-0/+3
2006-03-20[SPARC64]: Kill cpudata->idle_volume.David S. Miller1-1/+1
2006-03-20[SPARC64]: Export a PAGE_SHARED symbol.David S. Miller1-0/+1
2006-03-20[SPARC64] Fix build if CONFIG_HUGETLB_PAGE is not setFabio M. Di Nitto1-0/+2
2006-03-20[SPARC64]: More TLB/TSB handling fixes.David S. Miller2-6/+14
2006-03-20[SPARC64]: Define ARCH_HAS_READ_CURRENT_TIMER.David S. Miller1-0/+6
2006-03-20[SPARC64]: __bzero_noasi --> __clear_userDavid S. Miller1-8/+1
2006-03-20[SPARC64]: Add HWCAP_SPARC_BLKINIT elf capability flag for Niagara.David S. Miller1-5/+17
2006-03-20[SPARC64]: Fix uniprocessor IRQ targetting on SUN4V.David S. Miller2-4/+5
2006-03-20[SPARC64]: Get SUN4V SMP working.David S. Miller1-1/+1
2006-03-20[SPARC64]: Add GET_GL_GLOBAL() macro for SUN4V.David S. Miller1-0/+4
2006-03-20[SPARC64]: Add sun4v_cpu_qconf() hypervisor call.David S. Miller1-0/+6
2006-03-20[SPARC]: Kill off these __put_user_ret things.David S. Miller2-84/+0
2006-03-20[SPARC64]: Decode virtual-devices interrupts correctly.David S. Miller1-4/+2
2006-03-20[SPARC64]: Add prom_{start,stop}cpu_cpuid().David S. Miller1-3/+11
2006-03-20[SPARC64]: Fixup TSTATE layout diagram in asm/pstate.hDavid S. Miller1-2/+2
2006-03-20[SPARC64]: Fix gcc-3.3.x warnings.David S. Miller1-118/+25
2006-03-20[SPARC64]: Make error codes available from sun4v_intr_get*().David S. Miller1-3/+3
2006-03-20[SPARC64]: Fix comment typo in asm/hypervisor.hDavid S. Miller1-1/+1
2006-03-20[SPARC64]: Probe virtual-devices root node on sun4v.David S. Miller1-0/+18
2006-03-20[SPARC64]: Generic sun4v_build_irq().David S. Miller1-0/+1
2006-03-20[SPARC64]: Implement rest of generic interrupt hypervisor calls.David S. Miller1-0/+24
2006-03-20[SPARC64]: Move devino_to_sysino out of pci_sun4v_asm.SDavid S. Miller1-0/+5