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2021-11-03Merge tag 'clk-for-linus' of ↵Linus Torvalds2-0/+110
git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "The usual collection of clk driver updates and new driver additions. In terms of lines it's mainly Qualcomm and Mediatek code, supporting various SoCs and their multitude of clk controllers. New Drivers: - GCC and RPMcc support for Qualcomm QCM2290 SoCs - GCC support for Qualcomm MSM8994/MSM8992 SoCs - LPASSCC and CAMCC support for Qualcomm SC7280 SoCs - Support for Mediatek MT8195 SoCs - Initial clock driver for the Exynos850 SoC - Add i.MX8ULP clock driver and related bindings Updates: - Clock power management for new SAMA7G5 SoC - Updates to the master clock driver and sam9x60-pll to be able to use cpufreq-dt driver and avoid overclocking of CPU and MCK0 domains while changing the frequency via DVFS - Use ARRAY_SIZE in qcom clk drivers - Remove some impractical fallback parent names in qcom clk drivers - Make Mediatek clk drivers tristate - Refactoring of the CPU clock code and conversion of Samsung Exynos5433 CPU clock driver to the platform driver - A few conversions to devm_platform_ioremap_resource() - Updates of the Samsung Kconfig help text - Update video path realted clocks for Amlogic meson8 - Add SPI Multi I/O Bus and SDHI clocks and resets on Renesas RZ/G2L - Add SPI Multi I/O Bus (RPC) clocks on Renesas R-Car V3U - Add MediaLB clocks on Renesas R-Car H3, M3-W/W+, and M3-N - Remove unused helpers from i.MX specific clock header - Rework all i.MX clk based helpers to use clk_hw based ones - Rework i.MX gate/mux/divider wrappers - Rework imx_clk_hw_composite and imx_clk_hw_pll14xx wrappers - Update i.MX pllv4 and composite clocks to support i.MX8ULP - Disable i.MX7ULP composite clock during initialization - Add CLK_SET_RATE_NO_REPARENT flag to the i.MX7ULP composite - Disable the i.MX pfd when set pfdv2 clock rate - Add support for i.MX8ULP in pfdv2 - Add the pcc reset controller support on i.MX8ULP - Fix the build break when clk-imx8ulp is built as module - Move csi_sel mux to correct base register in i.MX6UL clock drivr - Fix csi clk gate register in i.MX6UL clock driver - Fix build bug making CLK_IMX8ULP select MXC_CLK - Add TPU (PWM), and Z (Cortex-A76) clocks on Renesas R-Car V3U - Add Ethernet clocks on Renesas RZ/G2L - Move Rockchip to use module_platform_probe - Enable usage of Coresight related clocks on Rockchip rk3399" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (170 commits) clk: use clk_core_get_rate_recalc() in clk_rate_get() clk: at91: sama7g5: set low limit for mck0 at 32KHz clk: at91: sama7g5: remove prescaler part of master clock clk: at91: clk-master: add notifier for divider clk: at91: clk-sam9x60-pll: add notifier for div part of PLL clk: at91: clk-master: fix prescaler logic clk: at91: clk-master: mask mckr against layout->mask clk: at91: clk-master: check if div or pres is zero clk: at91: sam9x60-pll: use DIV_ROUND_CLOSEST_ULL clk: at91: pmc: add sama7g5 to the list of available pmcs clk: at91: clk-master: improve readability by using local variables clk: at91: clk-master: add register definition for sama7g5's master clock clk: at91: sama7g5: add securam's peripheral clock clk: at91: pmc: execute suspend/resume only for backup mode clk: at91: re-factor clocks suspend/resume clk: ux500: Add driver for the reset portions of PRCC dt-bindings: clock: u8500: Rewrite in YAML and extend clk: composite: Use rate_ops.determine_rate when also a mux is available clk: samsung: describe drivers in Kconfig clk: samsung: exynos5433: update apollo and atlas clock probing ...
2021-11-02Merge branches 'clk-imx', 'clk-ux500' and 'clk-debugfs' into clk-nextStephen Boyd2-0/+110
* clk-imx: (21 commits) clk: imx: Make CLK_IMX8ULP select MXC_CLK clk: imx: imx6ul: Fix csi clk gate register clk: imx: imx6ul: Move csi_sel mux to correct base register clk: imx: Fix the build break when clk-imx8ulp build as module clk: imx: Add the pcc reset controller support on imx8ulp clk: imx: Add clock driver for imx8ulp clk: imx: Update the pfdv2 for 8ulp specific support clk: imx: disable the pfd when set pfdv2 clock rate clk: imx: Add 'CLK_SET_RATE_NO_REPARENT' for composite-7ulp clk: imx: disable i.mx7ulp composite clock during initialization clk: imx: Update the compsite driver to support imx8ulp clk: imx: Update the pllv4 to support imx8ulp dt-bindings: clock: Add imx8ulp clock support clk: imx: Rework imx_clk_hw_pll14xx wrapper clk: imx: Rework all imx_clk_hw_composite wrappers clk: imx: Rework all clk_hw_register_divider wrappers clk: imx: Rework all clk_hw_register_mux wrappers clk: imx: Rework all clk_hw_register_gate2 wrappers clk: imx: Rework all clk_hw_register_gate wrappers clk: imx: Make mux/mux2 clk based helpers use clk_hw based ones ... * clk-ux500: clk: ux500: Add driver for the reset portions of PRCC dt-bindings: clock: u8500: Rewrite in YAML and extend * clk-debugfs: clk: use clk_core_get_rate_recalc() in clk_rate_get()
2021-10-26dt-bindings: clock: u8500: Rewrite in YAML and extendLinus Walleij1-0/+51
This rewrites the ux500/u8500 clock bindings in YAML schema and extends them with the PRCC reset controller. The bindings are a bit idiomatic but it just reflects their age, the ux500 platform was used as guinea pig for early device tree conversion of platforms in 2015. The new subnode for the reset controller follows the pattern of the old bindings and adds a node with reset-cells for this. Cc: devicetree@vger.kernel.org Cc: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20210921184803.1757916-1-linus.walleij@linaro.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-10-08arm64: dts: mt8183: Add the mmsys reset bit to reset the dsi0Enric Balletbo i Serra1-0/+3
Reset the DSI hardware is needed to prevent different settings between the bootloader and the kernel. While here, also remove the undocumented and also not used 'mediatek,syscon-dsi' property. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210930103105.v4.5.I933f1532d7a1b2910843a9644c86a7d94a4b44e1@changeid Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-10-08arm64: dts: mt8173: Add the mmsys reset bit to reset the dsi0Enric Balletbo i Serra1-0/+2
Reset the DSI hardware is needed to prevent different settings between the bootloader and the kernel. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210930103105.v4.4.I7bd7d9a8da5e2894711b700a1127e6902a2b2f1d@changeid Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-10-08arm64: dts: mediatek: Move reset controller constants into common locationEnric Balletbo i Serra3-0/+150
The DT binding includes for reset controllers are located in include/dt-bindings/reset/. Move the Mediatek reset constants in there. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Link: https://lore.kernel.org/r/20210930103105.v4.1.I514d9aafff3a062f751b37d3fea7402f67595b86@changeid Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-09-30dt-bindings: clock: Add imx8ulp clock supportJacky Bai1-0/+59
Add the clock dt-binding file for i.MX8ULP. For pcc node, it will also be used as a reset controller, so add the '#reset-cells' property description and add the pcc reset IDs. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Link: https://lore.kernel.org/r/20210914065208.3582128-2-ping.bai@nxp.com Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
2021-09-07Merge tag 'linux-watchdog-5.15-rc1' of ↵Linus Torvalds1-0/+29
git://www.linux-watchdog.org/linux-watchdog Pull watchdog updates from Wim Van Sebroeck: - add Mediatek MT7986 & MT8195 wdt support - add Maxim MAX63xx - drop bd70528 support - rewrite ixp4xx to watchdog framework - constify static struct watchdog_ops for sl28cpld_wdt, mpc8xxx_wdt and tqmx86 - introduce watchdog_dev_suspend/resume - several fixes and improvements * tag 'linux-watchdog-5.15-rc1' of git://www.linux-watchdog.org/linux-watchdog: dt-bindings: watchdog: Add compatible for Mediatek MT7986 watchdog: ixp4xx: Rewrite driver to use core watchdog: Start watchdog in watchdog_set_last_hw_keepalive only if appropriate watchdog: max63xx_wdt: Add device tree probing dt-bindings: watchdog: Add Maxim MAX63xx bindings watchdog: mediatek: mt8195: add wdt support dt-bindings: reset: mt8195: add toprgu reset-controller header file watchdog: tqmx86: Constify static struct watchdog_ops watchdog: mpc8xxx_wdt: Constify static struct watchdog_ops watchdog: sl28cpld_wdt: Constify static struct watchdog_ops watchdog: iTCO_wdt: Fix detection of SMI-off case watchdog: bcm2835_wdt: consider system-power-controller property watchdog: imx2_wdg: notify wdog core to stop ping worker on suspend watchdog: introduce watchdog_dev_suspend/resume watchdog: Fix NULL pointer dereference when releasing cdev watchdog: only run driver set_pretimeout op if device supports it watchdog: bd70528 drop bd70528 support
2021-08-22dt-bindings: reset: mt8195: add toprgu reset-controller header fileChristine Zhu1-0/+29
Add toprgu reset-controller header file for MT8195 platform. Signed-off-by: Christine Zhu <Christine.Zhu@mediatek.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Link: https://lore.kernel.org/r/20210726122901.12195-3-Christine.Zhu@mediatek.com Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
2021-07-21dt-bindings: reset: pdc: Add PDC Global bindingsSibi Sankar1-0/+2
Add PDC Global reset controller bindings for SC7280 SoCs. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/1619693465-5724-4-git-send-email-sibis@codeaurora.org Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2021-06-28dt-bindings: reset: add MCU HOLD BOOT ID for SCMI reset domains on stm32mp15Gabriel Fernandez1-0/+2
Add ID to SCMI0 to exposes reset controller for the MCU HOLD BOOT resource. Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210617051814.12018-10-gabriel.fernandez@foss.st.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-06-28dt-bindings: reset: add IDs for SCMI reset domains on stm32mp15Gabriel Fernandez1-0/+13
stm32mp15 TZ secure firmware provides SCMI reset domains for secure resources. This change defines the SCMI reset domain identifiers used by SCMI agents and servers. Stm32mp15 TZ secure firmware provides SCMI clocks for oscillators, some PLL output and few secure aware interfaces. This change defines the SCMI clock identifiers used by SCMI agents and servers. Server SCMI0 exposes reset controllers for resources under RCC[TZEN] configuration control. Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210617051814.12018-9-gabriel.fernandez@foss.st.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-02-26Merge tag 'riscv-for-linus-5.12-mw0' of ↵Linus Torvalds1-0/+42
git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V updates from Palmer Dabbelt: "A handful of new RISC-V related patches for this merge window: - A check to ensure drivers are properly using uaccess. This isn't manifesting with any of the drivers I'm currently using, but may catch errors in new drivers. - Some preliminary support for the FU740, along with the HiFive Unleashed it will appear on. - NUMA support for RISC-V, which involves making the arm64 code generic. - Support for kasan on the vmalloc region. - A handful of new drivers for the Kendryte K210, along with the DT plumbing required to boot on a handful of K210-based boards. - Support for allocating ASIDs. - Preliminary support for kernels larger than 128MiB. - Various other improvements to our KASAN support, including the utilization of huge pages when allocating the KASAN regions. We may have already found a bug with the KASAN_VMALLOC code, but it's passing my tests. There's a fix in the works, but that will probably miss the merge window. * tag 'riscv-for-linus-5.12-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (75 commits) riscv: Improve kasan population by using hugepages when possible riscv: Improve kasan population function riscv: Use KASAN_SHADOW_INIT define for kasan memory initialization riscv: Improve kasan definitions riscv: Get rid of MAX_EARLY_MAPPING_SIZE soc: canaan: Sort the Makefile alphabetically riscv: Disable KSAN_SANITIZE for vDSO riscv: Remove unnecessary declaration riscv: Add Canaan Kendryte K210 SD card defconfig riscv: Update Canaan Kendryte K210 defconfig riscv: Add Kendryte KD233 board device tree riscv: Add SiPeed MAIXDUINO board device tree riscv: Add SiPeed MAIX GO board device tree riscv: Add SiPeed MAIX DOCK board device tree riscv: Add SiPeed MAIX BiT board device tree riscv: Update Canaan Kendryte K210 device tree dt-bindings: add resets property to dw-apb-timer dt-bindings: fix sifive gpio properties dt-bindings: update sifive uart compatible string dt-bindings: update sifive clint compatible string ...
2021-01-28clk: sunxi-ng: Add support for the Allwinner H616 CCUAndre Przywara1-0/+70
While the clocks are fairly similar to the H6, many differ in tiny details, so a separate clock driver seems indicated. Derived from the H6 clock driver, and adjusted according to the manual. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20210127172500.13356-4-andre.przywara@arm.com
2021-01-14dt-bindings: reset: Document canaan,k210-rst bindingsDamien Le Moal1-0/+42
Document the device tree bindings for the Canaan Kendryte K210 SoC reset controller driver in Documentation/devicetree/bindings/reset/canaan,k210-rst.yaml. The header file include/dt-bindings/reset/k210-rst.h is added to define all possible reset lines of the SoC. Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2021-01-06clk: sunxi-ng: h6-r: Add R_APB2_RSB clock and resetSamuel Holland1-0/+1
While no information about the H6 RSB controller is included in the datasheet or manual, the vendor BSP and power management blob both reference the RSB clock parent and register address. These values were verified by experimentation. Since this clock/reset are added late, the specifier is added at the end to maintain the existing DT binding. The code is kept in register order. Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2020-11-17mips: bmips: add BCM6318 reset controller definitionsÁlvaro Fernández Rojas1-0/+20
BCM6318 SoCs have a reset controller for certain components. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Acked-by: Florian Fainelli <F.fainelli@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-11-17mips: bmips: dts: add BCM63268 reset controller supportÁlvaro Fernández Rojas1-0/+26
BCM63268 SoCs have a reset controller for certain components. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-11-17mips: bmips: dts: add BCM6368 reset controller supportÁlvaro Fernández Rojas1-0/+16
BCM6368 SoCs have a reset controller for certain components. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-11-17mips: bmips: dts: add BCM6362 reset controller supportÁlvaro Fernández Rojas1-0/+22
BCM6362 SoCs have a reset controller for certain components. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-11-17mips: bmips: dts: add BCM6358 reset controller supportÁlvaro Fernández Rojas1-0/+15
BCM6358 SoCs have a reset controller for certain components. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-11-17mips: bmips: dts: add BCM6328 reset controller supportÁlvaro Fernández Rojas1-0/+18
BCM6328 SoCs have a reset controller for certain components. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-10-24Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds1-0/+10
Pull ARM Devicetree updates from Olof Johansson: "As usual, most of the changes are to devicetrees. Besides smaller fixes, some refactorings and cleanups, some of the new platforms and chips (or significant features) supported are below: Broadcom boards: - Cisco Meraki MR32 (BCM53016-based) - BCM2711 (RPi4) display pipeline support Actions Semi boards: - Caninos Loucos Labrador SBC (S500-based) - RoseapplePi SBC (S500-based) Allwinner SoCs/boards: - A100 SoC with Perf1 board - Mali, DMA, Cetrus and IR support for R40 SoC Amlogic boards: - Libretch S905x CC V2 board - Hardkernel ODROID-N2+ board Aspeed boards/platforms: - Wistron Mowgli (AST2500-based, Power9 OpenPower server) - Facebook Wedge400 (AST2500-based, ToR switch) Hisilicon SoC: - SD5203 SoC Nvidia boards: - Tegra234 VDK, for pre-silicon Orin SoC NXP i.MX boards: - Librem 5 phone - i.MX8MM DDR4 EVK - Variscite VAR-SOM-MX8MN SoM - Symphony board - Tolino Shine 2 HD - TQMa6 SoM - Y Soft IOTA Orion Rockchip boards: - NanoPi R2S board - A95X-Z2 board - more Rock-Pi4 variants STM32 boards: - Odyssey SOM board (STM32MP157CAC-based) - DH DRC02 board Toshiba SoCs/boards: - Visconti SoC and TPMV7708 board" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (638 commits) ARM: dts: nspire: Fix SP804 users arm64: dts: lg: Fix SP804 users arm64: dts: lg: Fix SP805 clocks ARM: mstar: Fix up the fallout from moving the dts/dtsi files ARM: mstar: Add mstar prefix to all of the dtsi/dts files ARM: mstar: Add interrupt to pm_uart ARM: mstar: Add interrupt controller to base dtsi ARM: dts: meson8: remove two invalid interrupt lines from the GPU node arm64: dts: ti: k3-j7200-common-proc-board: Add USB support arm64: dts: ti: k3-j7200-common-proc-board: Configure the SERDES lane function arm64: dts: ti: k3-j7200-main: Add USB controller arm64: dts: ti: k3-j7200-main.dtsi: Add USB to SERDES lane MUX arm64: dts: ti: k3-j7200-main: Add SERDES lane control mux dt-bindings: ti-serdes-mux: Add defines for J7200 SoC ARM: dts: hisilicon: add SD5203 dts ARM: dts: hisilicon: fix the system controller compatible nodes arm64: dts: zynqmp: Fix leds subnode name for zcu100/ultra96 v1 arm64: dts: zynqmp: Remove undocumented u-boot properties arm64: dts: zynqmp: Remove additional compatible string for i2c IPs arm64: dts: zynqmp: Rename buses to be align with simple-bus yaml ...
2020-10-24Merge tag 'armsoc-drivers' of ↵Linus Torvalds2-1/+109
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC-related driver updates from Olof Johansson: "Various driver updates for platforms. A bulk of this is smaller fixes or cleanups, but some of the new material this time around is: - Support for Nvidia Tegra234 SoC - Ring accelerator support for TI AM65x - PRUSS driver for TI platforms - Renesas support for R-Car V3U SoC - Reset support for Cortex-M4 processor on i.MX8MQ There are also new socinfo entries for a handful of different SoCs and platforms" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (131 commits) drm/mediatek: reduce clear event soc: mediatek: cmdq: add clear option in cmdq_pkt_wfe api soc: mediatek: cmdq: add jump function soc: mediatek: cmdq: add write_s_mask value function soc: mediatek: cmdq: add write_s value function soc: mediatek: cmdq: add read_s function soc: mediatek: cmdq: add write_s_mask function soc: mediatek: cmdq: add write_s function soc: mediatek: cmdq: add address shift in jump soc: mediatek: mtk-infracfg: Fix kerneldoc soc: amlogic: pm-domains: use always-on flag reset: sti: reset-syscfg: fix struct description warnings reset: imx7: add the cm4 reset for i.MX8MQ dt-bindings: reset: imx8mq: add m4 reset reset: Fix and extend kerneldoc reset: reset-zynqmp: Added support for Versal platform dt-bindings: reset: Updated binding for Versal reset driver reset: imx7: Support module build soc: fsl: qe: Remove unnessesary check in ucc_set_tdm_rxtx_clk soc: fsl: qman: convert to use be32_add_cpu() ...
2020-10-22Merge tag 'clk-for-linus' of ↵Linus Torvalds2-0/+86
git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "This contains no changes to the core framework. It is a collection of various clk driver updates. The biggest driver updates in terms of lines of code is the Allwinner driver, closely followed by the Qualcomm and Mediatek drivers. All of those hit high because we add so many lines of clk data. Coming in fourth place is i.MX which also adds a bunch of clk data. This accounts for the new driver additions this time around. Otherwise the patches are lots of little cleanups and fixes for various clk drivers that have baked in linux-next for a while. I suppose one highlight or theme is that more clk drivers are being updated to work as modules, which is interesting to see such critical SoC infrastructure work as a loadable module. New Drivers: - Support qcom SM8150/SM8250 video and display clks - Support Mediatek MT8167 clks - Add clock for CRC block found on vf610 SoCs - Add support for the Renesas R-Car V3U (R8A779A0) SoC - Add support for the VSP for Resizing clock on Renesas RZ/G1H - Support Allwinner A100 SoC clks Removed Drivers: - Remove i.MX21 clock driver, as i.MX21 platform support is being dropped Updates: - Change how qcom's display port clks work - Small non-critical fixes for TI clk driver - Remove various unused variables in clk drivers - Allow Rockchip clk driver to be a module - Remove most __clk_lookup() calls in Samsung drivers (yay!) - Support building i.MX ARMv8 platforms clock driver as module - Some kerneldoc fixes here and there - A couple of minor i.MX clk data corrections - Update audio clock inverter and fdiv2 flag on Amlogic g12 - Make amlogic clk drivers configurable in Kconfig - Fix Renesas VSP clock names to match corrected hardware documentation - Sigma-delta modulation on Allwinner R40 - Various fixes for at91 clk driver - Use semicolons instead of commas in some places - Mark some variables const so they can move to RO memory" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (102 commits) clk: imx8mq: Fix usdhc parents order clk: qcom: gdsc: Keep RETAIN_FF bit set if gdsc is already on clk: Restrict CLK_HSDK to ARC_SOC_HSDK clk: at91: sam9x60: support only two programmable clocks clk: ingenic: Respect CLK_SET_RATE_PARENT in .round_rate clk: ingenic: Don't tag custom clocks with CLK_SET_RATE_PARENT clk: ingenic: Don't use CLK_SET_RATE_GATE for PLL clk: ingenic: Use readl_poll_timeout instead of custom loop clk: ingenic: Use to_clk_info() macro for all clocks clk: bcm2835: add missing release if devm_clk_hw_register fails clk: at91: clk-sam9x60-pll: remove unused variable clk: at91: clk-main: update key before writing AT91_CKGR_MOR clk: at91: remove the checking of parent_name clk: clk-prima2: fix return value check in prima2_clk_init() clk: mmp2: Fix the display clock divider base clk: pxa: Constify static struct clk_ops clk: baikal-t1: Mark Ethernet PLL as critical clk: qoriq: modify MAX_PLL_DIV to 32 clk: axi-clkgen: Set power bits for fractional mode clk: axi-clkgen: Add support for fractional dividers ...
2020-09-23dt-bindings: reset: imx8mq: add m4 resetPeng Fan1-1/+4
Add the m4 reset used by the remoteproc driver Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2020-09-23dt-bindings: reset: Updated binding for Versal reset driverSai Krishna Potthuri1-0/+105
Added documentation and Versal reset indices to describe about Versal reset driver bindings. In Versal all reset indices includes Class, SubClass, Type, Index information whereas class refers to clock, reset, power etc., Underlying firmware in Versal have such classification and expects the ID to be this way. [13:0] - Index bits [19:14] - Type bits [25:20] - SubClass bits [31:26] - Class bits. Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2020-09-18arm64: tegra: Initial Tegra234 VDK supportThierry Reding1-0/+10
The NVIDIA Tegra234 VDK is a simulation platform for the Orin SoC. It supports a subset of the peripherals that will be available in the final chip and serves as a bootstrapping platform. Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-08-25clk: sunxi-ng: add support for the Allwinner A100 CCUYangtao Li2-0/+86
Add support for a100 in the sunxi-ng CCU framework. Signed-off-by: Yangtao Li <frank@allwinnertech.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1eb41bf6c966a0e54820200650d27a5d4f2ac160.1595572867.git.frank@allwinnertech.com
2020-08-18dt-bindings: reset: Add a binding for the RPi Firmware reset controllerNicolas Saenz Julienne1-0/+13
The firmware running on the RPi VideoCore can be used to reset and initialize HW controlled by the firmware. Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Link: https://lore.kernel.org/r/20200629161845.6021-2-nsaenzjulienne@suse.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-08-12Merge tag 'clk-for-linus' of ↵Linus Torvalds1-0/+67
git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull more clk updates from Stephen Boyd: "Here's some more updates that missed the last pull request because I happened to tag the tree at an earlier point in the history of clk-next. I must have fat fingered it and checked out an older version of clk-next on this second computer I'm using. This time it actually includes more code for Qualcomm SoCs, the AT91 major updates, and some Rockchip SoC clk driver updates as well. I've corrected this flow so this shouldn't happen again" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (83 commits) clk: bcm2835: Do not use prediv with bcm2711's PLLs clk: drop unused function __clk_get_flags clk: hsdk: Fix bad dependency on IOMEM dt-bindings: clock: Fix YAML schemas for LPASS clocks on SC7180 clk: mmp: avoid missing prototype warning clk: sparx5: Add Sparx5 SoC DPLL clock driver dt-bindings: clock: sparx5: Add bindings include file clk: qoriq: add LS1021A core pll mux options clk: clk-atlas6: fix return value check in atlas6_clk_init() clk: tegra: pll: Improve PLLM enable-state detection clk: X1000: Add support for calculat REFCLK of USB PHY. clk: JZ4780: Reformat the code to align it. clk: JZ4780: Add functions for enable and disable USB PHY. clk: Ingenic: Add RTC related clocks for Ingenic SoCs. dt-bindings: clock: Add tabs to align code. dt-bindings: clock: Add RTC related clocks for Ingenic SoCs. clk: davinci: Use fallthrough pseudo-keyword clk: imx: Use fallthrough pseudo-keyword clk: qcom: gcc-sdm660: Fix up gcc_mss_mnoc_bimc_axi_clk clk: qcom: gcc-sdm660: Add missing modem reset ...
2020-07-21dt-bindings: reset: Add binding constants for Actions S500 RMUCristian Ciocaltea1-0/+67
Add device tree binding constants for Actions Semi S500 SoC Reset Management Unit (RMU). Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Link: https://lore.kernel.org/r/daf615160b3be9f38dcf7926cc82128c9c2d73e3.1593788312.git.cristian.ciocaltea@gmail.com Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-07-20reset: Replace HTTP links with HTTPS onesAlexander A. Klimov1-1/+1
Rationale: Reduces attack surface on kernel devs opening the links for MITM as HTTPS traffic is much harder to manipulate. Deterministic algorithm: For each file: If not .svg: For each line: If doesn't contain `\bxmlns\b`: For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`: If both the HTTP and HTTPS versions return 200 OK and serve the same content: Replace HTTP with HTTPS. Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2020-06-10Merge tag 'clk-for-linus' of ↵Linus Torvalds2-0/+135
git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "This time around we have four lines of diff in the core framework, removing a function that isn't used anymore. Otherwise the main new thing for the common clk framework is that it is selectable in the Kconfig language now. Hopefully this will let clk drivers and clk consumers be testable on more than the architectures that support the clk framework. The goal is to introduce some Kunit tests for the framework. Outside of the core framework we have the usual set of various driver updates and non-critical fixes. The dirstat shows that the new Baikal-T1 driver is the largest addition this time around in terms of lines of code. After that the x86 (Intel), Qualcomm, and Mediatek drivers introduce many lines to support new or upcoming SoCs. After that the dirstat shows the usual suspects working on their SoC support by fixing minor bugs, correcting data and converting some of their DT bindings to YAML. Core: - Allow the COMMON_CLK config to be selectable New Drivers: - Clk driver for Baikal-T1 SoCs - Mediatek MT6765 clock support - Support for Intel Agilex clks - Add support for X1830 and X1000 Ingenic SoC clk controllers - Add support for the new Renesas RZ/G1H (R8A7742) SoC - Add support for Qualcomm's MSM8939 Generic Clock Controller Updates: - Support IDT VersaClock 5P49V5925 - Bunch of updates for HSDK clock generation unit (CGU) driver - Start making audio and GPU clks work on Marvell MMP2/MMP3 SoCs - Add some GPU, NPU, and UFS clks to Qualcomm SM8150 driver - Enable supply regulators for GPU gdscs on Qualcomm SoCs - Add support for Si5342, Si5344 and Si5345 chips - Support custom flags in Xilinx zynq firmware - Various small fixes to the Xilinx clk driver - A single minor rounding fix for the legacy Allwinner clock support - A few patches from Abel Vesa as preparation of adding audiomix clock support on i.MX - A couple of cleanups from Anson Huang for i.MX clk-sscg-pll and clk-pllv3 drivers - Drop dependency on ARM64 for i.MX8M clock driver, to support aarch32 mode on aarch64 hardware - A series from Peng Fan to improve i.MX8M clock drivers, using composite clock for core and bus clk slice - Set a better parent clock for flexcan on i.MX6UL to support CiA102 defined bit rates - A couple changes for EMC frequency scaling on Tegra210 - Support for CPU frequency scaling on Tegra20/Tegra30 - New clk gate for CSI test pattern generator on Tegra210 - Regression fixes for Samsung exynos542x and exynos5433 SoCs - Use of fallthrough; attribute for Samsung s3c24xx - Updates and fixup HDMI and video clocks on Meson8b - Fixup reset polarity on Meson8b - Fix GPU glitch free mux switch on Meson gx and g12 - A minor fix for the currently unused suspend/resume handling on Renesas RZ/A1 and RZ/A2 - Two more conversions of Renesas DT bindings to json-schema - Add support for the USB 2.0 clock selector on Renesas R-Car M3-W+" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (155 commits) clk: mediatek: Remove ifr{0,1}_cfg_regs structures clk: baikal-t1: remove redundant assignment to variable 'divider' clk: baikal-t1: fix spelling mistake "Uncompatible" -> "Incompatible" dt-bindings: clock: Add a missing include to MMP Audio Clock binding dt: Add bindings for IDT VersaClock 5P49V5925 clk: vc5: Add support for IDT VersaClock 5P49V6965 clk: Add Baikal-T1 CCU Dividers driver clk: Add Baikal-T1 CCU PLLs driver dt-bindings: clk: Add Baikal-T1 CCU Dividers binding dt-bindings: clk: Add Baikal-T1 CCU PLLs binding clk: mediatek: assign the initial value to clk_init_data of mtk_mux clk: mediatek: Add MT6765 clock support clk: mediatek: add mt6765 clock IDs dt-bindings: clock: mediatek: document clk bindings vcodecsys for Mediatek MT6765 SoC dt-bindings: clock: mediatek: document clk bindings mipi0a for Mediatek MT6765 SoC dt-bindings: clock: mediatek: document clk bindings for Mediatek MT6765 SoC CLK: HSDK: CGU: add support for 148.5MHz clock CLK: HSDK: CGU: support PLL bypassing CLK: HSDK: CGU: check if PLL is bypassed first clk: clk-si5341: Add support for the Si5345 series ...
2020-06-04Merge tag 'arm-dt-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds2-0/+77
Pull ARM devicetree updates from Arnd Bergmann: "This is the set of device tree changes, mostly covering new hardware support, with 577 patches touching a little over 500 files. There are five new Arm SoCs supported in this release, all of them for existing SoC families: - Realtek RTD1195, RTD1395 and RTD1619 -- three SoCs used in both NAS devices and Android Set-top-box designs, along with the "Horseradish", "Lion Skin" and "Mjolnir" reference platforms; the Mele X1000 and Xnano X5 set-top-boxes and the Banana Pi BPi-M4 single-board computer. - Renesas RZ/G1H (r8a7742) -- a high-end 32-bit industrial SoC and the iW-RainboW-G21D-Qseven-RZG1H board/SoM - Rockchips RK3326 -- low-end 64-bit SoC along with the Odroid-GO Advance game console Newly added machines on already supported SoCs are: - AMLogic S905D based Smartlabs SML-5442TW TV box - AMLogic S905X3 based ODROID-C4 SBC - AMLogic S922XH based Beelink GT-King Pro TV box - Allwinner A20 based Olimex A20-OLinuXino-LIME-eMMC SBC - Aspeed ast2500 based BMCs in Facebook x86 "Yosemite V2" and YADRO OpenPower P9 "Nicole" - Marvell Kirkwood based Check Point L-50 router - Mediatek MT8173 based Elm/Hana Chromebook laptops - Microchip SAMA5D2 "Industrial Connectivity Platform" reference board - NXP i.MX8m based Beacon i.MX8m-Mini SoM development kit - Octavo OSDMP15x based Linux Automation MC-1 development board - Qualcomm SDM630 based Xiaomi Redmi Note 7 phone - Realtek RTD1295 based Xnano X5 TV Box - STMicroelectronics STM32MP1 based Stinger96 single-board computer and IoT Box - Samsung Exynos4210 based based Samsung Galaxy S2 phone - Socionext Uniphier based Akebi96 SBC - TI Keystone based K2G Evaluation board - TI am5729 based Beaglebone-AI development board Include device descriptions for additional hardware support in existing SoCs and machines based on all major SoC platforms: - AMlogic Meson - Allwinner sunxi - Arm Juno/VFP/Vexpress/Integrator - Broadcom bcm283x/bcm2711 - Hisilicon hi6220 - Marvell EBU - Mediatek MT27xx, MT76xx, MT81xx and MT67xx - Microchip SAMA5D2 - NXP i.MX6/i.MX7/i.MX8 and Layerscape - Nvidia Tegra - Qualcomm Snapdragon - Renesas r8a77961, r8a7791 - Rockchips RK32xx/RK33xx - ST-Ericsson ux500 - STMicroelectronics SMT32 - Samsung Exynos and S5PV210 - Socionext Uniphier - TI OMAP5/DRA7 and Keystone" * tag 'arm-dt-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (564 commits) ARM: dts: keystone: Rename "msmram" node to "sram" arm: dts: mt2712: add uart APDMA to device tree arm64: dts: mt8183: add mmc node arm64: dts: mt2712: add ethernet device node arm64: tegra: Make the RTC a wakeup source on Jetson Nano and TX1 ARM: dts: mmp3: Add the fifth SD HCI ARM: dts: berlin*: Fix up the SDHCI node names ARM: dts: mmp3: Fix USB & USB PHY node names ARM: dts: mmp3: Fix L2 cache controller node name ARM: dts: mmp*: Fix up encoding of the /rtc interrupts property ARM: dts: pxa*: Fix up encoding of the /rtc interrupts property ARM: dts: pxa910: Fix the gpio interrupt cell number ARM: dts: pxa3xx: Fix up encoding of the /gpio interrupts property ARM: dts: pxa168: Fix the gpio interrupt cell number ARM: dts: pxa168: Add missing address/size cells to i2c nodes ARM: dts: dove: Fix interrupt controller node name ARM: dts: kirkwood: Fix interrupt controller node name arm64: dts: Add SC9863A emmc and sd card nodes arm64: dts: Add SC9863A clock nodes arm64: dts: mt6358: add PMIC MT6358 related nodes ...
2020-06-01Merge branches 'clk-vc5', 'clk-hsdk', 'clk-mediatek' and 'clk-baikal' into ↵Stephen Boyd1-0/+25
clk-next - Support IDT VersaClock 5P49V5925 - Bunch of updates for HSDK clock generation unit (CGU) driver - New clk driver for Baikal-T1 SoCs * clk-vc5: dt: Add bindings for IDT VersaClock 5P49V5925 clk: vc5: Add support for IDT VersaClock 5P49V6965 * clk-hsdk: CLK: HSDK: CGU: add support for 148.5MHz clock CLK: HSDK: CGU: support PLL bypassing CLK: HSDK: CGU: check if PLL is bypassed first * clk-mediatek: clk: mediatek: assign the initial value to clk_init_data of mtk_mux clk: mediatek: Add MT6765 clock support clk: mediatek: add mt6765 clock IDs dt-bindings: clock: mediatek: document clk bindings vcodecsys for Mediatek MT6765 SoC dt-bindings: clock: mediatek: document clk bindings mipi0a for Mediatek MT6765 SoC dt-bindings: clock: mediatek: document clk bindings for Mediatek MT6765 SoC * clk-baikal: clk: Add Baikal-T1 CCU Dividers driver clk: Add Baikal-T1 CCU PLLs driver dt-bindings: clk: Add Baikal-T1 CCU Dividers binding dt-bindings: clk: Add Baikal-T1 CCU PLLs binding
2020-05-30dt-bindings: clk: Add Baikal-T1 CCU Dividers bindingSerge Semin1-0/+25
After being gained by the CCU PLLs the signals must be transformed to be suitable for the clock-consumers. This is done by a set of dividers embedded into the CCU. A first block of dividers is used to create reference clocks for AXI-bus of high-speed peripheral IP-cores of the chip. The second block dividers alter the PLLs output signals to be then consumed by SoC peripheral devices. Both block DT nodes are ordinary clock-providers with standard set of properties supported. But in addition to that each clock provider can be used to reset the corresponding clock domain. This makes the AXI-bus and System Devices CCU DT nodes to be also reset-providers. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> Cc: Arnd Bergmann <arnd@arndb.de> Cc: linux-mips@vger.kernel.org Link: https://lore.kernel.org/r/20200526222056.18072-3-Sergey.Semin@baikalelectronics.ru Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-05-26Merge tag 'amlogic-dt64' of ↵Arnd Bergmann1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt arm64: dts: Amlogic updates for v5.8 Highlights: - new boards :Beelink GT-King Pro (G12B SoC), Smartlabs SML-5442TW (S905D), Hardkernel ODROID-C4 (SM1) - audio: support for GX-family SoCs - audio: internal DAC support - use the new USB control driver for GXL and GXM * tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: (33 commits) arm64: dts: meson-g12b-gtking-pro: add initial device-tree dt-bindings: arm: amlogic: add support for the Beelink GT-King Pro arm64: dts: meson-g12b-gtking: add initial device-tree dt-bindings: arm: amlogic: add support for the Beelink GT-King arm64: dts: meson: convert ugoos-am6 to common w400 dtsi arm64: dts: meson: add ethernet interrupt to wetek dtsi arm64: dts: meson: add support for the Smartlabs SML-5442TW dt-bindings: arm: amlogic: add support for the Smartlabs SML-5442TW dt-bindings: add vendor prefix for Smartlabs LLC arm64: dts: meson: g12: add internal DAC glue arm64: dts: meson: g12: add internal DAC arm64: dts: meson: libretech-pc: add internal DAC support arm64: dts: meson: libretech-ac: add internal DAC support arm64: dts: meson: libretech-cc: add internal DAC support arm64: dts: meson: p230-q200: add internal DAC support arm64: dts: meson: gxl: add acodec support arm64: dts: meson-sm1: add support for Hardkernel ODROID-C4 dt-bindings: arm: amlogic: add odroid-c4 bindings arm64: dts: meson-sm1: add cpu thermal nodes arm64: dts: meson-g12b: move G12B thermal nodes to meson-g12b.dtsi ... Link: https://lore.kernel.org/r/5ec6f56a.1c69fb81.fc5d5.9ca6@mx.google.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-14clk: qcom: Add DT bindings for MSM8939 GCCBryan O'Donoghue1-0/+110
Add compatible strings and the include files for the MSM8939 GCC. Cc: Andy Gross <agross@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: linux-arm-msm@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Tested-by: Vincent Knecht <vincent.knecht@mailoo.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Link: https://lkml.kernel.org/r/20200512115023.2856617-2-bryan.odonoghue@linaro.org Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-05-06dt-bindings: reset: meson: add gxl internal dac resetJerome Brunet1-1/+1
Add the reset line of the internal DAC found on the amlogic gxl SoC family Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2020-05-06dt-bindings: reset: imx7: Document usage on i.MX8MP SoCAnson Huang1-0/+50
The driver now supports i.MX8MP, so update bindings accordingly. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2020-05-06dt-bindings: reset: imx7: Add support for i.MX8MNAnson Huang1-28/+28
i.MX8MN can reuse i.MX8MQ's reset driver, update the compatible property and related info to support i.MX8MN. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2020-04-12dt-bindings: reset: rtd1295: Add SB2 resetAndreas Färber1-0/+3
Add a constant for reset3 SB2, based on downstream crt_sys_reg.h. Acked-by: Rob Herring <robh@kernel.org> Acked-by: James Tai <james.tai@realtek.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2020-04-12dt-bindings: reset: Add Realtek RTD1195Andreas Färber1-0/+74
Add a header with symbolic reset indices for Realtek RTD1195 SoC. Naming was derived from BSP register description headers. Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: James Tai <james.tai@realtek.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2020-02-08Merge tag 'armsoc-drivers' of ↵Linus Torvalds1-0/+91
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC-related driver updates from Olof Johansson: "Various driver updates for platforms: - Nvidia: Fuse support for Tegra194, continued memory controller pieces for Tegra30 - NXP/FSL: Refactorings of QuickEngine drivers to support ARM/ARM64/PPC - NXP/FSL: i.MX8MP SoC driver pieces - TI Keystone: ring accelerator driver - Qualcomm: SCM driver cleanup/refactoring + support for new SoCs. - Xilinx ZynqMP: feature checking interface for firmware. Mailbox communication for power management - Overall support patch set for cpuidle on more complex hierarchies (PSCI-based) and misc cleanups, refactorings of Marvell, TI, other platforms" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (166 commits) drivers: soc: xilinx: Use mailbox IPI callback dt-bindings: power: reset: xilinx: Add bindings for ipi mailbox drivers: soc: ti: knav_qmss_queue: Pass lockdep expression to RCU lists MAINTAINERS: Add brcmstb PCIe controller entry soc/tegra: fuse: Unmap registers once they are not needed anymore soc/tegra: fuse: Correct straps' address for older Tegra124 device trees soc/tegra: fuse: Warn if straps are not ready soc/tegra: fuse: Cache values of straps and Chip ID registers memory: tegra30-emc: Correct error message for timed out auto calibration memory: tegra30-emc: Firm up hardware programming sequence memory: tegra30-emc: Firm up suspend/resume sequence soc/tegra: regulators: Do nothing if voltage is unchanged memory: tegra: Correct reset value of xusb_hostr soc/tegra: fuse: Add APB DMA dependency for Tegra20 bus: tegra-aconnect: Remove PM_CLK dependency dt-bindings: mediatek: add MT6765 power dt-bindings soc: mediatek: cmdq: delete not used define memory: tegra: Add support for the Tegra194 memory controller memory: tegra: Only include support for enabled SoCs memory: tegra: Support DVFS on Tegra186 and later ...
2020-02-03Merge tag 'clk-for-linus' of ↵Linus Torvalds1-0/+157
git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "There are a few changes to the core framework this time around, in addition to the normal collection of driver updates to support new SoCs, fix incorrect data, and convert various drivers to clk_hw based APIs. In the core, we allow clk_ops::init() to return an error code now so that we can fail clk registration if the callback does something like fail to allocate memory. We also add a new "terminate" clk_op so that things done in clk_ops::init() can be undone, e.g. free memory. We also spit out a warning now when critical clks fail to enable and we support changing clk rates and enable/disable state through debugfs when developers compile the kernel themselves. On the driver front, we get support for what seems like a lot of Qualcomm and NXP SoCs given that those vendors dominate the diffstat. There are a couple new drivers for Xilinx and Amlogic SoCs too. The updates are all small things like fixing the way glitch free muxes switch parents, avoiding div-by-zero problems, or fixing data like parent names. See the updates section below for more details. Finally, the "basic" clk types have been converted to support specifying parents with clk_hw pointers. This work includes an overhaul of the fixed-rate clk type to be more modern by using clk_hw APIs. Core: - Let clk_ops::init() return an error code - Add a clk_ops::terminate() callback to undo clk_ops::init() - Warn about critical clks that fail to enable or prepare - Support dangerous debugfs actions on clks with dead code New Drivers: - Support for Xilinx Versal platform clks - Display clk controller on qcom sc7180 - Video clk controller on qcom sc7180 - Graphics clk controller on qcom sc7180 - CPU PLLs for qcom msm8916 - Move qcom msm8974 gfx3d clk to RPM control - Display port clk support on qcom sdm845 SoCs - Global clk controller on qcom ipq6018 - Add a driver for BCLK of Freescale SAI cores - Add cam, vpe and sgx clock support for TI dra7 - Add aess clock support for TI omap5 - Enable clks for CPUfreq on Allwinner A64 SoCs - Add Amlogic meson8b DDR clock controller - Add input clocks to Amlogic meson8b controllers - Add SPIBSC (SPI FLASH) clock on Renesas RZ/A2 - i.MX8MP clk driver support Updates: - Convert gpio, fixed-factor, mux, gate, divider basic clks to hw based APIs - Detect more PRMCU variants in ux500 driver - Adjust the composite clk type to new way of describing clk parents - Fixes for clk controllers on qcom msm8998 SoCs - Fix gmac main clock for TI dra7 - Move TI dra7-atl clock header to correct location - Fix hidden node name dependency on TI clkctrl clocks - Fix Amlogic meson8b mali clock update using the glitch free mux - Fix Amlogic pll driver division by zero at init - Prepare for split of Renesas R-Car H3 ES1.x and ES2.0+ config symbols - Switch more i.MX clk drivers to clk_hw based APIs - Disable non-functional divider between pll4_audio_div and pll4_post_div on imx6q - Fix watchdog2 clock name typo in imx7ulp clock driver - Set CLK_GET_RATE_NOCACHE flag for DRAM related clocks on i.MX8M SoCs - Suppress bind attrs for i.MX8M clock driver - Add a big comment in imx8qxp-lpcg driver to tell why devm_platform_ioremap_resource() shouldn't be used for the driver - A correction on i.MX8MN usb1_ctrl parent clock setting" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (140 commits) dt/bindings: clk: fsl,plldig: Drop 'bindings' from schema id clk: ls1028a: Fix warning on clamp() usage clk: qoriq: add ls1088a hwaccel clocks support clk: ls1028a: Add clock driver for Display output interface dt/bindings: clk: Add YAML schemas for LS1028A Display Clock bindings clk: fsl-sai: new driver dt-bindings: clock: document the fsl-sai driver clk: composite: add _register_composite_pdata() variants clk: qcom: rpmh: Sort OF match table dt-bindings: fix warnings in validation of qcom,gcc.yaml dt-binding: fix compilation error of the example in qcom,gcc.yaml clk: zynqmp: Add support for clock with CLK_DIVIDER_POWER_OF_TWO flag clk: zynqmp: Fix divider calculation clk: zynqmp: Add support for get max divider clk: zynqmp: Warn user if clock user are more than allowed clk: zynqmp: Extend driver for versal dt-bindings: clock: Add bindings for versal clock driver clk: ti: clkctrl: Fix hidden dependency to node name clk: ti: add clkctrl data dra7 sgx clk: ti: omap5: Add missing AESS clock ...
2020-01-09clk: qcom: Add DT bindings for ipq6018 gcc clock controllerSricharan R1-0/+157
Add the compatible strings and the include file for ipq6018 gcc clock controller. Co-developed-by: Anusha Canchi Ramachandra Rao <anusharao@codeaurora.org> Signed-off-by: Anusha Canchi Ramachandra Rao <anusharao@codeaurora.org> Co-developed-by: Abhishek Sahu <absahu@codeaurora.org> Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> Co-developed-by: Sivaprakash Murugesan <sivaprak@codeaurora.org> Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Sricharan R <sricharan@codeaurora.org> Link: https://lkml.kernel.org/r/1578557121-423-2-git-send-email-sricharan@codeaurora.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-01-02dt-bindings: reset: Add binding constants for NPCM7xx reset controllerTomer Maimon1-0/+91
Add device tree binding constants for Nuvoton BMC NPCM7xx reset controller. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2019-12-09dt-bindings: reset: meson8b: fix duplicate reset IDsMartin Blumenstingl1-3/+3
According to the public S805 datasheet the RESET2 register uses the following bits for the PIC_DC, PSC and NAND reset lines: - PIC_DC is at bit 3 (meaning: RESET_VD_RMEM + 3) - PSC is at bit 4 (meaning: RESET_VD_RMEM + 4) - NAND is at bit 5 (meaning: RESET_VD_RMEM + 4) Update the reset IDs of these three reset lines so they don't conflict with PIC_DC and map to the actual hardware reset lines. Fixes: 79795e20a184eb ("dt-bindings: reset: Add bindings for the Meson SoC Reset Controller") Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-12-05Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds1-0/+111
Pull ARM Device-tree updates from Olof Johansson: "As always, the bulk of updates. Some of the news this cycle: New SoC descriptions: - Broadcom BCM2711 - Amlogic Meson A1 and G12 - Freescale S32V234 - Marvell Armada AP807/AP807-quad and CP115 - Realtek RTD1293 and RTD1296 - Rockchip RK3308 New boards and platforms: - Allwinner: NanoPi Duo2 - Amlogic: Ugoos am6 - Atmel at91: Overkiz Kizbox2/4 - Broadcom: RPi4, Luxul XWC-2000 - Marvell: New Espressobin flavor - NXP: i.MX8MN LPDDR4 EVK, i.MX8QXP Colibri, S32V234 EVB, Netronix E60K02 and Kobo Clara HD, Kontron N6311 and N6411, OPOS6UL and OPOS6ULDev - Renesas: Salvator-XS - Rockchip: Beelink A1 (rk3308), rk3308 eval boards, rk3399-roc-pc" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (653 commits) ARM: dts: logicpd-torpedo: Disable USB Host arm: dts: mt6323: add keys, power-controller, rtc and codec arm64: dts: mt8183: add systimer0 device node dt-bindings: mediatek: update bindings for MT8183 systimer arm64: dts: rockchip: fix sdmmc detection on boot on rk3328-roc-cc arm64: dts: rockchip: Split rk3399-roc-pc for with and without mezzanine board. arm64: dts: rockchip: Add Beelink A1 dt-bindings: ARM: rockchip: Add Beelink A1 arm64: dts: rockchip: Add RK3328 audio pipelines arm64: dts: ti: k3-j721e-common-proc-board: Add USB ports arm64: dts: ti: k3-j721e-main: add USB controller nodes ARM: dts: aspeed-g6: Add timer description ARM: dts: aspeed: ast2600evb: Enable i2c buses ARM: dts: at91: add a dts and dtsi file for kizbox2 based boards dt-bindings: arm: at91: Document Kizbox2-2 board binding arm64: dts: meson-gx: fix i2c compatible arm64: dts: meson-gx: cec node should be disabled by default arm64: dts: meson-g12b-odroid-n2: add missing amlogic, s922x compatible arm64: dts: meson-gxm: fix gpu irq order arm64: dts: meson-g12a: fix gpu irq order ...
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