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include
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asm-mips
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cpu.h
Age
Commit message (
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Author
Files
Lines
2007-07-10
[MIPS] PMC MSP71xx mips common
Marc St-Jean
1
-0
/
+2
2007-07-10
[MIPS] define Hit_Invalidate_I to Index_Invalidate_I for loongson2
Fuxin Zhang
1
-1
/
+6
2007-07-10
[MIPS] Enable support for the userlocal hardware register
Ralf Baechle
1
-0
/
+1
2007-07-06
[MIPS] Add macros to encode processor revisions.
Ralf Baechle
1
-0
/
+11
2006-07-13
[MIPS] Use the proper technical term for naming some of the cache macros.
Ralf Baechle
1
-1
/
+1
2006-06-01
[MIPS] Treat R14000 like R10000.
Kumba
1
-1
/
+3
2006-06-01
[MIPS] Fix detection and handling of the 74K processor.
Chris Dearman
1
-1
/
+3
2006-02-14
[MIPS] Fix CPU type bitmasks for MIPS III, IV and V.
Maciej W. Rozycki
1
-3
/
+3
2006-01-10
MIPS: Reorganize ISA constants strictly as bitmasks.
Ralf Baechle
1
-7
/
+10
2006-01-10
MIPS: Introduce machinery for testing for MIPSxxR1/2.
Ralf Baechle
1
-1
/
+3
2006-01-10
MIPS: Rename MIPS_CPU_ISA_M{32,64} -> MIPS_CPU_ISA_M{32,64}R1.
Ralf Baechle
1
-10
/
+7
2005-10-29
Add support for SB1A CPU.
Andrew Isaacson
1
-1
/
+3
2005-10-29
Cleanup the mess in cpu_cache_init.
Ralf Baechle
1
-19
/
+21
2005-10-29
Move MIPS Technologies processor IDs to where they belong.
Maciej W. Rozycki
1
-2
/
+7
2005-10-29
Philips PNX8550 support: MIPS32-like core with 2 Trimedias on it.
Pete Popov
1
-1
/
+3
2005-10-29
Detect the MIPS R2 vectored interrupt, external interrupt controller
Ralf Baechle
1
-0
/
+4
2005-10-29
Detect the 34K.
Ralf Baechle
1
-1
/
+3
2005-10-29
Support the MIPS32 / MIPS64 DSP ASE.
Ralf Baechle
1
-0
/
+2
2005-10-29
Cleanup decoding of MIPSxx config registers.
Ralf Baechle
1
-1
/
+9
2005-10-29
Base Au1200 2.6 support.
Pete Popov
1
-1
/
+2
2005-10-29
Add a few more PrId vendor IDs.
Ralf Baechle
1
-6
/
+11
2005-04-16
Linux-2.6.12-rc2
v2.6.12-rc2
Linus Torvalds
1
-0
/
+222