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2014-01-03Merge tag 'renesas-dt3-for-v3.14' of ↵Olof Johansson28-231/+3809
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt From Simon Horman: Third Round of Renesas ARM Based SoC DT Updates for v3.14 * r8a7791 (R-Car M2) and r8a7790 (R-Car H2) SoCSs - Add SSI, QSPI and MSIOF clocks in device tree r8a7791 (R-Car M2) based Koelsch and r8a7790 (R-Car H2) based Lager boards - Remove reference DTS - Specify external clock frequency in DT - Sync non-reference DTS with referene DTS - Add clocks to DTS * r8a7740 (R-Mobile A1) based Armadillo board - Add gpio-keys device - Add PWM backlight enable GPIO - Add PWM backlight power supply * r8a73a0 (SH-Mobile AG5), r8a7740 (R-Mobile A1) and r8a73a4 (SH-Mobile APE6) SoCs - Specify PFC interrupts in DT * tag 'renesas-dt3-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (72 commits) ARM: shmobile: r8a7791: Add SSI clocks in device tree ARM: shmobile: r8a7790: Add SSI clocks in device tree ARM: shmobile: r8a7791: Add QSPI module clock in device tree ARM: shmobile: r8a7790: Add QSPI module clock in device tree ARM: shmobile: r8a7791: Add MSIOF clocks in device tree ARM: shmobile: r8a7790: Add MSIOF clocks in device tree ARM: shmobile: Remove Koelsch reference DTS ARM: shmobile: Remove Lager reference DTS ARM: shmobile: koelsch: Specify external clock frequency in DT ARM: shmobile: lager: Specify external clock frequency in DT ARM: shmobile: Sync Koelsch DTS with Koelsch reference DTS ARM: shmobile: Sync Lager DTS with Lager reference DTS ARM: shmobile: r8a7791: Add clocks ARM: shmobile: r8a7790: Reference clocks ARM: shmobile: r8a7790: Add clocks ARM: shmobile: armadillo: dts: Add gpio-keys device ARM: shmobile: sh73a0: Specify PFC interrupts in DT ARM: shmobile: r8a7740: Specify PFC interrupts in DT ARM: shmobile: r8a73a4: Specify PFC interrupts in DT ARM: shmobile: armadillo: dts: Add PWM backlight enable GPIO ... Signed-off-by: Olof Johansson <olof@lixom.net>
2013-12-26Merge branch 'tegra/dma-reset-rework' into next/dtOlof Johansson138-3729/+5919
Bringing in the tegra dma/reset framework cleanup as a base for the DT changes. * tegra/dma-reset-rework: (320 commits) spi: tegra: checking for ERR_PTR instead of NULL ASoC: tegra: update module reset list for Tegra124 clk: tegra: remove bogus PCIE_XCLK clk: tegra: remove legacy reset APIs ARM: tegra: remove legacy DMA entries from DT ARM: tegra: remove legacy clock entries from DT USB: EHCI: tegra: use reset framework Input: tegra-kbc - use reset framework serial: tegra: convert to standard DMA DT bindings serial: tegra: use reset framework spi: tegra: convert to standard DMA DT bindings spi: tegra: use reset framework staging: nvec: use reset framework i2c: tegra: use reset framework ASoC: tegra: convert to standard DMA DT bindings ASoC: tegra: allocate AHUB FIFO during probe() not startup() ASoC: tegra: call pm_runtime APIs around register accesses ASoC: tegra: use reset framework dma: tegra: register as an OF DMA controller dma: tegra: use reset framework ... Signed-off-by: Olof Johansson <olof@lixom.net>
2013-12-23Merge tag 'samsung-dt-2' of ↵Olof Johansson1-1/+2
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt From Kukjin Kim: Samsung DT 2nd updates for v3.14 - add DMA controller, SPI, and TMU DT nodes for exynos5420 - add PWM DT nodes for exynos5250 and exynos5420 - drop interrupt controller properties from MCT nodes because MCT is not an interrupt controller - move MCT nodes to exynos4x12 from board because it is a per-processor interrupt and same 4212 and 4412 - use one cell for MCT interrupt map for exynos4 SoCs - update Exynos MCT DT bindings accordingly - fix missing spaces after labels for exynos - fix mmc status property for exynos5250-snow - add MCLK for codec for exynos5250-smdk5250 - disable SPI and I2C by default for exynos5250 SoC and enable into requiring some boards - rename cros5250-common to exynos5250-cros-common * tag 'samsung-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (27 commits) ARM: dts: Rename Exynos5250 ChromeOS common file to have exynos prefix ARM: dts: Disable I2C controllers by default on Exynos5250 ARM: dts: Leave Exynos5250 SPI controller disabled by default ARM: dts: Add CODEC MCLK for SMDK5250 ARM: dts: Add device nodes for TMU blocks for exynos5420 ARM: dts: Fix status property of mmc nodes for snow board ARM: dts: Fix missing spaces after labels for exynos ARM: dts: Simplify MCT interrupt map for exynos4 SoCs ARM: dts: Move MCT node to exynos4x12.dtsi ARM: dts: Drop interrupt controller properties from MCT nodes for exynos4 SoCs Documentation: devicetree: Update Exynos MCT bindings description ARM: dts: add pwm DT nodes to Exynos5250 and Exynos5420 ARM: dts: Add SPI nodes to the exynos5420 device tree file ARM: dts: Add DMA controller node info on Exynos5420 ARM: dts: Use MSHC controller for eMMC memory for exynos4412-trats2 ARM: dts: Fix definition of MSHC device tree nodes for exynos4x12 ARM: dts: add clock provider for mshc node for Exynos4412 SOC clk: samsung: exynos4: Fix definition of div_mmc_pre4 divider ARM: dts: Fix exynos5250-snow's search key to be L_META ARM: dts: Add the missing "\" key in non-US keyboards for exynos5250-snow ... Signed-off-by: Olof Johansson <olof@lixom.net>
2013-12-22Merge tag 'samsung-dt' of ↵Olof Johansson1-0/+4
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt From Kukjin Kim: Samsung DT updates for v3.14 - Add support Octa Cores for exynos5420 : populate CPU node entries to 8 Cores : extend mct to support 8 local interrupts - Update dwmmc nodes for exynos5250 and exynos5420 : change status property of dwmmc nodes for exynos5250 : move dwmmc nodes from exynos5 to exynos5250 because it's different between exynos5250 and exynos5420 : rename mmc nodes from dwmmc for exynos5 SoCs : add dwmmc nodes for exynos5420 - Add G-Scaler nodes for exynos5420 - Add HS-i2c nodes in exynos5420 : High Speed I2C 7 channels (4 to 10) - Update sysreg binding and node name in exynos4 - Update min voltage on exynos5250-arndale - Move fifo-depth property from boards to exynos5250 SoC : because the fifo-depth property is SoC specific * tag 'samsung-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: dts: Update Samsung sysreg binding document ARM: dts: Fix sysreg node name in exynos4.dtsi ARM: dts: Add hs-i2c nodes to exynos5420 ARM: dts: Update min voltage for vdd_arm on Arndale ARM: dts: populate cpu node entries to 8 cpus for exynos5420 clocksource: mct: extend mct to support 8 local interrupts for Exynos5420 ARM: dts: Add device nodes for GScaler blocks for exynos5420 ARM: dts: Add dwmmc DT nodes for exynos5420 SOC ARM: dts: rename mmc dts node for exynos5 series ARM: dts: Move fifo-depth property from exynos5250 board dts ARM: dts: change status property of dwmmc nodes for exynos5250 ARM: dts: Move dwmmc nodes from exynos5.dtsi to exynos5250.dtsi Signed-off-by: Olof Johansson <olof@lixom.net>
2013-12-21Merge branch 'v3.14-next/fixes-samsung-2' into v3.14-next/dt-exynos-2Kukjin Kim1-1/+2
2013-12-21clk: samsung: exynos4: Fix definition of div_mmc_pre4 dividerTomasz Figa1-1/+2
The clock was missing CLK_SET_RATE_PARENT flag, which caused rate setting failures due to inability of reconfiguration of second divider behind it. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-12-20Merge tag 'renesas-dt-for-v3.14' of ↵Kevin Hilman1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt From Simon Horman: Renesas ARM based SoC DT updates for v3.14 * Global - Use interrupt macros - Use #include in device tree sources - Tidyup DT node naming * emev2 (Emma Mobile EV2) SoC - Setup internal peripheral interrupts as level high - Use interrupt macros in DT files - Add clock tree description in DT * r8a7791 (R-Car M2) SoC - Correct GPIO resources * r8a7791 (R-Car M2) based Koelsch board - Configure PFC and GPO - Use r8a7791 suffix for IRQC compat string - Add DT reference * r8a7790 (R-Car H2) based Lager board - Include all 4 GiB of memory - Use r8a7790 suffix for IRQC and MMCIF compat strings - Enable MMCIF - Add default PFC settings * r8a7778 (R-Car M1) SoC - Suffix for INTC compat string - Add HSPI, MMCIF, SDHI and I2C suppport on DTSI - Correct pin control device addresses * r8a7778 (R-Car M1) based Bock-W board - Use falling edge IRQ for LAN9221 in DT reference - Enable I2C, HSPI0, MMCIF and SDHI - Correct MMC pin conflict - Remove manual PFC settings from DT reference - Add default PFC settings * r8a7779 (R-Car H1) SoC - Add HSPI and SDHI support - Suffix for INTC compat string * r8a7779 (R-Car H1) based Marzen board - Enable HSPI0 and SDHI in DTS - Remove SDHI0 WP pin setting - Use falling edge IRQ for LAN9221 in DT reference - Add SDHI support * r8a7740 (R-Mobile A1) SoC - Suffix for INTC compat string - Add FSI support via DTSI - Use interrupt macros * r8a7740 based Armadillo board - Add FSI support for DTS - Use low level IRQ for ST1231 in DT reference * r8a73a4 (SH-Mobile APE6) SoC - Use interrupt macros in DT files * r8a73a4 (R-Mobile APE6) based ape6evm board - Include all 2 GiB of memory * r8a73a0 (SH-Mobile AG5) SoC - Correct SDHI compat string * r8a73a0 (SH-Mobile AG5) based kzm9d board - Add GPIO keys and Add PCF8575 GPIO extender to DT - Enable DSW2 with gpio-keys - Use falling edge IRQ for LAN9221 in DT reference * tag 'renesas-dt-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (102 commits) ARM: shmobile: marzen: enable HSPI0 in DTS ARM: shmobile: r8a7779: add HSPI support to DTSI ARM: shmobile: Use r8a7779 suffix for INTC compat string ARM: shmobile: Use r8a7778 suffix for INTC compat string ARM: shmobile: Use r8a7740 suffix for INTC compat string ARM: shmobile: Use sh73a0 suffix for INTC compat string ARM: shmobile: armadillo: add FSI support for DTS ARM: shmobile: r8a7740: add FSI support via DTSI ARM: shmobile: emev2: Setup internal peripheral interrupts as level high ARM: shmobile: emev2: Use interrupt macros in DT files ARM: shmobile: Use interrupt macros in r8a73a4 and r8a7778 DT files ARM: shmobile: Fix r8a7791 GPIO resources in DTS ARM: shmobile: Include all 4 GiB of memory on Lager DT Ref ARM: shmobile: Include all 4 GiB of memory on Lager ARM: shmobile: Include all 2 GiB of memory on APE6EVM ARM: shmobile: Include all 2 GiB of memory on APE6EVM DT Ref ARM: shmobile: kzm9g-reference: Add GPIO keys to DT ARM: shmobile: kzm9g-reference: Add PCF8575 GPIO extender to DT ARM: shmobile: Koelsch DT reference GPIO LED support ARM: shmobile: Enable DSW2 with gpio-keys on KZM9D ... Signed-off-by: Kevin Hilman <khilman@linaro.org>
2013-12-19Merge branch 'heads/sh-sci' into dt3-baseSimon Horman1-17/+22
2013-12-19Merge tag 'v3.13-rc3' into dt3-baseSimon Horman103-503/+884
Linux 3.13-rc3 Conflicts: drivers/pinctrl/sh-pfc/pfc-r8a7740.c drivers/pinctrl/sh-pfc/pfc-sh7372.c
2013-12-19Merge remote-tracking branch 'daniel-lezcano/clockevents/for-Simon-3.13-rc2' ↵Simon Horman153-916/+2759
into dt3-base
2013-12-19Merge remote-tracking branch 'mike-turquette/clk-next-shmobile' into dt3-baseSimon Horman5-0/+720
2013-12-19Merge commit '70c8f01' into dt3-baseSimon Horman21-210/+3051
This is a commit from the for-next branch of Linus Walleij's pin control tre git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git It is the oldest commit in that branch that provides the dependencies needed for SoC changes to the usage of sh-pfc.
2013-12-18clocksource: sh_cmt: Add clk_prepare/unprepare supportLaurent Pinchart1-4/+16
Prepare the clock at probe time, as there is no other appropriate place in the driver where we're allowed to sleep. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: linux-kernel@vger.kernel.org Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2013-12-16spi: tegra: checking for ERR_PTR instead of NULLDan Carpenter1-2/+2
dma_request_slave_channel() returns NULL on error and not ERR_PTRs. I've fixed this by using dma_request_slave_channel_reason() which does return ERR_PTRs. Fixes: a915d150f68d ('spi: tegra: convert to standard DMA DT bindings') Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16clocksource: mct: extend mct to support 8 local interrupts for Exynos5420Chander Kashyap1-0/+4
Exynos5420 is octa-core SoC from Samsung. Hence extend exynos-mct clocksource driver to support 8 local interrupts. Also extend dts entries for 8 interrupts. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-12-14serial: sh-sci: Convert to clk_prepare/unprepareLaurent Pinchart1-4/+4
Turn clk_enable() and clk_disable() calls into clk_prepare_enable() and clk_disable_unprepare() to get ready for the migration to the common clock framework. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Magnus Damm <damm@opensource.se> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-14serial: sh-sci: Don't enable/disable port from within break timerLaurent Pinchart1-4/+8
The break timer accesses hardware registers and thus requires the port to be enabled. It currently ensures this by enabling the port at the beginning of the timer handler, and disabling it at the end. However, the enable/disable operations call the runtime PM sync functions, which are not allowed in atomic context. The current situation is thus broken. This change relies on non-atomic code to enable/disable the port. The break timer will only be started from the IRQ handler, which already runs with the port enabled. We just need to ensure that the port won't be disabled with the timer running, and that's easily done by just cancelling the timer in the port disable function. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Magnus Damm <damm@opensource.se> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-12clk: shmobile: Add MSTP clock supportLaurent Pinchart2-0/+230
MSTP clocks are gate clocks controlled through a register that handles up to 32 clocks. The register is often sparsely populated. Those clocks are found on Renesas ARM SoCs. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-12-12clk: shmobile: Add DIV6 clock supportLaurent Pinchart2-0/+186
DIV6 clocks are divider gate clocks controlled through a single register. The divider is expressed on 6 bits, hence the name, and can take values from 1/1 to 1/64. Those clocks are found on Renesas ARM SoCs. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-12-12clk: shmobile: Add R-Car Gen2 clocks supportLaurent Pinchart3-0/+304
The R-Car Gen2 SoCs (R8A7790 and R8A7791) have several clocks that are too custom to be supported in a generic driver. Those clocks can be divided in two categories: - Fixed rate clocks with multiplier and divisor set according to boot mode configuration - Custom divider clocks with SoC-specific divider values This driver supports both. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-12-12sh-pfc: Support GPIO to IRQ mapping specified IRQ resourcesLaurent Pinchart3-17/+68
On non-DT platforms IRQ controllers associated with the GPIOs have a fixed IRQ base value known at compile time. The sh-pfc driver translates GPIO number to IRQ numbers using a hardcoded table. This mechanism breaks on DT platforms, as the IRQ base values are dynamic in that case. Fix this by specifying IRQs associated with GPIOs in IRQ resources, populated automatically from the device tree. When IRQ resources are specified the driver requires one IRQ resource per GPIO able to generate an interrupt, and uses the translation table to compute the IRQ resource offset instead of the IRQ number. Cc: devicetree@vger.kernel.org Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-12-12sh-pfc: Rename sh_pfc window field to windowsLaurent Pinchart7-20/+21
There's more than one window, name the field windows. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-12-12sh-pfc: sh73a0: Sort IRQ entries by IRQ numberLaurent Pinchart1-24/+23
This makes catching duplicate entries easier. Merge the two IRQ9 entries found after sorting. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-12-12sh-pfc: sh73a0: Add missing IRQ15Laurent Pinchart1-0/+1
The external IRQ15 input multiplexed on GPIO 0 is missing. Add it. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-12-12sh-pfc: Terminate gpios array by -1Laurent Pinchart2-4/+4
0 is a valid GPIO value, use -1 to terminate the gpios array in IRQ lists. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-12-12sh-pfc: Turn unsigned indices into unsigned intLaurent Pinchart2-5/+5
Some indices take positive values only, make them unsigned. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-12-12pinctrl: pinconf: remove checks on ops->pin_config_getAlexandre Belloni1-16/+4
ops->pin_config_get() is only used in one specific path that will only be taken for generic pinconf drivers (ops->is_generic == true) when dumping the pinconf by using debugfs. By removing the check in pinconf_check_ops(), let's stop pressuring people to write a pin_config_get() function that will never be used and so will probably never be tested. Removing the check in pinconf_pins_show() allows driver to not implement pin_config_get() but still get a dump of the pinconf in debugfs by implementing pin_config_dbg_show(). Finally, not implementing pin_config_get() now results in returning -ENOTSUPP instead of -EINVAL. While this doesn't have any real impact for now, this feels more right. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-12-12pinctrl: at91: initialize config parameter to 0Alexandre Belloni1-1/+2
When passing a not initialized config parameter, at91_pinconf_get() would return a bogus value. Fix that by initializing it to zero before using it. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-12-12pinctrl: at91: correct a few typosAlexandre Belloni1-3/+3
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-12-12serial: sh-sci: Fix warnings due to improper casts and printk formatsLaurent Pinchart1-9/+10
Use the %zu and %pad printk specifiers to print size_t and dma_addr_t variables, and cast pointers to uintptr_t instead of unsigned int where applicable. This fixes warnings on platforms where pointers and/or dma_addr_t have a different size than int. Cc: linux-serial@vger.kernel.org Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-11clk: tegra: remove bogus PCIE_XCLKStephen Warren2-13/+0
The "pcie_xclk" clock is not actually a clock at all, but rather a reset domain. Now that the custom Tegra module reset API has been removed, we can remove the definition of any "clocks" that existed solely to support it. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com>
2013-12-11clk: tegra: remove legacy reset APIsStephen Warren3-63/+0
Now that no code uses the custom Tegra module reset API, we can remove its implementation. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com>
2013-12-11USB: EHCI: tegra: use reset frameworkStephen Warren1-3/+11
Tegra's clock driver now provides an implementation of the common reset API (include/linux/reset.h). Use this instead of the old Tegra- specific API; that will soon be removed. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Alan Stern <stern@rowland.harvard.edu> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Thierry Reding <treding@nvidia.com>
2013-12-11Input: tegra-kbc - use reset frameworkStephen Warren1-3/+10
Tegra's clock driver now provides an implementation of the common reset API (include/linux/reset.h). Use this instead of the old Tegra- specific API; that will soon be removed. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Reviewed-by: Thierry Reding <treding@nvidia.com>
2013-12-11serial: tegra: convert to standard DMA DT bindingsStephen Warren1-18/+6
By using dma_request_slave_channel_or_err(), the DMA slave ID can be looked up from standard DT properties, and squirrelled away during channel allocation. Hence, there's no need to use a custom DT property to store the slave ID. Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com>
2013-12-11serial: tegra: use reset frameworkStephen Warren1-4/+10
Tegra's clock driver now provides an implementation of the common reset API (include/linux/reset.h). Use this instead of the old Tegra- specific API; that will soon be removed. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Thierry Reding <treding@nvidia.com>
2013-12-11spi: tegra: convert to standard DMA DT bindingsStephen Warren2-62/+34
By using dma_request_slave_channel_or_err(), the DMA slave ID can be looked up from standard DT properties, and squirrelled away during channel allocation. Hence, there's no need to use a custom DT property to store the slave ID. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Mark Brown <broonie@linaro.org>
2013-12-11spi: tegra: use reset frameworkStephen Warren4-15/+42
Tegra's clock driver now provides an implementation of the common reset API (include/linux/reset.h). Use this instead of the old Tegra- specific API; that will soon be removed. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Mark Brown <broonie@linaro.org> Reviewed-by: Thierry Reding <treding@nvidia.com>
2013-12-11staging: nvec: use reset frameworkStephen Warren2-4/+12
Tegra's clock driver now provides an implementation of the common reset API (include/linux/reset.h). Use this instead of the old Tegra- specific API; that will soon be removed. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Marc Dietrich <marvin24@gmx.de> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Thierry Reding <treding@nvidia.com>
2013-12-11i2c: tegra: use reset frameworkStephen Warren1-3/+10
Tegra's clock driver now provides an implementation of the common reset API (include/linux/reset.h). Use this instead of the old Tegra- specific API; that will soon be removed. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Wolfram Sang <wsa@the-dreams.de> Reviewed-by: Thierry Reding <treding@nvidia.com>
2013-12-11dma: tegra: register as an OF DMA controllerStephen Warren1-3/+36
Call of_dma_controller_register() so that DMA clients can look up the Tegra DMA controller using standard APIs. This requires the of_xlate() function to save off the DMA slave ID, and for tegra_dma_slave_config() not to over-write this information; once DMA client drivers are converted to dma_request_slave_channel() and DT-based lookups, they won't set this field of struct dma_slave_config anymore. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Thierry Reding <treding@nvidia.com>
2013-12-11dma: tegra: use reset frameworkStephen Warren1-3/+10
Tegra's clock driver now provides an implementation of the common reset API (include/linux/reset.h). Use this instead of the old Tegra- specific API; that will soon be removed. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Acked-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com>
2013-12-11ARM: tegra: pass reset to tegra_powergate_sequence_power_up()Stephen Warren2-3/+6
Tegra's clock driver now provides an implementation of the common reset API (include/linux/reset.h). Use this instead of the old Tegra- specific API; that will soon be removed. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Acked-By: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com>
2013-12-11drm/tegra: use reset frameworkStephen Warren5-6/+39
Tegra's clock driver now provides an implementation of the common reset API (include/linux/reset.h). Use this instead of the old Tegra- specific API; that will soon be removed. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-By: Terje Bergstrom <tbergstrom@nvidia.com>
2013-12-11pci: tegra: use reset frameworkStephen Warren1-14/+36
Tegra's clock driver now provides an implementation of the common reset API (include/linux/reset.h). Use this instead of the old Tegra- specific API; that will soon be removed. The old Tegra-specific API used a struct clock to represent the module to reset. Some of the clocks retrieved during probe() were only used for reset purposes, and indeed aren't even true clocks. So, there's no need to get() them any more. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com>
2013-12-11clk: tegra: implement a reset driverStephen Warren6-6/+57
The Tegra CAR module implements both a clock and reset controller. So far, the driver exposes the clock feature via the common clock API and the reset feature using a custom API. This patch adds an implementation of the common reset framework API (include/linux/reset*.h). The legacy reset implementation will be removed once all drivers have been converted. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com>
2013-12-11Merge tag 'clk-tegra-for-3.14' into for-3.14/dmas-resets-reworkStephen Warren16-3008/+4678
Tegra clk branch for 3.14
2013-12-11Merge branch 'for-3.14/deps-from-dma-of' into for-3.14/dmas-resets-reworkStephen Warren2-23/+35
This merges git://git.infradead.org/users/vkoul/slave-dma.git topic/of
2013-12-11Merge branch 'for-3.14/deps-from-dma-defer_probe' into ↵Stephen Warren2-10/+40
for-3.14/dmas-resets-rework This merges git://git.infradead.org/users/vkoul/slave-dma.git topic/defer_probe
2013-12-10pinctrl: sh-pfc: pfc-r8a7790: Add VIN2 and VIN3 pinsValentine Barshak1-0/+168
There are VIN2 and VIN3 channels available on the R8A7790 SoC. VIN2 supports 4/8/16/18/24-bit data, while VIN3 supports 8-bit. Add both here, covering all possible data pin configurations. Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
generated by cgit v1.2.3 (git 2.39.1) at 2025-02-17 06:02:50 +0000