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AgeCommit message (Expand)AuthorFilesLines
2013-06-18drm/i915: Remove extra "ring" from error messageBen Widawsky1-1/+1
2013-06-18drm/i915: simplify the reduced clock handling for pch pllsDaniel Vetter1-5/+6
2013-06-18drm/i915: stop killing pfit on i9xxDaniel Vetter3-17/+12
2013-06-18drm/i915: explicitly set up PIPECONF (and gamma table) on haswellDaniel Vetter2-6/+7
2013-06-18drm/i915: set up PIPECONF explicitly for i9xx/vlv platformsDaniel Vetter1-14/+3
2013-06-18drm/i915: set up PIPECONF explicitly on ilk-ivbDaniel Vetter1-6/+1
2013-06-13drm/i915: find guilty batch buffer on ring resetsMika Kuoppala1-0/+97
2013-06-13drm/i915: store ring hangcheck actionMika Kuoppala2-2/+9
2013-06-13drm/i915: add batch bo to i915_add_request()Mika Kuoppala3-6/+25
2013-06-13drm/i915: change i915_add_request to macroMika Kuoppala6-14/+15
2013-06-13drm/i915: add i915_gem_context_get_hang_stats()Mika Kuoppala2-0/+32
2013-06-13drm/i915: add struct i915_ctx_hang_statsMika Kuoppala2-1/+11
2013-06-13drm/i915: Try harder to disable trickle feed on VLVVille Syrjälä2-1/+3
2013-06-12drm/i915: fix up pch pll enabling for pixel multipliersDaniel Vetter1-2/+2
2013-06-12drm/i915: hw state readout and cross-checking for shared dpllsDaniel Vetter3-0/+44
2013-06-12drm/i915: WARN on lack of shared dpllDaniel Vetter1-2/+2
2013-06-12drm/i915: split up intel_modeset_check_stateDaniel Vetter1-8/+36
2013-06-12drm/i915: extract readout_hw_state from setup_hw_stateDaniel Vetter1-5/+15
2013-06-12drm/i915: display pll hw state readout and checkingDaniel Vetter2-5/+79
2013-06-12drm/i915: pnv dpll doesn't use m1!Daniel Vetter1-1/+1
2013-06-12drm/i915: disable sdvo pixel multiplier cross-check for HAS_PCH_SPLITDaniel Vetter2-1/+13
2013-06-12drm/i915: WARN if the fence pin_count is invalidChris Wilson1-0/+1
2013-06-11drm/i915: Eliminate the addr/seqno from the hangcheck warningChris Wilson1-5/+3
2013-06-11drm/i915: Don't count semaphore waits towards a stuck ringChris Wilson2-32/+90
2013-06-11drm/i915: Only slightly increment hangcheck score if we succesfully kick a ringChris Wilson1-52/+58
2013-06-11drm/i915: Initialize ring->hangcheck upon ring initChris Wilson1-0/+2
2013-06-10drm/i915: Initialize active_outputs to never read unitialized valuesDamien Lespiau1-2/+2
2013-06-10drm/i915: Fix old reference to i830_sdvo_get_capabilities()Damien Lespiau1-1/+1
2013-06-10drm/i915: drop crtc checking from assert_shared_dpllDaniel Vetter1-28/+7
2013-06-10drm/i915: enable/disable hooks for shared dpllsDaniel Vetter2-29/+49
2013-06-10drm/i915: scrap register address storageDaniel Vetter4-26/+20
2013-06-10drm/i915: metadata for shared dpllsDaniel Vetter2-28/+39
2013-06-10drm/i915: consolidate ->num_shared_dplls assignementDaniel Vetter2-12/+16
2013-06-10drm/i915: hw state readout for shared pch pllsDaniel Vetter1-0/+17
2013-06-10drm/i915: refactor PCH_DPLL_SEL #definesDaniel Vetter2-38/+6
2013-06-10drm/i915: move shared_dpll into the pipe configDaniel Vetter2-13/+18
2013-06-10drm/i915: switch crtc->shared_dpll from a pointer to an enumDaniel Vetter3-41/+58
2013-06-10drm/i915: s/pch_pll/shared_dpll/Daniel Vetter4-67/+67
2013-06-10drm/i915: lock down pch pll accouting some moreDaniel Vetter1-1/+7
2013-06-10drm/i915: conditionally disable pch resources in ilk_crtc_disableDaniel Vetter1-32/+37
2013-06-10drm/i915: fix up pch pll handling in ->mode_setDaniel Vetter1-16/+19
2013-06-10drm/i915: Use FBINFO_STATE defines instead of 0 and 1Damien Lespiau2-4/+4
2013-06-10drm/i915: Remove dead code from SDVO initialisationChris Wilson1-13/+0
2013-06-07drm/i915: Make g4x_fixup_plane() operational againVille Syrjälä1-1/+2
2013-06-07drm/i915: WA: FBC Render Nuke.Rodrigo Vivi3-1/+34
2013-06-07drm/i915: Track when we dirty the scanout with render commandsChris Wilson4-6/+13
2013-06-07drm/i915: Refactor ctg+ trickle feed disableVille Syrjälä1-43/+19
2013-06-07drm/i915: Disable trickle feed in ironlake_init_clock_gating()Ville Syrjälä1-0/+8
2013-06-07drm/i915: Disable trickle feed via MI_ARB_STATE for the gen4Ville Syrjälä1-0/+4
2013-06-07drm/i915: Disable primary plane trickle feed for g4xVille Syrjälä2-0/+12