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2010-11-01Merge branch 'next-spi' of git://git.secretlab.ca/git/linux-2.6Linus Torvalds2-51/+69
* 'next-spi' of git://git.secretlab.ca/git/linux-2.6: spi/pl022: fix erroneous platform data in U300 spi: fixed odd static string conventions in core code spi/bfin_spi: only request GPIO on first load spi/bfin_spi: handle error/status changes after data interrupts spi: enable spi_board_info to be registered after spi_master
2010-10-25Merge branch 'for-next' of git://android.git.kernel.org/kernel/tegraLinus Torvalds3-0/+626
* 'for-next' of git://android.git.kernel.org/kernel/tegra: spi: tegra: fix error setting on timeout spi: add spi_tegra driver tegra: harmony: enable PCI Express tegra: add PCI Express support tegra: add PCI Express clocks [ARM] tegra: Add APB DMA support [ARM] tegra: Add cpufreq support [ARM] tegra: common: Update common clock init table [ARM] tegra: clock: Add dvfs support, bug fixes, and cleanups [ARM] tegra: Add support for reading fuses [ARM] tegra: gpio: Add suspend and wake support [ARM] tegra: pinmux: add safe values, move tegra2, add suspend [ARM] tegra: add suspend and mirror irqs to legacy controller [ARM] tegra: Add legacy irq support [ARM] tegra: update iomap
2010-10-25spi: tegra: fix error setting on timeoutErik Gilling1-4/+4
avoids derefencing an uninitialized pointer Change-Id: Icf528441ae481e9f6f5ddc0be32c7c217fa49701 Signed-off-by: Erik Gilling <konkers@android.com>
2010-10-22Merge branch 'llseek' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/bklLinus Torvalds2-0/+2
* 'llseek' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/bkl: vfs: make no_llseek the default vfs: don't use BKL in default_llseek llseek: automatically add .llseek fop libfs: use generic_file_llseek for simple_attr mac80211: disallow seeks in minstrel debug code lirc: make chardev nonseekable viotape: use noop_llseek raw: use explicit llseek file operations ibmasmfs: use generic_file_llseek spufs: use llseek in all file operations arm/omap: use generic_file_llseek in iommu_debug lkdtm: use generic_file_llseek in debugfs net/wireless: use generic_file_llseek in debugfs drm: use noop_llseek
2010-10-22spi: fixed odd static string conventions in core codeLinus Walleij1-5/+5
This patch removes convention of passing a static string as a parameter to another static string. The convention is intended to reduce text usage by sharing the common bits of the string, but the implementation is inherently fragile (a change to one format string but not the other will nullify any possible advantage), it isn't necessarily a net win depending on what this compiler does, and it it reduces code readability. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> [grant.likely@secretlab.ca: removed dev_dbg->dev_err hunk] Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-22spi/bfin_spi: only request GPIO on first loadMichael Hennerich1-5/+8
The gpiolib code does not allow people to do gpio_request() on a GPIO once it has already been requested. So make sure we only request the pin on the first setup of a SPI device. Otherwise, if you attempts to reconfigure a SPI device on the fly (like change bit sizes), the setup function incorrectly fails. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-22spi/bfin_spi: handle error/status changes after data interruptsMichael Hennerich1-0/+9
The error interrupt on the BF537 SIC cannot be enabled on a per-peripheral basis. Once the error interrupt is enabled for one peripheral, it is automatically enabled for all. So in the Blackfin on-chip SPI driver, we need to clear out these known errors in the data interrupt once we've successfully finished processing all of the pending data. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-21spi: enable spi_board_info to be registered after spi_masterFeng Tang1-41/+47
Currently spi_register_board_info() has to be called before its related spi_master be registered, otherwise these board info will be just ignored. This patch will remove this order limit, it adds a global spi master list like the existing global board info listr. Whenever a board info or a spi_master is registered, the spi master list or board info list will be scanned, and a new spi device will be created if there is a master-board info match. Signed-off-by: Feng Tang <feng.tang@intel.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-21spi: add spi_tegra driverErik Gilling3-0/+626
v2 changes: from Thierry Reding: * add "select TEGRA_SYSTEM_DMA" to Kconfig from Grant Likely: * add oneline description to header * inline references to DRIVER_NAME * inline references to BUSY_TIMEOUT * open coded bytes_per_word() * spi_readl/writel -> spi_tegra_readl/writel * move transfer validation to spi_tegra_transfer * don't request_mem_region iomem as platform bus does that for us * __exit -> __devexit v3 changes: from Russell King: * put request_mem_region back int from Grant Likely: * remove #undef DEBUG * add SLINK_ to register bit defines * remove unused bytes_per_word * make spi_tegra_readl/writel static linine * various refactoring for clarity * mark err if BSY bit is not cleared after 1000 retries * move spinlock to protect setting of RDY bit * subsys_initcall -> module_init v3 changes: from Grant Likely: * update spi_tegra to use PTR_ERRless dma API v4 changes: from Grant Likely: * remove empty spi_tegra_cleanup fucntion * allow device ids of -1 Signed-off-by: Erik Gilling <konkers@android.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: Thierry Reding <thierry.reding@avionic-design.de> Cc: Russell King <linux@arm.linux.org.uk> spi: tegra: cleanups from upstream review Change-Id: Icecf7e64efcb39de072a15234ba1faa4bad40d25 Signed-off-by: Erik Gilling <konkers@android.com>
2010-10-21Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2-67/+351
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (278 commits) arm: remove machine_desc.io_pg_offst and .phys_io arm: use addruart macro to establish debug mappings arm: return both physical and virtual addresses from addruart arm/debug: consolidate addruart macros for CONFIG_DEBUG_ICEDCC ARM: make struct machine_desc definition coherent with its comment eukrea_mbimxsd-baseboard: Pass the correct GPIO to gpio_free cpuimx27: fix compile when ULPI is selected mach-pcm037_eet: fix compile errors Fixing ethernet driver compilation error for i.MX31 ADS board cpuimx51: update board support mx5: add cpuimx51sd module and its baseboard iomux-mx51: fix GPIO_1_xx 's IOMUX configuration imx-esdhc: update devices registration mx51: add resources for SD/MMC on i.MX51 iomux-mx51: fix SD1 and SD2's iomux configuration clock-mx51: rename CLOCK1 to CLOCK_CCGR for better readability clock-mx51: factorize clk_set_parent and clk_get_rate eukrea_mbimxsd: add support for DVI displays cpuimx25 & cpuimx35: fix OTG port registration in host mode i.MX31 and i.MX35 : fix errate TLSbo65953 and ENGcm09472 ...
2010-10-20spi/omap2_mcspi: Verify TX reg is empty after TX only xfer with DMAIlkka Koskinen1-13/+26
In case of TX only with DMA, the driver assumes that the data has been transferred once DMA callback in invoked. However, SPI's shift register may still contain data. Thus, the driver is supposed to verify that the register is empty and the end of the SPI transfer has been reached. Signed-off-by: Ilkka Koskinen <ilkka.koskinen@nokia.com> Tested-by: Tuomas Katila <ext-tuomas.2.katila@nokia.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-20spi/omap2_mcspi: disable channel after TX_ONLY transfer in PIO modeJason Wang1-0/+6
In the TX_ONLY transfer, the SPI controller also receives data simultaneously and saves them in the rx register. After the TX_ONLY transfer, the rx register will hold the random data received during the last tx transaction. If the direct following transfer is RX_ONLY, this random data has the possibility to affect this transfer like this: When the SPI controller is changed from TX_ONLY to RX_ONLY, the random data makes the rx register full immediately and triggers a dummy write automatically(in SPI RX_ONLY transfers, we need a dummy write to trigger the first transaction). So the first data received in the RX_ONLY transfer will be that random data instead of something meaningful. We can avoid this by inserting a Disable/Re-enable toggle of the channel after the TX_ONLY transfer, since it purges the rx register. Signed-off-by: Jason Wang <jason77.wang@gmail.com> Tested-by: Grazvydas Ignotas <notasas@gmail.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-18Merge branch 'for-spi' of ↵Grant Likely1-407/+437
git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin into spi/next
2010-10-18spi/bfin_spi: namespace local structsMike Frysinger1-58/+61
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: init earlyMichael Hennerich1-1/+1
Some systems using this bus sometimes have very basic devices on them such as regulators. So we need to be loaded even earlier in case the devices are used by things such as early board init code. Therefore register in subsys_initcall(). Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: check per-transfer bits_per_wordBob Liu1-1/+6
Currently, if the bits_per_word when doing a transfer is not 8bits, we always treat it as 16bits when we should actually be returning an error. Signed-off-by: Bob Liu <lliubbo@gmail.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: warn when CS is driven by hardware (CPHA=0)Barry Song1-2/+7
When the hardware is controlling the CS, there are some SPI options we are unable to support. So issue a warning in the hopes that the user will change to a SPI mode where we can support things sanely. Signed-off-by: Barry Song <barry.song@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: cs should be always low when a new transfer beginsRob Maris1-2/+1
Signed-off-by: Rob Maris <maris.rob@vdi.de> Signed-off-by: Barry Song <barry.song@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: fix typo in commentRob Maris1-1/+1
Signed-off-by: Rob Maris <maris.rob@vdi.de> Signed-off-by: Barry Song <barry.song@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: reject unsupported SPI modesMike Frysinger1-0/+4
Who knows what people will try! Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: use dma_disable_irq_nosync() in irq handlerBarry Song1-1/+1
Using disable_irq() on the IRQ whose handler we are currently executing in can easily lead to a hang. So use the nosync variant here. Signed-off-by: Barry Song <barry.song@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: combine duplicate SPI_CTL read/write logicMike Frysinger1-22/+18
While combining things, also switch to the proper SPI bit define names. This lets us punt the rarely used SPI defines. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: reset ctl_reg bits when setup is run again on a deviceMike Frysinger1-3/+9
During runtime, the spi setup function may be called multiple times on the same device in order to reconfigure some settings on the fly. When this happens, we need to reset the ctl_reg bits so that changing the mode works as expected. Reported-by: Andy Getzendanner <james.getzendanner@students.olin.edu> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: push all size checks into the transfer functionMike Frysinger1-43/+14
This reduces duplication between the setup/transfer functions and keeps values cached during setup from overriding values changed on a transfer basis (like bits_per_word). Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: use nosync when disabling the IRQ from the IRQ handlerYi Li1-1/+1
Using disable_irq() on the IRQ whose handler we are currently executing in can easily lead to a hang. So use the nosync variant here. Signed-off-by: Yi Li <yi.li@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: sync hardware state before reprogramming everythingBarry Song1-0/+2
Sometimes under load, the Blackfin core is able to send SPI register updates out before the controller is actually disabled. So when we go to reprogram the entire state (to switch to a different slave), make sure we sync after disabling the controller. Signed-off-by: Barry Song <barry.song@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: save/restore state when suspending/resumingBarry Song1-4/+13
We can't rely on the SPI_CTL/SPI_FLG registers retaining their state when suspending, so save/restore their entire values. Signed-off-by: Barry Song <barry.song@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: redo GPIO CS handlingBarry Song1-19/+21
The common SPI layers take care of detecting CS conflicts and preventing two devices from claiming the same CS. This causes problems for the GPIO CS support we currently have as we are using CS0 to mean "GPIO CS". But if we have multiple devices using a GPIO CS, the common SPI layers see multiple devices using the virtual "CS0" and reject any such attempts. To make both work, we introduce an offset define. This represents the max number of hardware CS values that the SPI peripheral supports. If the CS is below this limit, we know we can use the hardware CS. If it's above, we treat it as a GPIO CS. This keeps the CS unique as seen by the common code and prevents conflicts. Signed-off-by: Barry Song <barry.song@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: use the SPI namespaced bit namesMike Frysinger1-10/+11
This lets us push the short SPI MMR bit names out of the global namespace. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: drop extra memory we don't needMike Frysinger1-2/+2
The driver that we based ours on uses a little extra memory behind the normal driver state, but we don't. So drop this useless bit of memory. Reported-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: convert struct names to something more logicalMike Frysinger1-50/+50
The current structure names are a bit confusing as to what they represent, so use better names. Reported-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: convert read/write/duplex funcs to a dedicated ops structureMike Frysinger1-26/+32
Rather than having to look up the same 3 sets of functions at the same time, just use an ops structure so we only need to set one pointer. Reported-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: convert queue run state to true/falseMike Frysinger1-10/+8
No point in creating our own version of true/false defines when there is already a standard stdbool available to us. Reported-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: fix up some unused/misleading commentsMike Frysinger1-6/+2
Reported-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: punt useless null read/write funcsMike Frysinger1-42/+5
The chip ops should always be initialized, so having null fallback functions are useless. Reported-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: drop custom cs_change_per_word supportMike Frysinger1-136/+12
As David points out, the cs_change_per_word option isn't standard, nor is anyone actually using it. So punt all of the dead code considering it makes up ~10% of the code size. Reported-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: fix CS handlingBarry Song1-6/+27
The CS helper functions were toggling both the Flag Enable and the Flag Value bits, but the Flag Value bit is ignored if the corresponding Flag Enable bit is cleared. So under high speed transactions, the CS sometimes would not toggle properly. Since it makes no sense to toggle the Flag Enable bit dynamically when we actually want to control the Flag Value, do this when setting up the device and then only handle toggling of the CS value during runtime. Signed-off-by: Barry Song <barry.song@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: utilize the SPI interrupt in PIO modeYi Li1-50/+185
The current behavior in PIO mode is to poll the SPI status registers which can obviously lead to higher latencies when doing a lot of SPI traffic. There is a SPI interrupt which can be used instead to signal individual completion of transactions. Signed-off-by: Yi Li <yi.li@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: force sane master-mode state at bootWolfgang Muees1-0/+6
We should make sure the SPI controller is in a sane state in case the boot loader left it in a crappy state. Such as DMA pending which causes interrupts to fire on us. When setting a sane initial state, do not default to slave mode. If we do, then the SPI peripheral may implicitly take over the SPISS pin which other things might be using. For example, the BF533-STAMP uses this pin as a GPIO to control switching between ethernet and flash. If the SPI peripheral controls the output state instead, the ethernet is no longer accessible. URL: http://blackfin.uclinux.org/gf/tracker/5630 Signed-off-by: Wolfgang Muees <wolfgang.mues@auerswald.de> Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: work around anomaly 05000119Sonic Zhang1-4/+0
Anomaly 05000119 states that the DMA_RUN bit with peripherals isn't reliable. However, the way the driver is currently written (DMA IRQ callback), we don't need the polling in the first place, so drop it. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: fix resources leakageDaniel Mack1-45/+75
Re-order setup() a bit so we don't leak memory/dma/gpio resources upon errors. Also make sure we don't call kfree() twice on the same object. Signed-off-by: Daniel Mack <daniel@caiaq.de> Signed-off-by: Bryan Wu <cooloney@kernel.org> Signed-off-by: Yi Li <yi.li@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-15spi/atmel: typo in debug messageMatthias Brugger1-1/+1
This patches a typo in the debug message. Signed-off-by: Matthias Brugger <mensch0815@gmail.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-15llseek: automatically add .llseek fopArnd Bergmann2-0/+2
All file_operations should get a .llseek operation so we can make nonseekable_open the default for future file operations without a .llseek pointer. The three cases that we can automatically detect are no_llseek, seq_lseek and default_llseek. For cases where we can we can automatically prove that the file offset is always ignored, we use noop_llseek, which maintains the current behavior of not returning an error from a seek. New drivers should normally not use noop_llseek but instead use no_llseek and call nonseekable_open at open time. Existing drivers can be converted to do the same when the maintainer knows for certain that no user code relies on calling seek on the device file. The generated code is often incorrectly indented and right now contains comments that clarify for each added line why a specific variant was chosen. In the version that gets submitted upstream, the comments will be gone and I will manually fix the indentation, because there does not seem to be a way to do that using coccinelle. Some amount of new code is currently sitting in linux-next that should get the same modifications, which I will do at the end of the merge window. Many thanks to Julia Lawall for helping me learn to write a semantic patch that does all this. ===== begin semantic patch ===== // This adds an llseek= method to all file operations, // as a preparation for making no_llseek the default. // // The rules are // - use no_llseek explicitly if we do nonseekable_open // - use seq_lseek for sequential files // - use default_llseek if we know we access f_pos // - use noop_llseek if we know we don't access f_pos, // but we still want to allow users to call lseek // @ open1 exists @ identifier nested_open; @@ nested_open(...) { <+... nonseekable_open(...) ...+> } @ open exists@ identifier open_f; identifier i, f; identifier open1.nested_open; @@ int open_f(struct inode *i, struct file *f) { <+... ( nonseekable_open(...) | nested_open(...) ) ...+> } @ read disable optional_qualifier exists @ identifier read_f; identifier f, p, s, off; type ssize_t, size_t, loff_t; expression E; identifier func; @@ ssize_t read_f(struct file *f, char *p, size_t s, loff_t *off) { <+... ( *off = E | *off += E | func(..., off, ...) | E = *off ) ...+> } @ read_no_fpos disable optional_qualifier exists @ identifier read_f; identifier f, p, s, off; type ssize_t, size_t, loff_t; @@ ssize_t read_f(struct file *f, char *p, size_t s, loff_t *off) { ... when != off } @ write @ identifier write_f; identifier f, p, s, off; type ssize_t, size_t, loff_t; expression E; identifier func; @@ ssize_t write_f(struct file *f, const char *p, size_t s, loff_t *off) { <+... ( *off = E | *off += E | func(..., off, ...) | E = *off ) ...+> } @ write_no_fpos @ identifier write_f; identifier f, p, s, off; type ssize_t, size_t, loff_t; @@ ssize_t write_f(struct file *f, const char *p, size_t s, loff_t *off) { ... when != off } @ fops0 @ identifier fops; @@ struct file_operations fops = { ... }; @ has_llseek depends on fops0 @ identifier fops0.fops; identifier llseek_f; @@ struct file_operations fops = { ... .llseek = llseek_f, ... }; @ has_read depends on fops0 @ identifier fops0.fops; identifier read_f; @@ struct file_operations fops = { ... .read = read_f, ... }; @ has_write depends on fops0 @ identifier fops0.fops; identifier write_f; @@ struct file_operations fops = { ... .write = write_f, ... }; @ has_open depends on fops0 @ identifier fops0.fops; identifier open_f; @@ struct file_operations fops = { ... .open = open_f, ... }; // use no_llseek if we call nonseekable_open //////////////////////////////////////////// @ nonseekable1 depends on !has_llseek && has_open @ identifier fops0.fops; identifier nso ~= "nonseekable_open"; @@ struct file_operations fops = { ... .open = nso, ... +.llseek = no_llseek, /* nonseekable */ }; @ nonseekable2 depends on !has_llseek @ identifier fops0.fops; identifier open.open_f; @@ struct file_operations fops = { ... .open = open_f, ... +.llseek = no_llseek, /* open uses nonseekable */ }; // use seq_lseek for sequential files ///////////////////////////////////// @ seq depends on !has_llseek @ identifier fops0.fops; identifier sr ~= "seq_read"; @@ struct file_operations fops = { ... .read = sr, ... +.llseek = seq_lseek, /* we have seq_read */ }; // use default_llseek if there is a readdir /////////////////////////////////////////// @ fops1 depends on !has_llseek && !nonseekable1 && !nonseekable2 && !seq @ identifier fops0.fops; identifier readdir_e; @@ // any other fop is used that changes pos struct file_operations fops = { ... .readdir = readdir_e, ... +.llseek = default_llseek, /* readdir is present */ }; // use default_llseek if at least one of read/write touches f_pos ///////////////////////////////////////////////////////////////// @ fops2 depends on !fops1 && !has_llseek && !nonseekable1 && !nonseekable2 && !seq @ identifier fops0.fops; identifier read.read_f; @@ // read fops use offset struct file_operations fops = { ... .read = read_f, ... +.llseek = default_llseek, /* read accesses f_pos */ }; @ fops3 depends on !fops1 && !fops2 && !has_llseek && !nonseekable1 && !nonseekable2 && !seq @ identifier fops0.fops; identifier write.write_f; @@ // write fops use offset struct file_operations fops = { ... .write = write_f, ... + .llseek = default_llseek, /* write accesses f_pos */ }; // Use noop_llseek if neither read nor write accesses f_pos /////////////////////////////////////////////////////////// @ fops4 depends on !fops1 && !fops2 && !fops3 && !has_llseek && !nonseekable1 && !nonseekable2 && !seq @ identifier fops0.fops; identifier read_no_fpos.read_f; identifier write_no_fpos.write_f; @@ // write fops use offset struct file_operations fops = { ... .write = write_f, .read = read_f, ... +.llseek = noop_llseek, /* read and write both use no f_pos */ }; @ depends on has_write && !has_read && !fops1 && !fops2 && !has_llseek && !nonseekable1 && !nonseekable2 && !seq @ identifier fops0.fops; identifier write_no_fpos.write_f; @@ struct file_operations fops = { ... .write = write_f, ... +.llseek = noop_llseek, /* write uses no f_pos */ }; @ depends on has_read && !has_write && !fops1 && !fops2 && !has_llseek && !nonseekable1 && !nonseekable2 && !seq @ identifier fops0.fops; identifier read_no_fpos.read_f; @@ struct file_operations fops = { ... .read = read_f, ... +.llseek = noop_llseek, /* read uses no f_pos */ }; @ depends on !has_read && !has_write && !fops1 && !fops2 && !has_llseek && !nonseekable1 && !nonseekable2 && !seq @ identifier fops0.fops; @@ struct file_operations fops = { ... +.llseek = noop_llseek, /* no read or write fn */ }; ===== End semantic patch ===== Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: Julia Lawall <julia@diku.dk> Cc: Christoph Hellwig <hch@infradead.org>
2010-10-14spi/fsl_spi: Fix compile errors when building on ppc64Kumar Gala1-0/+2
We get the following when building on ppc64 due to lack of include of <asm/io.h>: In file included from drivers/spi/spi_fsl_espi.c:25:0: drivers/spi/spi_fsl_lib.h: In function 'mpc8xxx_spi_write_reg': drivers/spi/spi_fsl_lib.h:88:2: error: implicit declaration of function 'out_be32' drivers/spi/spi_fsl_lib.h: In function 'mpc8xxx_spi_read_reg': drivers/spi/spi_fsl_lib.h:93:2: error: implicit declaration of function 'in_be32' drivers/spi/spi_fsl_espi.c: In function 'fsl_espi_remove': drivers/spi/spi_fsl_espi.c:571:2: error: implicit declaration of function 'iounmap' drivers/spi/spi_fsl_espi.c: In function 'fsl_espi_probe': drivers/spi/spi_fsl_espi.c:602:2: error: implicit declaration of function 'ioremap' drivers/spi/spi_fsl_espi.c:602:24: warning: assignment makes pointer from integer without a cast Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-13spi/atmel: let transfers through if not changing bits_per_wordMatthias Brugger1-1/+13
bits_per_word option in spi_transfer are allowed if it does not change the csr register. This is necessary for the driver in drivers/staging/iio/adis16260_core.c, as it uses this option. Signed-off-by: Matthias Brugger <mensch0815@gmail.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-13spi/topcliff: Fix uninitialized variable defectGrant Likely1-1/+1
This patch fixes the following build error introduced by commit 65308c46, "spi/topcliff: cleanup for style and conciseness". drivers/spi/spi_topcliff_pch.c: In function 'pch_spi_process_messages': drivers/spi/spi_topcliff_pch.c:752: warning: 'data' is used uninitialized in +this function Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-12spi/fsl_spi: add eSPI controller supportMingkai Hu4-0/+761
Add eSPI controller support based on the library code spi_fsl_lib.c. The eSPI controller is newer controller 85xx/Pxxx devices supported. There're some differences comparing to the SPI controller: 1. Has different register map and different bit definition So leave the code operated the register to the driver code, not the common code. 2. Support 4 dedicated chip selects The software can't controll the chip selects directly, The SPCOM[CS] field is used to select which chip selects is used, and the SPCOM[TRANLEN] field is set to tell the controller how long the CS signal need to be asserted. So the driver doesn't need the chipselect related function when transfering data, just set corresponding register fields to controll the chipseclect. 3. Different Transmit/Receive FIFO access register behavior For SPI controller, the Tx/Rx FIFO access register can hold only one character regardless of the character length, but for eSPI controller, the register can hold 4 or 2 characters according to the character lengths. Access the Tx/Rx FIFO access register of the eSPI controller will shift out/in 4/2 characters one time. For SPI subsystem, the command and data are put into different transfers, so we need to combine all the transfers to one transfer in order to pass the transfer to eSPI controller. 4. The max transaction length limitation The max transaction length one time is limitted by the SPCOM[TRANSLEN] field which is 0xFFFF. When used mkfs.ext2 command to create ext2 filesystem on the flash, the read length will exceed the max value of the SPCOM[TRANSLEN] field. Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-12spi/mpc8xxx: refactor the common code for SPI/eSPI controllerMingkai Hu5-392/+522
Refactor the common code in file spi_fsl_spi.c to spi_fsl_lib.c used by SPI/eSPI controller driver as a library, and leave the QE/CPM SPI controller code in the SPI controller driver spi_fsl_spi.c. Because the register map of the SPI controller and eSPI controller is so different, also leave the code operated the register to the driver code, not the common code. Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-12spi/mpc8xxx: rename spi_mpc8xxx.c to spi_fsl_spi.cMingkai Hu3-5/+6
This will pave the way to refactor out the common code which can be used by the eSPI controller driver, and rename the SPI controller dirver to the file spi_fsl_spi.c. Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-12Merge commit 'v2.6.36-rc7' into spi/nextGrant Likely3-3/+14
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