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path: root/drivers/spi
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2015-08-31Merge remote-tracking branches 'spi/topic/ti-qspi', 'spi/topic/xcomm' and ↵Mark Brown5-5/+499
'spi/topic/xlp' into spi-next
2015-08-31Merge remote-tracking branches 'spi/topic/s3c64xx', 'spi/topic/sg', ↵Mark Brown4-23/+193
'spi/topic/sh-msiof', 'spi/topic/spidev' and 'spi/topic/stats' into spi-next
2015-08-31Merge remote-tracking branches 'spi/topic/mtk', 'spi/topic/pxa2xx', ↵Mark Brown9-26/+803
'spi/topic/qspi', 'spi/topic/rockchip' and 'spi/topic/s3c24xx' into spi-next
2015-08-31Merge remote-tracking branches 'spi/topic/dw', 'spi/topic/fsl-espi', ↵Mark Brown9-107/+173
'spi/topic/img-spfi' and 'spi/topic/mpc512x-psc' into spi-next
2015-08-31Merge remote-tracking branches 'spi/topic/atmel', 'spi/topic/bcm2835', ↵Mark Brown3-15/+49
'spi/topic/bcm63xx-hsspi' and 'spi/topic/davinci' into spi-next
2015-08-31Merge remote-tracking branch 'spi/topic/dma' into spi-nextMark Brown1-4/+18
2015-08-31Merge remote-tracking branch 'spi/topic/core' into spi-nextMark Brown1-8/+21
2015-08-31Merge remote-tracking branches 'spi/fix/bcm2835', 'spi/fix/bitbang', ↵Mark Brown6-32/+153
'spi/fix/img-spfi', 'spi/fix/omap2-mcspi', 'spi/fix/orion' and 'spi/fix/xilinx' into spi-linus
2015-08-31spi: sh-msiof: Fix FIFO size to 64 word from 256 wordKoji Matsuoka1-6/+9
The upper limit of Tx/Rx FIFO size is 64 word by the specification of H/W. This patch corrects to 64 word from 256 word. Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com> Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
2015-08-30spi: fsl-(e)spi: Fix checking return value of devm_ioremap_resourceAxel Lin2-4/+4
devm_ioremap_resource() returns ERR_PTR on error. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-28spi/xlp: SPI controller driver for Netlogic XLP SoCsKamlakant Patel3-0/+468
Add SPI Master controller driver for the SPI interface on XLP8XX, XLP3XX, XLP2XX, XLP9XX and XLP5XX family of Netlogic XLP MIPS64 processors. Signed-off-by: Kamlakant Patel <kamlakant.patel@broadcom.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-28spi: fsl-espi: add runtime PMHeiner Kallweit1-17/+54
Add runtime PM and use autosuspend instead of suspending the SPI controller after each transfer. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-28spi: fsl-(e)spi: simplify cleanup codeHeiner Kallweit4-35/+7
Now that most cleanup is done automatically the remove functions can be significantly simplified. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-28spi: fsl-(e)spi: migrate to using devm_ functions to simplify cleanupHeiner Kallweit3-32/+13
Migrate fsl-espi and fsl-spi to using the managed devm_ functions for resource handling. This simplifies the cleanup. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-27spi: mediatek: fix SPI_CMD_PAUSE_IE macro errorLeilk Liu1-1/+1
enable pause interrupt should use SPI_CMD_PAUSE_IE MACRO, so fix it. Signed-off-by: Leilk Liu <leilk.liu@mediatek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-26spi: check bits_per_word in spi_setupStefan Brüns1-8/+19
This allows drivers for devices connected via SPI to check if the controller supports a given bits_per_word value during setup. Currently any BPW value is accepted durings setup, and transfers are rejected later. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-25spi: mediatek: replace *_time nameLeilk Liu1-12/+8
This patch replaces *_time name in mtk_spi_prepare_transfer(). Signed-off-by: Leilk Liu <leilk.liu@mediatek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-25spi: mediatek: add PM clk_prepare_enable fail flowLeilk Liu1-2/+11
This patch adds PM clk_prepare_enable fail flow. Signed-off-by: Leilk Liu <leilk.liu@mediatek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-25spi: mediatek: replace int with u32, delete TAB and define ↵Leilk Liu1-8/+10
MTK_SPI_PAUSE_INT_STATUS marco this patch replaces int with u32, deletes TAB, and defines MTK_SPI_PAUSE_INT_STATUS marco. Signed-off-by: Leilk Liu <leilk.liu@mediatek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-25spi: mediatek: add linux/io.h include fileLeilk Liu1-0/+1
mediatek spi driver uses readl/writel, so add linux/io.h, even so it's implicitly imported by spi/spi.h Signed-off-by: Leilk Liu <leilk.liu@mediatek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-25spi/bcm63xx-hsspi: add support for dual spi read/writeJonas Gorski1-4/+9
Add support for dual read/writes on spi-bcm63xx-hsspi. This has been tested with a s25fl129p1 dual read capable spi flash, with a nice speed improvement: serial read: root@OpenWrt:/# time dd if=/dev/mtd4 of=/dev/null bs=8192 2032+0 records in 2032+0 records out real 0m 4.39s user 0m 0.00s sys 0m 1.55s dual read: root@OpenWrt:/# time dd if=/dev/mtd4 of=/dev/null bs=8192 2032+0 records in 2032+0 records out real 0m 3.09s user 0m 0.00s sys 0m 1.56s Signed-off-by: Jonas Gorski <jogo@openwrt.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-21spi: dw: Allow interface drivers to limit data I/O to word sizesMichael van der Westhuizen3-2/+40
The commit dd11444327ce ("spi: dw-spi: Convert 16bit accesses to 32bit accesses") changed all 16bit accesses in the DW_apb_ssi driver to 32bit. This, unfortunately, breaks data register access on picoXcell, where the DW IP needs data register accesses to be word accesses (all other accesses appear to be OK). This change introduces a new master variable to allow interface drivers to specify that 16bit data transfer I/O is required. This change also introduces the ability to set this variable via device tree bindings in the MMIO interface driver. Both the core and the MMIO interface driver default to the current 32bit behaviour. Before this change, on a picoXcell pc3x3: spi_master spi32766: interrupt_transfer: fifo overrun/underrun m25p80 spi32766.0: error -5 reading 9f m25p80: probe of spi32766.0 failed with error -5 After this change: m25p80 spi32766.0: m25p40 (512 Kbytes) Fixes: dd11444327ce ("spi: dw-spi: Convert 16bit accesses to 32bit accesses") Signed-off-by: Michael van der Westhuizen <michael@smart-africa.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-21spi: Fall back to master maximum speed if no slave speed specifiedMark Brown1-0/+2
If a slave appears with no maximum transfer speed specified fall back to using the maximum for the master instead. It's questionable if we should let slaves do this but let's be defensive. Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-20spi: mediatek: use BIT() to instead of SPI_CMD_*_OFFSETLeilk Liu1-17/+20
This patch removes SPI_CMD_*_OFFSET defines, and uses the BIT(x) defines instead. Signed-off-by: Leilk Liu <leilk.liu@mediatek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-20spi: medaitek: revise quirks compatibility styleLeilk Liu1-18/+7
The quirks are true/false, so define these as bool. Signed-off-by: Leilk Liu <leilk.liu@mediatek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-20spi: mediatek: fix spi incorrect endian usageLeilk Liu1-22/+16
TX_ENDIAN/RX_ENDIAN bits define whether to reverse the endian order of the data DMA from/to memory. The endian order should keep the same with cpu endian. Signed-off-by: Leilk Liu <leilk.liu@mediatek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-20spi: ti-qspi: use 128 bit transfer mode where possibleVignesh R1-4/+30
TI QSPI has four 32 bit data regsiters which can be used to transfer 16 bytes of data at once. The register group QSPI_SPI_DATA_REG_3, QSPI_SPI_DATA_REG_2, QSPI_SPI_DATA_REG_1 and QSPI_SPI_DATA_REG is treated as a single 128-bit word for shifting data in and out. The bit at QSPI_SPI_DATA_REG_3[31] position is the first bit to be shifted out in case of 128 bit transfer mode. Therefore the first byte to be written to flash should be at QSPI_SPI_DATA_REG_3[31-25] position. Instead of writing 1 byte at a time when interacting with spi-nor flash, make use of all the four registers so that 16 bytes can be transferred in one go. This reduces number of register writes and Word Complete interrupts for a given transfer message size, thereby increasing the write performance. Without this patch the raw flash write speed is ~100KB/s, with this patch the write speed increases to ~400 kB/s on DRA74 EVM. Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-19spi: mediatek: remove redundant clock in prepare_hardware/unprepare_hardwareLeilk Liu1-17/+0
clock in prepare_hardware/unprepare_hardware is redundant with pm_runtime, so remove them. Signed-off-by: Leilk Liu <leilk.liu@mediatek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-14spi: bcm2835: set up spi-mode before asserting cs-gpioMartin Sperl1-5/+23
When using reverse polarity for clock (spi-cpol) on a device the clock line gets altered after chip-select has been asserted resulting in an additional clock beat, which confuses hardware. This did not show when using native-CS, as the same register is used to control cs as well as polarity, so the changes came into effect at the same time. Unfortunately this is not true with gpio-cs. To avoid this situation this patch moves the setup of polarity (spi-cpol and spi-cpha) outside of the chip-select into prepare_message, which is run prior to asserting chip-select. Also fixes resetting 3-wire mode after use of rx-mode, so that a 3-Wire sequence TX, RX, TX works as well (right now it runs TX, RX, RX instead) Reported-by: Noralf Tronnes <noralf@tronnes.org> Signed-off-by: Martin Sperl <kernel@martin.sperl.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-14spi/spi-xilinx: Fix spurious IRQ ACK on irq modeRicardo Ribalda Delgado1-6/+10
The ACK of an inexistent IRQ can trigger an spurious IRQ that breaks the txrx logic. This has been observed on axi_quad_spi:3.2 core. This patch only ACKs IRQs that have not been Acknowledge jet. Reported-by: Edward Kigwana <ekigwana@scires.com> Tested-by: Edward Kigwana <ekigwana@scires.com> Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
2015-08-13spi: Mediatek: fixup cpu_to_le32 incorrect usageLeilk Liu1-4/+2
writel() already does a cpu_to_le32 conversion, so remove cpu_to_le32(). Signed-off-by: Leilk Liu <leilk.liu@mediatek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-13spi/spi-xilinx: Fix mixed poll/irq modeRicardo Ribalda Delgado1-1/+3
Once the module process a transfer in irq mode, the next poll transfer will not work because the transmitter is left in inhibited state. Fixes: 22417352f6b7f623 (Use polling mode on small transfers) Reported-by: Edward Kigwana <ekigwana@scires.com> Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
2015-08-11spi: orion: On a38x, implement "50MHZ SPI AC timing" Erratum No. FE-9144572Nadav Haklai1-1/+53
Description: On Armada 38x, the device SPI interface supports frequencies of up to 50 MHz. However, due to this erratum, when the device core clock is 250 MHz and the SPI interfaces is configured for 50MHz SPI clock and CPOL=CPHA=1, there might occur data corruption on reads from the SPI device. Workaround: Work in one of the following configurations: 1. Set CPOL=CPHA=0 in "SPI Interface Configuration Register". 2. Set TMISO_SAMPLE value to 0x2 in "SPI Timing Parameters 1 Register" before setting the interface. [gregory.clement@free-electrons.com}: port to v4.2-rc, use is_errata_50mhz_ac instead of using a new ARMADA_380_SPI spi type. Signed-off-by: Nadav Haklai <nadavh@marvell.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
2015-08-11spi: mediatek: fix endian warningsLeilk Liu1-2/+4
This patch fixes endian warnings detected by sparse: - sparse: incorrect type in argument 1 (different base types) expected unsigned int [unsigned] val got restricted __le32 [usertype] <noident> - sparse: incorrect type in argument 1 (different base types) expected unsigned int [unsigned] val got restricted __le32 [usertype] <noident> Signed-off-by: Leilk Liu <leilk.liu@mediatek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-11spi: mt65xx: Fix module aliasAxel Lin1-1/+1
Remove extra space and make the alias matches driver name. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-10spi: atmel: remove useless includeAlexandre Belloni1-1/+0
Definitions from linux/platform_data/atmel.h are not used, remove the include. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-07spi: mediatek: mtk_spi_driver can be statickbuild test robot1-1/+1
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-07spi: mediatek: Add spi bus for Mediatek MT8173Leilk Liu3-0/+759
This patch adds basic spi bus for MT8173. Signed-off-by: Leilk Liu <leilk.liu@mediatek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-06spi: img-spfi: fix kbuild test robot warningSifan Naeem1-1/+1
drivers/spi/spi-img-spfi.c: In function 'img_spfi_setup': drivers/spi/spi-img-spfi.c:446: warning: 'ret' may be used uninitialized in this function. Fixes: commit b03ba9e314c1 ("spi: img-spfi: fix multiple calls to request gpio") Signed-off-by: Sifan Naeem <sifan.naeem@imgtec.com> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
2015-08-05spi: spi-pxa2xx: Remove unused legacy null dma buffer and allocation for itJarkko Nikula2-6/+1
Remove null_dma_buf variable and extra allocation for it. It is not needed since commit 6356437e65c2 ("spi: spi-pxa2xx: remove legacy PXA DMA bits"). Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-04spi: img-spfi: fix multiple calls to request gpioSifan Naeem1-8/+41
spfi_setup may be called many times by the spi framework, but gpio_request_one can only be called once without freeing, repeatedly calling gpio_request_one will cause an error to be thrown, which causes the request to spi_setup to be marked as failed. We can have a per-spi_device flag that indicates whether or not the gpio has been requested. If the gpio has already been requested use gpio_direction_output to set the direction of the gpio. Fixes: 8c2c8c03cdcb ("spi: img-spfi: Control CS lines with GPIO") Signed-off-by: Sifan Naeem <sifan.naeem@imgtec.com> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
2015-08-04spi: pxa2xx: Add terminating entry for pxa2xx_spi_pci_compound_matchAxel Lin1-0/+1
Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-04spi: spidev: fix inconsistent indentingColin Ian King1-3/+3
Fix inconsistent indenting in spidev_open, no functional change. Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-03spi: spi-pxa2xx: Remove unused legacy PXA DMA API channel numbersJarkko Nikula2-4/+0
These became unused by the commit 6356437e65c2 ("spi: spi-pxa2xx: remove legacy PXA DMA bits"). Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-07-31spi: pxa2xx: Add support for Intel SunrisepointJarkko Nikula1-4/+55
Major difference in LPSS SPI between Intel Sunrisepoint PCH and earlier platforms is an integrated DMA (iDMA) engine. iDMA is an IP that is private for each LPSS host controller (UART/SPI/I2C). Other differences are private register space offset, a few private registers that are in different location and FIFO thresholds. Intel Sunrisepoint LPSS SPI and iDMA devices are probed and registered in MFD layer as platform devices. Here these compound devices are detected by matching against known PCI IDs. This allows us to share pxa2xx_spi_acpi_get_pdata() for setting up the platform data instead of duplicating it in MFD part. This patch adds configuration for Intel Sunrisepoint LPSS SPI, above detection and DMA filter function that picks the DMA channel only from an associated iDMA block. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-07-31spi: xcomm: Export I2C module alias informationJavier Martinez Canillas1-0/+1
The I2C core always reports the MODALIAS uevent as "i2c:<client name" regardless if the driver was matched using the I2C id_table or the of_match_table. So the driver needs to export the I2C table and this be built into the module or udev won't have the necessary information to auto load the correct module when the device is added. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-07-29spi: bcm2835: fix overflow in calculation of transfer timeMartin Sperl1-4/+6
This resulted in the use of polling mode when other approaches (dma or interrupts) would have been more appropriate. Happened for transfers longer than 477 bytes. Reported-by: Noralf Tronnes <noralf@tronnes.org> Signed-off-by: Martin Sperl <kernel@martin.sperl.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-07-29spi: bcm2835: set up spi-mode before asserting cs-gpioMartin Sperl1-5/+23
When using reverse polarity for clock (spi-cpol) on a device the clock line gets altered after chip-select has been asserted resulting in an additional clock beat, which confuses hardware. This did not show when using native-CS, as the same register is used to control cs as well as polarity, so the changes came into effect at the same time. Unfortunately this is not true with gpio-cs. To avoid this situation this patch moves the setup of polarity (spi-cpol and spi-cpha) outside of the chip-select into prepare_message, which is run prior to asserting chip-select. Also fixes resetting 3-wire mode after use of rx-mode, so that a 3-Wire sequence TX, RX, TX works as well (right now it runs TX, RX, RX instead) Reported-by: Noralf Tronnes <noralf@tronnes.org> Signed-off-by: Martin Sperl <kernel@martin.sperl.org> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
2015-07-29spi: Fix regression in spi-bitbang-txrx.hLars Persson1-2/+2
This patch fixes a regression introduced by commit 232a5adc5199 ("spi: bitbang: only toggle bitchanges"). The attempt to optimize writes of consecutive bit patterns broke most of the combinations of word size and SPI modes due to selecting the wrong bit as the MSB value. Fixes: 232a5adc5199 (spi: bitbang: only toggle bitchanges) Signed-off-by: Lars Persson <larper@axis.com> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
2015-07-29spi: img-spfi: check for timeout error before proceedingSifan Naeem1-4/+4
Calling spfi_wait_all_done is not required if the transfer has timed out before all data is transferred. spfi_wait_all_done polls for Alldone interrupt which is triggered to mark the transfer as complete and to indicate it is now safe to issue a new transfer. Fixes: 8c2c8c0 ("spi: img-spfi: Control CS lines with GPIO") Signed-off-by: Sifan Naeem <sifan.naeem@imgtec.com> Reviewed-by: Andrew Bresticker <abrestic@chromium.org> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
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