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path: root/drivers/spi/spi-sun6i.c
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2017-12-07spi: sun6i: disable/unprepare clocks on removeTobias Jordan1-1/+1
sun6i_spi_probe() uses sun6i_spi_runtime_resume() to prepare/enable clocks, so sun6i_spi_remove() should use sun6i_spi_runtime_suspend() to disable/unprepare them if we're not suspended. Replacing pm_runtime_disable() by pm_runtime_force_suspend() will ensure that sun6i_spi_runtime_suspend() is called if needed. Found by Linux Driver Verification project (linuxtesting.org). Fixes: 3558fe900e8af (spi: sunxi: Add Allwinner A31 SPI controller driver) Signed-off-by: Tobias Jordan <Tobias.Jordan@elektrobit.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-07-19spi: sun6i: explicitly request exclusive reset controlPhilipp Zabel1-1/+1
Commit a53e35db70d1 ("reset: Ensure drivers are explicit when requesting reset lines") started to transition the reset control request API calls to explicitly state whether the driver needs exclusive or shared reset control behavior. Convert all drivers requesting exclusive resets to the explicit API call so the temporary transition helpers can be removed. No functional changes. Cc: Mark Brown <broonie@kernel.org> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Chen-Yu Tsai <wens@csie.org> Cc: linux-spi@vger.kernel.org Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-03-20spi: sun6i: update max transfer size reportedIcenowy Zheng1-3/+1
The spi-sun6i driver have already got the ability to do large transfers. However, the max transfer size reported is still fifo depth - 1. Update the max transfer size reported to the max value possible. Reported-by: Martin Ayotte <martinayotte@gmail.com> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-03-07spi: sun6i: Allow transfers larger than FIFO sizeIcenowy Zheng1-9/+81
The spi-sun6i driver have the same problem that spi-sun4i used to have -- SPI transfers are limited to one FIFO depth. This commit fixes this problem in the same way it's fixed in spi-sun4i. See commit 196737912da5 ("spi: sun4i: Allow transfers larger than FIFO size") for more information. The sun6i SPI controllers features changeable interrupt trigger level, but I set it to 3/4 of fifo depth, as same as the the sun4i SPI controllers. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-11-02spi: sun6i: Support Allwinner H3 SPI controllerMilo Kim1-5/+13
H3 has two SPI controllers. The size of the buffer is 64 * 8. (8 bit transfer by 64 entry FIFO) A31 has four controllers. The size of the buffer is 128 * 8. (8 bit transfer by 128 entry FIFO) Register maps are sharable, so sun6i SPI driver is reusable with device configuration. Use the variable, 'fifo_depth' instead of fixed value to support both SPI controllers. Signed-off-by: Milo Kim <woogyom.kim@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-07-24Merge remote-tracking branches 'spi/topic/spidev', 'spi/topic/sunxi', ↵Mark Brown1-0/+7
'spi/topic/ti-qspi', 'spi/topic/topcliff-pch' and 'spi/topic/txx9' into spi-next
2016-06-27spi: sunxi: set maximum and minimum speed of SPI masterMichal Suchanek1-0/+2
The speed limits are unset in the sun4i and sun6i SPI drivers. The maximum speed of SPI master is used when maximum speed of SPI slave is not specified. Also the __spi_validate function should check that transfer speeds do not exceed the master limits. The user manual for A10 and A31 specifies maximum speed of the SPI clock as 100MHz and minimum as 3kHz. Setting the SPI clock to out-of-spec values can lock up the SoC. Signed-off-by: Michal Suchanek <hramrach@gmail.com> -- v2: new patch v3: fix constant style Signed-off-by: Mark Brown <broonie@kernel.org>
2016-06-14spi: sunxi: fix transfer timeoutMichal Suchanek1-1/+9
The trasfer timeout is fixed at 1000 ms. Reading a 4Mbyte flash over 1MHz SPI bus takes way longer than that. Calculate the timeout from the actual time the transfer is supposed to take and multiply by 2 for good measure. Signed-off-by: Michal Suchanek <hramrach@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
2016-06-14spi: sunxi: expose maximum transfer size limitMichal Suchanek1-0/+5
The sun4i spi hardware can trasfer at most 63 bytes of data without DMA support so report the limitation. Same for sun6i. Signed-off-by: Michal Suchanek <hramrach@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-11-18spi: sun4i: allow transfers to set transmission speedMarcus Weseloh1-4/+4
Allow transfers to set the transmission speed rather than using the device max_speed_hz value. The SPI core makes sure that the speed_hz value is always set on the transfer. Signed-off-by: Marcus Weseloh <mweseloh42@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2014-10-20spi: drop owner assignment from platform_driversWolfram Sang1-1/+0
A platform_driver does not need to set an owner, it will be populated by the driver core. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-04-14spi: Remove unneeded include of linux/workqueue.hAxel Lin1-1/+0
Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-04spi: sun6i: Set bits_per_word_mask to only support 8 bits word lengthAxel Lin1-0/+1
This controller only supports 8 bits word length. Set bits_per_word_mask so spi core will reject transfers that attempt to use an unsupported bits_per_word value. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-16spi: sun6i: Fix define for SUN6I_TFR_CTL_CS_MASKAxel Lin1-2/+2
Current code in sun6i_spi_set_cs() actually clears CPHA and CPOL bits which is obvious wrong. The define for SUN6I_TFR_CTL_CS_MASK is wrong. Fix it. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-05spi: sunxi: Add Allwinner A31 SPI controller driverMaxime Ripard1-0/+483
The Allwinner A31 has a new SPI controller IP compared to the older Allwinner SoCs. It supports DMA, but the driver only does PIO for now, and DMA will be supported eventually. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Mark Brown <broonie@linaro.org>
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