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path: root/drivers/spi/spi-pxa2xx.c
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2017-02-19Merge remote-tracking branches 'spi/topic/imx', 'spi/topic/lantiq-ssc', ↵Mark Brown1-14/+18
'spi/topic/mpc52xx', 'spi/topic/ppc4xx' and 'spi/topic/pxa2xx' into spi-next
2017-01-23spi: pxa2xx: Prepare for edge-triggered interruptsJan Kiszka1-0/+3
When using the a device with edge-triggered interrupts, such as MSIs, the interrupt handler has to ensure that there is a point in time during its execution where all interrupts sources are silent so that a new event can trigger a new interrupt again. This is achieved here by disabling all interrupt sources for a moment before processing them according to the status register. If a new interrupt should have arrived after we read the status, it will now re-trigger the interrupt, even in edge mode. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-01-19spi: pxa2xx: Add support for Intel Gemini LakeDavid E. Box1-0/+4
Gemini Lake reuses the same LPSS SPI configuration as Broxton Signed-off-by: David E. Box <david.e.box@linux.intel.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-01-17spi: pxa2xx: Factor out handle_bad_msgJan Kiszka1-14/+15
As suggested by Andy Shevchenko: Decouple this corner cause from the general handling logic in ssp_int. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-01-04spi: pxa2xx: add missed breakAndy Shevchenko1-0/+1
The commit 7c7289a40425 ("spi: pxa2xx: Default thresholds to PXA configuration") while splitting up CE4100 code obviously missed a break condition in one chunk. Add it here. Looks like we have no active user of CE4100, though better to fix this later than never. Fixes: commit 7c7289a40425 ("spi: pxa2xx: Default thresholds to PXA configuration") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-09-29spi: pxa2xx: Fix build error because of missing headerMika Westerberg1-0/+1
Kbuild test robot reports: drivers/spi/spi-pxa2xx.c: In function ‘setup_cs’: drivers/spi/spi-pxa2xx.c:1190:20: error: implicit declaration of function ‘desc_to_gpio’ ... Reason for this is the fact that those functions are declared in linux/gpio/consumer.h which is not included in the driver. Fix this by including it. Reported-by: kbuild test robot <fengguang.wu@intel.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-09-26spi: pxa2xx: Add support for GPIO descriptor chip selectsMika Westerberg1-3/+54
The driver uses custom chip_info coming from platform data for chip selects implemented as GPIOs. If the system lacks board files setting up the platform data, it is not possible to use GPIOs as chip selects. This adds support for GPIO descriptors so that regardless of the underlying firmware interface (DT, ACPI or platform data) the driver can request GPIOs used as chip selects and configure them accordingly. The custom chip_info GPIO support is still left there to make sure the existing systems keep working as expected. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-09-12spi: pxa2xx: Default thresholds to PXA configurationAndy Shevchenko1-5/+42
Most of the devices in the supported list have PXA configuration of FIFO. In particularly Intel Medfield and Merrifield have bigger FIFO, than it's defined for CE4100. Split CE4100 in the similar way how it was done for Intel Quark, i.e. prefix definitions by CE4100 and append necessary pieces of code to switch case conditions. We are on safe side since those bits are ignored on all LPSS IPs. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-09-12spi: pxa2xx: Remove pointer to chip data from driver dataJarkko Nikula1-15/+13
Transfer state machine in this driver does not need to set/unset pointer to chip data between queueing and finalizing message as it is not actually used as a state info itself but just pointer passing. Since this per SPI device specific chip data is already carried in ctldata use that and remove pointer to chip data from driver data. While at it, group initialized variables before uninitialized variables in pump_transfers(). Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-09-12spi: pxa2xx: Remove pointer to current SPI message from driver dataJarkko Nikula1-14/+11
There is no need to carry pointer to current SPI message in driver data because cur_msg in struct spi_master holds it already when driver is using the message queueing infrastructure from the SPI core. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-09-12spi: pxa2xx: Do not needlessly initialize stack variablesJarkko Nikula1-10/+10
All of these variables are unconditionally set before their use. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-07-24Merge remote-tracking branches 'spi/topic/pxa2xx', 'spi/topic/rockchip', ↵Mark Brown1-18/+28
'spi/topic/s3c64xx', 'spi/topic/sh' and 'spi/topic/sh-msiof' into spi-next
2016-07-07spi: pxa2xx: Clear all RFT bits in reset_sccr1() on Intel QuarkAndy Shevchenko1-1/+8
It seems the commit e5262d0568dc ("spi: spi-pxa2xx: SPI support for Intel Quark X1000") misses one place to be adapted for Intel Quark, i.e. in reset_sccr1(). Clear all RFT bits when call reset_sccr1() on Intel Quark. Fixes: e5262d0568dc ("spi: spi-pxa2xx: SPI support for Intel Quark X1000") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
2016-07-04spi: pxa2xx: Add support for Intel Kaby Lake PCH-HMika Westerberg1-0/+3
Kaby Lake PCH-H has the same SPI host controller as Skylake. Add these new PCI IDs to the list of supported devices. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-06-21spi: pxa2xx: Switch to SPI core DMA mapping functionalityJarkko Nikula1-7/+21
SPI core provides DMA mapping with scatterlists. Start using it instead of own implementation in spi-pxa2xx. Major difference in addition to bunch of removed boilerplate code is that SPI core does mapping/unmapping for all transfers in a message before and after the message sending where spi-pxa2xx did mapping/unmapping for each transfers separately. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-06-21spi: pxa2xx: Use local struct spi_master pointer in pump_transfers()Jarkko Nikula1-2/+3
We will find more use for struct spi_master pointer in pump_transfers() and code will be more readable if we access it using local pointer than through the drv_data->master. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-05-30spi: pxa2xx: use DMA by default if supportedDan O'Donovan1-9/+1
Currently, even if the PXA2xx SPI master supports DMA, it won't be enabled unless (i) the slave device is enumerated through ACPI, or (ii) the slave device is registered with board-specific controller_data specified. Even then, there isn't a field in the controller_data that explicitly enables dma - it just gets enabled if the master supports it and controller_data is non-NULL. This means that drivers which register SPI devices on a bus without awareness of this controller cannot avail of DMA performance gains. This patch allows DMA transfers to be used if supported. Signed-off-by: Dan O'Donovan <dan@emutex.com> Reviewed-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-05-23Merge remote-tracking branches 'spi/topic/pxa2xx', 'spi/topic/qup', ↵Mark Brown1-4/+10
'spi/topic/rockchip', 'spi/topic/st-ssc4' and 'spi/topic/xlp' into spi-next
2016-05-23Merge remote-tracking branches 'spi/topic/bcm53xx', 'spi/topic/cadence', ↵Mark Brown1-1/+0
'spi/topic/davinci' and 'spi/topic/dln2' into spi-next
2016-04-26spi: Drop duplicate code to set master->dev.parentAxel Lin1-1/+0
It's done by spi_alloc_master(). Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-04-26spi: pxa2xx: Do not detect number of enabled chip selects on Intel SPTJarkko Nikula1-1/+1
Certain Intel Sunrisepoint PCH variants report zero chip selects in SPI capabilities register even they have one per port. Detection in pxa2xx_spi_probe() sets master->num_chipselect to 0 leading to -EINVAL from spi_register_master() where chip select count is validated. Fix this by not using SPI capabilities register on Sunrisepoint. They don't have more than one chip select so use the default value 1 instead of detection. Fixes: 8b136baa5892 ("spi: pxa2xx: Detect number of enabled Intel LPSS SPI chip select signals") Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
2016-03-28spi: pxa2xx: Fix cs_change managementChristophe Ricard1-3/+2
Fix cs_change management so that it is in line with other spi drivers. In the spi core api helpers such as spi_bus_lock/unlock and spi_sync_locked or cs_change field in spi_transfer help to manage chip select from the device driver. The driver was setting the chip select to idle if the message queue was empty despite cs_change or other status field set by spi_bus_lock/unlock or spi_sync_locked. Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-03-28spi: pxa2xx: Use dummy buffers provided by SPI coreJarkko Nikula1-0/+1
Dummy buffer is used for half duplex transfers that don't have TX or RX buffer set. Instead of own dummy buffer management here let the SPI core to handle it by setting the SPI_MASTER_MUST_RX and SPI_MASTER_MUST_TX flags. Then core makes sure both transfer buffers are set. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-03-28spi: pxa2xx: handle error of pxa2xx_spi_dma_prepare()Andy Shevchenko1-1/+7
If by some reason pxa2xx_spi_dma_prepare() fails we have not to ignore its error. In such case we abort the transfer and return the error to upper level. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> [Jarkko: Avoid leaking TX descriptors in case RX descriptor allocation fails. Noted by Robert Jarzmik <robert.jarzmik@free.fr>. Unmap also buffers in case of failure.] Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-03-02spi: pxa2xx: Add support for Intel Broxton B-StepJarkko Nikula1-1/+5
Add support for third Intel Broxton variant and update comment for A-Step variant. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Tested-by: Steve Sakoman <steve.sakoman@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-02-21spi: pxa2xx: Remove unused DMA buffer mappingsJarkko Nikula1-2/+0
Only legacy PXA DMA implementation was using these rx_dma and tx_dma DMA addresses so they are not needed after commit 6356437e65c2 ("spi: spi-pxa2xx: remove legacy PXA DMA bits"). Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-02-09spi: pxa2xx: Add support for both chip selects on Intel BraswellMika Westerberg1-1/+20
Intel Braswell LPSS SPI controller actually has two chip selects and there is no capabilities register where this could be found out. These two chip selects are controlled by bits which are in slightly differrent location than Broxton has. Braswell Windows driver also starts chip select (ACPI DeviceSelection) numbering from 1 so translate it to be suitable for Linux as well. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-02-09spi: pxa2xx: Move chip select control bits into lpss_config structureMika Westerberg1-24/+40
Some Intel LPSS SPI controllers, like the one in Braswell has these bits in a different location so move these bits to be part of the LPSS configuration. Since not all LPSS SPI controllers support multiple native chip selects we refactor selecting chip select to its own function and check control->cs_sel_mask before switching to another chip select. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-02-09spi: pxa2xx: Translate ACPI DeviceSelection to Linux chip select on BaytrailMika Westerberg1-0/+23
The Windows Baytrail SPI host controller driver uses 1 as the first (and only) value for ACPI DeviceSelection like can be seen in DSDT taken from Lenovo Thinkpad 10: Device (FPNT) { ... Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings { Name (UBUF, ResourceTemplate () { SpiSerialBus (0x0001, // DeviceSelection PolarityLow, FourWireMode, 0x08, ControllerInitiated, 0x007A1200, ClockPolarityLow, ClockPhaseFirst, "\\_SB.SPI1", 0x00, ResourceConsumer,,) This will fail to enumerate in Linux with following error: [ 0.241296] pxa2xx-spi 80860F0E:00: cs1 >= max 1 [ 0.241312] spi_master spi32766: failed to add SPI device VFSI6101:00 from ACPI To make the Linux SPI core successfully enumerate the device we provide a custom version of ->fw_translate_cs() that translates DeviceSelection correctly. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-02-04spi: pxa2xx: Fix too early chipselect deassertJarkko Nikula1-0/+7
There is a chance that chipselect is deasserted too early while the last clock cycle is still running. Protocol analyzers will see this as a failed last byte. This is more likely to occur with slow bitrates, for instance at 25 kbps. Reason for this is when using SPI mode 0 that both SPI host controller and SPI slave will drive the data lines at the falling edge of clock signal and sample at the rising edge. Receive FIFO gets the last bit now at the rising edge and code sees transfer to be finished either by the interrupt in PIO mode or by the DMA completion in DMA mode. The SSP Time Out register SSTO should take care of delaying the completion but it does not seems to have effect at least on Intel Skylake and Broxton even when using long enough values. Depending on timing code may get into point where chipselect is deasserted while the last clock cycle is still running at its second half cycle. Fix this by adding a wait loop in giveback() that waits until SSP becomes idle before deasserting the chipselect. Reported-by: Weifeng Voon <weifeng.voon@intel.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-02-04spi: pxa2xx: Update comment in int_transfer_complete()Jarkko Nikula1-1/+1
The register writes here actually don't stop the SSP but clean and disable interrupts and set the receive FIFO inactivity timeout to zero. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-01-27spi: pxa2xx: Print actual DMA/PIO transfer mode in debug messagesJarkko Nikula1-13/+13
Transfer debug messages don't actually show is the transfer really using DMA. Driver may fall back to PIO in case transfer size is not within the certain limits or fails to map DMA buffers but debug messages don't reveal that. Move these debug messages further in pump_transfers() where the actual transfer mode is known and use drv_data->dma_mapped flag instead of chip->enable_dma for printing the mode. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-11-20spi: pxa2xx: Remove redundant call to lpss_ssp_setup() in probeMika Westerberg1-3/+0
Commit 8b136baa5892 ("spi: pxa2xx: Detect number of enabled Intel LPSS SPI chip select signals") added a block where lpss_ssp_setup() gets called again for Intel LPSS SPI host controllers before checking number of chip selects from the capabilities register. There is no point in calling the function twice in probe so remove the first call. Reported-by: Aaron Lu <aaron.lu@intel.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-11-04Merge remote-tracking branches 'spi/topic/omap-100k', ↵Mark Brown1-99/+158
'spi/topic/omap-uwire', 'spi/topic/owner', 'spi/topic/pxa' and 'spi/topic/pxa2xx' into spi-next
2015-10-30spi: pxa2xx: Rework self-initiated platform data creation for non-ACPIJarkko Nikula1-12/+26
Extend the pxa2xx_spi_acpi_get_pdata() so that it can create platform data also on platforms that do not support ACPI or if CONFIG_ACPI is not set. Now it is expected that "pxa2xx-spi" platform device is either created with explicit platform data or has an ACPI companion device. However there is only little in pxa2xx_spi_acpi_get_pdata() that is really dependent on ACPI companion and it can be reworked to cover also cases where "pxa2xx-spi" device doesn't have ACPI companion and is created without platform data. Do this by renaming the pxa2xx_spi_acpi_get_pdata(), moving it outside of CONFIG_ACPI test and changing a few runtime tests there to support non-ACPI case. Only port/bus ID setting based on ACPI _UID is dependent on ACPI and is moved to own function inside CONFIG_ACPI. Purpose of this to support non-ACPI case for those PCI enumerated compound devices that integrate both LPSS SPI host controller and integrated DMA engine under the same PCI ID and which are registered in MFD layer instead of in spi-pxa2xx-pci.c. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-30spi: pxa2xx: Add support for Intel BroxtonJarkko Nikula1-0/+20
LPSS SPI in Intel Broxton is otherwise the same than in Intel Sunrisepoint but it supports up to four chip selects per port and has different FIFO thresholds. Patch adds support for two Broxton SoC variants. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-30spi: pxa2xx: Detect number of enabled Intel LPSS SPI chip select signalsJarkko Nikula1-1/+21
SPI capabilities register located in private registers space of newer Intel LPSS SPI host controllers tell in register bits 12:9 which chip select signals are enabled. Use that information for detecting the number of chip selects. For simplicity we assume chip selects are enabled one after another without disabled chip selects between. For instance CS0 | CS1 | CS2 but not CS0 | CS1 | CS3. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-30spi: pxa2xx: Add output control for multiple Intel LPSS chip selectsJarkko Nikula1-3/+24
Intel LPSS SPI host controllers in upcoming Intel platforms can have up to 4 chip selects per port. Extend chip select control in lpss_ssp_cs_control() by adding a code that selects the active chip select output prior to changing the state. Detection for number of enabled chip select signals will be added by another patch. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-30spi: pxa2xx: Use LPSS prefix for defines that are Intel LPSS specificJarkko Nikula1-8/+8
Rename a few defines that are specific to Intel LPSS SPI private registers with LPSS prefix. It makes easier to distinguish them from common defines. Suggested-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-23spi: pxa2xx: Align a few definesJarkko Nikula1-3/+3
Add more indentation to define lines for making them aligned with the longest one. They would look messy after adding more long defines. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-23spi: pxa2xx: Save other reg_cs_ctrl bits when configuring chip selectJarkko Nikula1-1/+3
Upcoming Intel platforms use LPSS SPI_CS_CONTROL register bits 15:12 for configuring the chip select polarities. Touch only chip select SW mode and state bits when enabling the software chip select control in order to not clear any other bits in the register. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-23spi: pxa2xx: Convert unique ID string of ACPI device as unsigned integerJarkko Nikula1-2/+3
Andy noticed numeric unique device ID is unsigned integer so convert it using kstrtouint(). Actually integer in ACPI 2.0 and later is 64 bits litte-endian unsigned integer but quite certainly having so big value here would mean something extra than just the SPI bus number so it won't hurt to assume only lower 32 bits carry the bus number for now. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Cc: Mika Westerberg <mika.westerberg@linux.intel.com> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-23spi: pxa2xx: derive struct chip_data from struct drv_dataAndy Shevchenko1-2/+3
Since we call pxa2xx_ssp_get_clk_div() from pump_transfers() we may derive pointer to struct chip_data from struct drv_data like it's done in the rest of the functions. This will make it less errorprone. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-23spi: pxa2xx: move debug messages to pump_transfer()Andy Shevchenko1-17/+11
The speed can be changed from transfer to transfer, that's why the messages do not depict the actual values during ->setup(). Move debug messages from ->setup() to pump_transfers(). Get rid of leftovers as well. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-16spi: pxa2xx: choose closest lower speedAndy Shevchenko1-4/+4
As per discussion [1] the best choice is to set closest speed which is not going over the asked one. Do the same approach for Intel Quark boards. [1] http://www.spinics.net/lists/linux-spi/msg03389.html Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-01spi: pxa2xx: Remove empty function pxa2xx_spi_dma_resume()Mika Westerberg1-2/+0
This was leftover from the legacy pxa2xx DMA implementation and not needed anymore so remove it. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-09-25spi: pxa2xx: Use ACPI_COMPANION() instead of acpi_bus_get_device()Jarkko Nikula1-2/+2
Get pointer to the struct acpi_device by using ACPI_COMPANION() macro. This is more efficient than using ACPI_HANDLE() and acpi_bus_get_device(). Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-09-25spi: pxa2xx: Set the max_speed_hz of the masterJarkko Nikula1-6/+6
Carry input clock of the controller in max_speed_hz of struct spi_master instead of in own driver data. They mean the same thing and more over now the max_speed_hz is not even set here. As an added bonus this allows SPI core to validate that transfer speed is not beyond the maximum input clock. This is not a problem in spi-pxa2xx as the driver doesn't use transfer speed parameter directly but via input clock divider calculation which will top at divide by one. However it's better to validate speed before passing it here. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-09-22Merge remote-tracking branches 'spi/fix/atmel', 'spi/fix/bcm2835', ↵Mark Brown1-0/+4
'spi/fix/doc', 'spi/fix/mediatek', 'spi/fix/meson', 'spi/fix/mtk' and 'spi/fix/pxa2xx' into spi-linus
2015-09-17spi: pxa2xx: Remove cr0 variable from struct chip_dataJarkko Nikula1-6/+4
There hasn't been need to carry chip->cr0 after SPI core started to validate speed_hz and bits_per_word transfer parameters. That effectively caused that pump_transfers() always recalculated it and practically chip->cr0 is used locally in setup() for debug prints only. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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