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2020-05-04soc: renesas: Add Renesas R8A7742 config optionLad Prabhakar1-0/+7
Add configuration option for the RZ/G1H (R8A77420) SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Link: https://lore.kernel.org/r/1588197415-13747-2-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-04-30soc: renesas: rcar-rst: Add support for RZ/G1HLad Prabhakar1-0/+1
Add support for RZ/G1H (R8A7742) to the R-Car RST driver. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Link: https://lore.kernel.org/r/1587678050-23468-6-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-04-30soc: renesas: rcar-sysc: Add R8A7742 supportLad Prabhakar5-0/+51
Add support for RZ/G1H (R8A7742) SoC power areas to the R-Car SYSC driver. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Link: https://lore.kernel.org/r/1587678050-23468-4-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-04-03Merge tag 'arm-drivers-5.7' of ↵Linus Torvalds3-11/+11
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM driver updates from Arnd Bergmann: "These are the usual updates for SoC specific device drivers and related subsystems that don't have their own top-level maintainers: - ARM SCMI/SCPI updates to allow pluggable transport layers - TEE subsystem cleanups - A new driver for the Amlogic secure power domain controller - Various driver updates for the NXP Layerscape DPAA2, NXP i.MX SCU and TI OMAP2+ sysc drivers. - Qualcomm SoC driver updates, including a new library module for "protection domain" notifications - Lots of smaller bugfixes and cleanups in other drivers" * tag 'arm-drivers-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (70 commits) soc: fsl: qe: fix sparse warnings for ucc_slow.c soc: fsl: qe: ucc_slow: remove 0 assignment for kzalloc'ed structure soc: fsl: qe: fix sparse warnings for ucc_fast.c soc: fsl: qe: fix sparse warnings for qe_ic.c soc: fsl: qe: fix sparse warnings for ucc.c soc: fsl: qe: fix sparse warning for qe_common.c soc: fsl: qe: fix sparse warnings for qe.c soc: qcom: Fix QCOM_APR dependencies soc: qcom: pdr: Avoid uninitialized use of found in pdr_indication_cb soc: imx: drop COMPILE_TEST for IMX_SCU_SOC firmware: imx: add COMPILE_TEST for IMX_SCU driver soc: imx: gpc: fix power up sequencing soc: imx: increase build coverage for imx8m soc driver soc: qcom: apr: Add avs/audio tracking functionality dt-bindings: soc: qcom: apr: Add protection domain bindings soc: qcom: Introduce Protection Domain Restart helpers devicetree: bindings: firmware: add ipq806x to qcom_scm memory: tegra: Correct debugfs clk rate-range on Tegra124 memory: tegra: Correct debugfs clk rate-range on Tegra30 memory: tegra: Correct debugfs clk rate-range on Tegra20 ...
2020-02-21soc: renesas: Remove ARCH_R8A7795Geert Uytterhoeven2-9/+9
Replace the final user of CONFIG_ARCH_R8A7795 by CONFIG_ARCH_R8A77950 || CONFIG_ARCH_R8A77951, and remove the now unused CONFIG_ARCH_R8A7795 symbol definition. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20200218112449.5723-1-geert+renesas@glider.be
2020-02-17soc: renesas: rcar-sysc: Use the correct style for SPDX License IdentifierNishad Kamdar1-2/+2
This patch corrects the SPDX License Identifier style in header file related to Renesas Soc driver support. It assigns explicit block comment to the SPDX License Identifier. Changes made by using a script provided by Joe Perches here: https://lkml.org/lkml/2019/2/7/46. Suggested-by: Joe Perches <joe@perches.com> Signed-off-by: Nishad Kamdar <nishadkamdar@gmail.com> Link: https://lore.kernel.org/r/20200118124856.GA3421@nishad Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-02-10ARM: shmobile: Enable ARM_GLOBAL_TIMER on Cortex-A9 MPCore SoCsGeert Uytterhoeven1-0/+2
SH-Mobile AG5 and R-Car H1 SoCs are based on the Cortex-A9 MPCore, which includes a global timer. Enable the ARM global timer on these SoCs, which will be used for: - the scheduler clock, improving scheduler accuracy from 10 ms to 3 or 4 ns, - delay loops, allowing removal of calls to shmobile_init_delay() from the corresponding machine vectors. Note that when using an old DTB lacking the global timer, the kernel will still work. However, loops-per-jiffies will no longer be preset, and the delay loop will need to be calibrated during boot. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20191211135222.26770-5-geert+renesas@glider.be
2020-01-06soc: renesas: Add ARCH_R8A7795[01] for existing R-Car H3Geert Uytterhoeven1-0/+8
Despite using the same compatible values ("r8a7795"-based) because of historical reasons, R-Car H3 ES1.x (R8A77950) and R-Car H3 ES2.0+ (R8A77951) are really different SoCs, with different part numbers. Reflect this in the SoC configuration, by adding CONFIG_ARCH_R8A77950 and CONFIG_ARCH_R8A77951 as new config symbols. These are intended to replace CONFIG_ARCH_R8A7795, and will allow making support for early SoC revisions optional. Note that for now, CONFIG_ARCH_R8A7795 is retained, and just selects CONFIG_ARCH_R8A77950 and CONFIG_ARCH_R8A77951. This relaxes dependencies of other subsystems on the SoC configuration symbol, and provides a smooth transition path for config files through "make oldconfig". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20191217183841.432-6-geert+renesas@glider.be
2020-01-06soc: renesas: rcar-rst: Fix __iomem on configure callBen Dooks (Codethink)1-1/+1
The configure call back takes a register pointer, so should have been marked with __iomem. Add this to silence the following sparse warnings: drivers/soc/renesas/rcar-rst.c:33:22: warning: incorrect type in initializer (incompatible argument 1 (different address spaces)) drivers/soc/renesas/rcar-rst.c:33:22: expected int ( *configure )( ... ) drivers/soc/renesas/rcar-rst.c:33:22: got int ( * )( ... ) drivers/soc/renesas/rcar-rst.c:97:40: warning: incorrect type in argument 1 (different address spaces) drivers/soc/renesas/rcar-rst.c:97:40: expected void *base drivers/soc/renesas/rcar-rst.c:97:40: got void [noderef] <asn:2> *[assigned] base Signed-off-by: Ben Dooks (Codethink) <ben.dooks@codethink.co.uk> Link: https://lore.kernel.org/r/20191218135230.2610161-1-ben.dooks@codethink.co.uk Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-12-13soc: renesas: Remove ARCH_R8A7796Geert Uytterhoeven1-5/+1
All users of CONFIG_ARCH_R8A7796 have been updated to use CONFIG_ARCH_R8A77960, so the former can be removed. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20191211100510.7182-1-geert+renesas@glider.be
2019-11-01soc: renesas: rcar-sysc: Add R8A77961 supportGeert Uytterhoeven5-13/+26
Add support for the power areas in the Renesas R-Car M3-W+ (R8A77961) SoC to the R-Car System Controller driver. R-Car M3-W+ (aka R-Car M3-W ES3.0) is very similar to R-Car M3-W (R8A77960), which allows for both SoCs to share a driver: - R-Car M3-W+ lacks the A2VC power area, so its area must be nullified, - The existing support for the SYSCEXTMASK register added in commit 9bd645af9d2a49ac ("soc: renesas: r8a7796-sysc: Fix power request conflicts") applies to ES3.0 and later only. As R-Car M3-W+ uses a different compatible value, differentiate based on that, instead of on the ES version. Based on a patch in the BSP by Dien Pham <dien.pham.ry@renesas.com>. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20191023123342.13100-7-geert+renesas@glider.be
2019-11-01soc: renesas: rcar-rst: Add R8A77961 supportGeert Uytterhoeven1-0/+1
Add support for the Reset block in the R-Car M3-W+ (R8A77961) SoC to the Renesas R-Car RST driver. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20191023123342.13100-6-geert+renesas@glider.be
2019-11-01soc: renesas: Identify R-Car M3-W+Geert Uytterhoeven1-0/+3
Add support for identifying the R-Car M3-W+ (R8A77961) SoC, which shares the Product ID Number with R-Car M3-W (R8A77960), but differs in CUT Number (Ver. 3.0), and uses a different compatible value. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20191023123342.13100-5-geert+renesas@glider.be
2019-11-01soc: renesas: Add ARCH_R8A77961 for new R-Car M3-W+Geert Uytterhoeven1-0/+6
Add CONFIG_ARCH_R8A77961 as a configuration symbol for the new Renesas R-Car M3-W+ (R8A77961) SoC. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20191023123342.13100-4-geert+renesas@glider.be
2019-11-01soc: renesas: Add ARCH_R8A77960 for existing R-Car M3-WGeert Uytterhoeven2-3/+7
Add CONFIG_ARCH_R8A77960 as a new config symbol for R-Car M3-W (R8A77960), to replace CONFIG_ARCH_R8A7796, and avoid confusion with R-Car M3-W+ (R8A77961), which will use CONFIG_ARCH_R8A77961. Note that for now, CONFIG_ARCH_R8A7796 is retained, and just selects CONFIG_ARCH_R8A77960. This relaxes dependencies of other subsystems on the SoC configuration symbol, and provides a smooth transition path for config files through "make oldconfig". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20191023123342.13100-3-geert+renesas@glider.be
2019-11-01soc: renesas: Rename SYSC_R8A7796 to SYSC_R8A77960Geert Uytterhoeven5-10/+10
Rename CONFIG_SYSC_R8A7796 for R-Car M3-W (R8A77960) to CONFIG_SYSC_R8A77960, to avoid confusion with R-Car M3-W+ (R8A77961), which will use CONFIG_SYSC_R8A77961. Rename r8a7796_sysc_info and r8a7796_sysc_init for consistency. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20191023123342.13100-2-geert+renesas@glider.be
2019-11-01soc: renesas: Add missing check for non-zero product register addressGeert Uytterhoeven1-1/+1
If the DTB for a device with an RZ/A2 SoC lacks a device node for the BSID register, the ID validation code falls back to using a register at address 0x0, which leads to undefined behavior (e.g. reading back a random value). This could be fixed by letting fam_rza2.reg point to the actual BSID register. However, the hardcoded fallbacks were meant for backwards compatibility with old DTBs only, not for new SoCs. Hence fix this by validating renesas_family.reg before using it. Fixes: 175f435f44b724e3 ("soc: renesas: identify RZ/A2") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20191016143306.28995-1-geert+renesas@glider.be
2019-10-01soc: renesas: rcar-sysc: Add r8a774b1 supportBiju Das5-0/+47
Add support for RZ/G2N (R8A774B1) SoC power areas to the R-Car SYSC driver. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Link: https://lore.kernel.org/r/1569223780-54304-1-git-send-email-biju.das@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-10-01soc: renesas: rcar-sysc: Remove unneeded inclusion of <linux/bug.h>Geert Uytterhoeven17-17/+0
No R-Car or RZ/G SYSC driver uses any of the definitions provided by <linux/bug.h>, hence there is no need to include this header file. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Link: https://lore.kernel.org/r/20190920144705.27394-1-geert+renesas@glider.be
2019-10-01soc: renesas: r8a774c0-sysc: Fix power request conflictsGeert Uytterhoeven1-0/+3
Describe the location and contents of the SYSCEXTMASK register on RZ/G2E, to prevent conflicts between internal and external power requests. Based on a patch in the BSP by Dien Pham <dien.pham.ry@renesas.com>. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Link: https://lore.kernel.org/r/20190920143523.23125-1-geert+renesas@glider.be
2019-10-01soc: renesas: rcar-rst: Add support for RZ/G2NBiju Das1-0/+1
Add support for RZ/G2N (R8A774B1) to the R-Car RST driver. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Link: https://lore.kernel.org/r/1568881036-4404-5-git-send-email-biju.das@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-10-01soc: renesas: Identify RZ/G2NBiju Das1-0/+8
This patch adds support for identifying the RZ/G2N (r8a774b1) SoC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Link: https://lore.kernel.org/r/1567675844-19247-3-git-send-email-biju.das@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-10-01soc: renesas: Add Renesas R8A774B1 config optionBiju Das1-0/+6
Add configuration option for the RZ/G2N (R8A774B1) SoC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Link: https://lore.kernel.org/r/1567675844-19247-4-git-send-email-biju.das@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-10-01soc: renesas: r8a77990-sysc: Fix power request conflictsGeert Uytterhoeven1-0/+3
Describe the location and contents of the SYSCEXTMASK register on R-Car E3, to prevent conflicts between internal and external power requests. Based on a patch in the BSP by Dien Pham <dien.pham.ry@renesas.com>. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Link: https://lore.kernel.org/r/20190828113618.6672-8-geert+renesas@glider.be
2019-10-01soc: renesas: r8a77980-sysc: Fix power request conflictsGeert Uytterhoeven1-0/+3
Describe the location and contents of the SYSCEXTMASK register on R-Car V3H, to prevent conflicts between internal and external power requests. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Link: https://lore.kernel.org/r/20190828113618.6672-7-geert+renesas@glider.be
2019-10-01soc: renesas: r8a77970-sysc: Fix power request conflictsGeert Uytterhoeven1-0/+3
Describe the location and contents of the SYSCEXTMASK register on R-Car V3M, to prevent conflicts between internal and external power requests. Based on a patch in the BSP by Dien Pham <dien.pham.ry@renesas.com>. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Link: https://lore.kernel.org/r/20190828113618.6672-6-geert+renesas@glider.be
2019-10-01soc: renesas: r8a77965-sysc: Fix power request conflictsGeert Uytterhoeven1-0/+3
Describe the location and contents of the SYSCEXTMASK register on R-Car M3-N, to prevent conflicts between internal and external power requests. Based on a patch in the BSP by Dien Pham <dien.pham.ry@renesas.com>. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Link: https://lore.kernel.org/r/20190828113618.6672-5-geert+renesas@glider.be
2019-10-01soc: renesas: r8a7796-sysc: Fix power request conflictsGeert Uytterhoeven2-2/+22
Describe the location and contents of the SYSCEXTMASK register on R-Car M3-W, to prevent conflicts between internal and external power requests. This register does not exist on R-Car M3-W ES1.x. Based on a patch in the BSP by Dien Pham <dien.pham.ry@renesas.com>. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Link: https://lore.kernel.org/r/20190828113618.6672-4-geert+renesas@glider.be
2019-10-01soc: renesas: r8a7795-sysc: Fix power request conflictsGeert Uytterhoeven2-6/+28
Describe the location and contents of the SYSCEXTMASK register on R-Car H3, to prevent conflicts between internal and external power requests. This register does not exist on R-Car H3 ES1.x and ES2.x. Based on a patch in the BSP by Dien Pham <dien.pham.ry@renesas.com>. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Link: https://lore.kernel.org/r/20190828113618.6672-3-geert+renesas@glider.be
2019-10-01soc: renesas: rcar-sysc: Prepare for fixing power request conflictsGeert Uytterhoeven2-0/+19
Recent R-Car Gen3 SoCs added an External Request Mask Register to the System Controller (SYSC). This register allows to mask external power requests for CPU or 3DG domains, to prevent conflicts between powering off CPU cores or the 3D Graphics Engine, and changing the state of another power domain through SYSC, which could lead to CPG state machine lock-ups. Add support for making use of this register. Take into account that the register is optional, and that its location and contents are SoC-specific. Note that the issue fixed by this cannot happen in the upstream kernel, as upstream has no support for graphics acceleration yet. SoCs lacking the External Request Mask Register may need a different mitigation in the future. Inspired by a patch in the BSP by Dien Pham <dien.pham.ry@renesas.com>. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Link: https://lore.kernel.org/r/20190828113618.6672-2-geert+renesas@glider.be
2019-08-23soc: renesas: Enable ARM_ERRATA_754322 for affected Cortex-A9Geert Uytterhoeven1-0/+5
ARM Erratum 754322 affects Cortex-A9 revisions r2p* and r3p*. Automatically enable support code to mitigate the erratum when compiling a kernel for any of the affected Renesas SoCs: - RZ/A1: r3p0, - R-Mobile A1: r2p4, - R-Car M1A: r2p2-00rel0, - R-Car H1: r3p0, - SH-Mobile AG5: r2p2. EMMA Mobile EV2 (r1p3) and RZ/A2 (r4p1) are not affected. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
2019-08-23soc: renesas: Enable ARM_ERRATA_814220 for affected Cortex-A7Geert Uytterhoeven1-0/+6
ARM Erratum 814220 affects Cortex-A7 revisions r0p2-r0p5. Automatically enable support code to mitigate the erratum when compiling a kernel for any of the affected Renesas SoCs: - R-Mobile APE6: r0p2, - RZ/G1E: r0p5, - RZ/G1C: r0p5, - R-Car H2: r0p3, - R-Car E2: r0p5, - RZ/N1: r0p5. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
2019-08-23soc: renesas: rmobile-sysc: Set GENPD_FLAG_ALWAYS_ON for always-on domainGeert Uytterhoeven1-15/+16
Currently the R-Mobile "always-on" PM Domain is implemented by returning -EBUSY from the generic_pm_domain.power_off() callback, and doing nothing in the generic_pm_domain.power_on() callback. However, this means the PM Domain core code is not aware of the semantics of this special domain, leading to boot warnings like the following on SH/R-Mobile SoCs: sh_cmt e6130000.timer: PM domain c5 will not be powered off Fix this by making the always-on nature of the domain explicit instead, by setting the GENPD_FLAG_ALWAYS_ON flag. This removes the need for the domain to provide power control callbacks. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-08-19soc: renesas: rcar-sysc: Eliminate local variable govGeert Uytterhoeven1-2/+1
As of commit 980532a5dda319ee ("soc: renesas: rcar-sysc: Use GENPD_FLAG_ALWAYS_ON"), the local variable "gov" is assigned just once, so it can be eliminated. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
2019-08-19soc: renesas: rcar-sysc: Add goto to of_node_put() before returnNishka Dasgupta1-1/+1
The local variable np in function rcar_sysc_pd_init takes the return value of of_find_matching_node_and_match(), which gets a node but does not put it. If np is not put before the function returns, it may cause a memory leak. Hence, remove the return statement that does not immediately follow a putting of np. Replace it with a goto pointing to a pre-existing label that first puts np and then returns the required value. Issue found with Coccinelle. Fixes: afa6f53df6052968 ("soc: renesas: rcar-sysc: Add support for fixing up power area tables") Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-07-29soc: renesas: rcar-sysc: Use [] to denote a flexible array memberGeert Uytterhoeven1-1/+1
Flexible array members should be denoted using [] instead of [0], else gcc will not warn when they are no longer at the end of the structure. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
2019-06-06soc: renesas: Enable RZ/A1 IRQC on RZ/A1H and RZ/A2MGeert Uytterhoeven1-1/+3
Auto-enable support for the RZ/A1 Interrupt Controller when configuring a kernel which supports RZ/A1H or RZ/A2M SoCs. Keep selects sorted while at it. This is similar to how interrupt controllers for other Renesas SoCs are enabled. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-03-18soc: renesas: Identify R-Car M3-W ES1.3Takeshi Kihara1-0/+3
The Product Register of R-Car M3-W ES1.3 incorrectly identifies the SoC revision as ES2.1. Add a workaround to fix this. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-07soc: renesas: r8a774c0-sysc: Fix initialization order of 3DG-{A,B}Biju Das1-19/+4
The workaround for the wrong hierarchy of the 3DG-{A,B} power domains on RZ/G2E ES1.0 corrected the parent domains. However, the 3DG-{A,B} power domains were still initialized and powered in the wrong order, causing 3DG operation to fail. Fix this by changing the order in the table at runtime, when running on an affected SoC. This work is based on the work done by Geert for R-Car E3. Fixes: f37d211c687588328 ("soc: renesas: rcar-sysc: Add r8a774c0 support") Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-07ARM: shmobile: fix build regressionsArnd Bergmann1-1/+1
A number of Kconfig options have become available now to random ARM platforms outside of ARCH_MULTIPLATFORM, which now causes Kconfig warnings, and other build errors when those select options that lack additional dependencies, e.g.: WARNING: unmet direct dependencies detected for HAVE_ARM_ARCH_TIMER Depends on [n]: CPU_V7 [=n] Selected by [y]: - ARCH_RCAR_GEN2 [=y] && SOC_RENESAS [=y] - ARCH_R8A73A4 [=y] && SOC_RENESAS [=y] && ARM [=y] WARNING: unmet direct dependencies detected for SYS_SUPPORTS_EM_STI Depends on [n]: GENERIC_CLOCKEVENTS [=n] Selected by [y]: - ARCH_EMEV2 [=y] && SOC_RENESAS [=y] && ARM [=y] Put the old dependency on ARCH_RENESAS back for the moment to restore the previous behavior. Fixes: 062887bf5ef7 ("ARM: shmobile: Move SoC Kconfig symbols to drivers/soc/renesas/") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-12-31Merge tag 'armsoc-drivers' of ↵Linus Torvalds5-75/+29
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver updates from Olof Johansson: "Misc driver updates for platforms, many of them power related. - Rockchip adds power domain support for rk3066 and rk3188 - Amlogic adds a power measurement driver - Allwinner adds SRAM support for three platforms (F1C100, H5, A64 C1) - Wakeup and ti-sysc (platform bus) fixes for OMAP/DRA7 - Broadcom fixes suspend/resume with Thumb2 kernels, and improves stability of a handful of firmware/platform interfaces - PXA completes their conversion to dmaengine framework - Renesas does a bunch of PM cleanups across many platforms - Tegra adds support for suspend/resume on T186/T194, which includes some driver cleanups and addition of wake events - Tegra also adds a driver for memory controller (EMC) on Tegra2 - i.MX tweaks power domain bindings, and adds support for i.MX8MQ in GPC - Atmel adds identifiers and LPDDR2 support for a new SoC, SAM9X60 and misc cleanups across several platforms" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (73 commits) ARM: at91: add support in soc driver for new SAM9X60 ARM: at91: add support in soc driver for LPDDR2 SiP memory: omap-gpmc: Use of_node_name_eq for node name comparisons bus: ti-sysc: Check for no-reset and no-idle flags at the child level ARM: OMAP2+: Check also the first dts child for hwmod flags soc: amlogic: meson-clk-measure: Add missing REGMAP_MMIO dependency soc: imx: gpc: Increase GPC_CLK_MAX to 7 soc: renesas: rcar-sysc: Fix power domain control after system resume soc: renesas: rcar-sysc: Merge PM Domain registration and linking soc: renesas: rcar-sysc: Remove rcar_sysc_power_{down,up}() helpers soc: renesas: r8a77990-sysc: Fix initialization order of 3DG-{A,B} dt-bindings: sram: sunxi: Add compatible for the A64 SRAM C1 dt-bindings: sram: sunxi: Add bindings for the H5 with SRAM C1 dt-bindings: sram: Add Allwinner suniv F1C100s soc: sunxi: sram: Add support for the H5 SoC system control soc: sunxi: sram: Enable EMAC clock access for H3 variant soc: imx: gpcv2: add support for i.MX8MQ SoC soc: imx: gpcv2: move register access table to domain data soc: imx: gpcv2: prefix i.MX7 specific defines dmaengine: pxa: make the filter function internal ...
2018-12-06soc: renesas: rcar-sysc: Fix power domain control after system resumeGeert Uytterhoeven1-19/+9
To control power to a power domain, the System Controller (SYSC) needs the corresponding interrupt source to be enabled, but masked, to prevent the CPU from receiving it. Currently this is handled in the driver's probe() routine, and set up for every domain present, even if it will not be controlled directly by SYSC (CPU domains are powered through the APMU on R-Car Gen2 and later). On R-Car Gen3, PSCI powers down the SoC during system suspend, thus losing any configured interrupt state. Hence after system resume, power domains not controlled through the APMU (e.g. A3IR, A3VC, A3VP) fail to power up. Fix this by replacing the global interrupt setup in the probe() routine by a domain-specific interrupt setup in rcar_sysc_power(), where the domain's power is actually controlled. This brings the code more in line with the flowchart in the Hardware User's Manual. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-12-06soc: renesas: rcar-sysc: Merge PM Domain registration and linkingGeert Uytterhoeven1-13/+5
Commit 977d5ba4507dfe5b ("soc: renesas: rcar-sysc: Make PM domain initialization more robust") split PM Domain registration and the linking of children to their parents, to accommodate PM Domain tables that list child domains before their parents. However, this failed to realize that parent power domains must be powered up before their children anyway, and that this thus must be reflected by the order in the PM Domain tables. Revert the split, as it did not help anyway. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-12-06soc: renesas: rcar-sysc: Remove rcar_sysc_power_{down,up}() helpersGeert Uytterhoeven1-15/+4
Until commit 7e8a50df26f4e700 ("soc: renesas: rcar-sysc: Drop legacy handling"), the rcar_sysc_power_{down,up}() helpers were public, as they were called by the legacy (pre-DT) CPU power management code on R-Car H1 and R-Car Gen2 before. As they are just one-line wrappers around rcar_sysc_power(), it makes sense to just remove them. This also avoids a bool/helper/bool conversion in rcar_sysc_power_cpu(), where a bool is checked to call one of two helper functions, which just call rcar_sysc_power() with hardcoded boolean values again. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-12-06soc: renesas: r8a77990-sysc: Fix initialization order of 3DG-{A,B}Geert Uytterhoeven1-19/+4
The workaround for the wrong hierarchy of the 3DG-{A,B} power domains on R-Car E3 ES1.0 corrected the parent domains. However, the 3DG-{A,B} power domains were still initialized and powered in the wrong order, causing 3DG operation to fail. Fix this by changing the order in the table at runtime, when running on an affected SoC. Fixes: 086b399965a7ee7e ("soc: renesas: r8a77990-sysc: Add workaround for 3DG-{A,B}") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-11-30ARM: shmobile: R-Mobile: Move pm-rmobile to drivers/soc/renesas/Geert Uytterhoeven3-1/+359
The pm-rmobile driver is really a driver for the System Controller (SYSC) found in R-Mobile SoCs. An equivalent driver for R-Car SoCs is already located under drivers/soc/renesas/. Hence move the pm-rmobile driver from arch/arm/mach-shmobile/ to drivers/soc/renesas/, and rename it to rmobile-sysc. Enable compile-testing on non-ARM and non-R-Mobile SoCs. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-11-30soc: renesas: r8a77980-sysc: Correct A3VIP[012] power domain hierarchyGeert Uytterhoeven1-3/+3
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018) renamed the A3VIP power domain on R-Car V3H to A3VIP0, and clarified the power domain hierarchy for the A3VIP[012] power domains. As the definition for the A3VIP0 domain is not yet used from DT, it can just be renamed. Fixes: 7755b40d07a8dba7 ("dt-bindings: power: add R8A77980 SYSC power domain definitions") Fixes: 41d6d8bd8ae94ca9 ("soc: renesas: rcar-sysc: add R8A77980 support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-11-30soc: renesas: r8a77980-sysc: Correct names of A2DP[01] power domainsGeert Uytterhoeven1-2/+2
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018) renamed the A2PD0 and A2DP0 power domains on R-Car V3H to A2DP0 resp. A2DP1. As these definitions are not yet used from DT, they can just be renamed. Fixes: 7755b40d07a8dba7 ("dt-bindings: power: add R8A77980 SYSC power domain definitions") Fixes: 41d6d8bd8ae94ca9 ("soc: renesas: rcar-sysc: add R8A77980 support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-11-30soc: renesas: r8a77970-sysc: Correct names of A2DP/A2CN power domainsGeert Uytterhoeven1-2/+2
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018) renamed the A2IR2 and A2IR3 power domains on R-Car V3M to A2DP resp. A2CN. As these definitions are not yet used from DT, they can just be renamed. While at it, fix the indentation of the A3IR definition. Fixes: 833bdb47c826a1a6 ("dt-bindings: power: add R8A77970 SYSC power domain definitions") Fixes: bab9b2a74fe9da96 ("soc: renesas: rcar-sysc: add R8A77970 support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-11-30soc: renesas: r8a77970-sysc: Remove non-existent CR7 power domainGeert Uytterhoeven1-1/+0
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018) removed the CR7 power domain on R-Car V3M, as this SoC does not have an ARM Cortex-R7 Realtime Core. As this definition was never used from DT, it can just be removed. Fixes: 833bdb47c826a1a6 ("dt-bindings: power: add R8A77970 SYSC power domain definitions") Fixes: bab9b2a74fe9da96 ("soc: renesas: rcar-sysc: add R8A77970 support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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