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path: root/drivers/pwm/pwm-rockchip.c
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2019-09-21pwm: Ensure pwm_apply_state() doesn't modify the state argumentUwe Kleine-König1-2/+2
It is surprising for a PWM consumer when the variable holding the requested state is modified by pwm_apply_state(). Consider for example a driver doing: #define PERIOD 5000000 #define DUTY_LITTLE 10 ... struct pwm_state state = { .period = PERIOD, .duty_cycle = DUTY_LITTLE, .polarity = PWM_POLARITY_NORMAL, .enabled = true, }; pwm_apply_state(mypwm, &state); ... state.duty_cycle = PERIOD / 2; pwm_apply_state(mypwm, &state); For sure the second call to pwm_apply_state() should still have state.period = PERIOD and not something the hardware driver chose for a reason that doesn't necessarily apply to the second call. So declare the state argument as a pointer to a const type and adapt all drivers' .apply callbacks. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-09-21pwm: rockchip: Don't update the state for the caller of pwm_apply_state()Uwe Kleine-König1-6/+0
The pwm-rockchip driver is one of only three PWM drivers which updates the state for the caller of pwm_apply_state(). This might have surprising results if the caller reuses the values expecting them to still represent the same state. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-09-21pwm: rockchip: Set polarity unconditionally in .get_state()Uwe Kleine-König1-4/+4
Don't rely on *state being zero initialized and PWM_POLARITY_NORMAL being zero. So always assign .polarity. Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-19treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500Thomas Gleixner1-4/+1
Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-18pwm: rockchip: Add rk3328 supportDavid Wu1-2/+41
The rk3328 SoC supports atomic update, we could lock the configuration of period and duty at first, after unlock is configured, the period and duty are effective at the same time. If the polarity, period and duty need to be configured together, the way for atomic update is "configure lock and old polarity" -> "configure period and duty" -> "configure unlock and new polarity". Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-08-18pwm: rockchip: Use same PWM ops for each IPDavid Wu1-111/+38
Just use the same PWM ops for each IP, and get rid of the ops in struct rockchip_pwm_data, but still define the three different instances of the struct to use common interface for each IP. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-08-18pwm: rockchip: Move the configuration of polarityDavid Wu1-24/+24
It is usually possible to configure the polarity, cycle and duty all at once, so that the polarity and cycle and duty are applied atomically. Move it from rockchip_pwm_set_enable() into rockchip_pwm_config(), as well as prepare for the next atomic update commit. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-08-18pwm: rockchip: Use pwm_apply() instead of pwm_enable()David Wu1-63/+78
Drop the custom hook of pwm_enable() and implement pwm_apply_v1() and pwm_apply_v2() instead. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-08-18pwm: rockchip: Remove the judge from return value of pwm_config()David Wu1-10/+2
It seems the rockchip_pwm_config() always returns the result 0, so remove the judge. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-08-18pwm: rockchip: Add APB and function both clocks supportDavid Wu1-9/+49
New PWM module provides two individual clocks for APB clock and function clock. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-04-06pwm: rockchip: State of PWM clock should synchronize with PWM enabled stateDavid Wu1-7/+33
If the PWM was not enabled at U-Boot loader, PWM could not work for clock always disabled at PWM driver. The PWM clock is enabled at beginning of pwm_apply(), but disabled at end of pwm_apply(). If the PWM was enabled at U-Boot loader, PWM clock is always enabled unless closed by ATF. The pwm-backlight might turn off the power at early suspend, should disable PWM clock for saving power consume. It is important to provide opportunity to enable/disable clock at PWM driver, the PWM consumer should ensure correct order to call PWM enable and disable, and PWM driver ensure state of PWM clock synchronized with PWM enabled state. Fixes: 2bf1c98aa5a4 ("pwm: rockchip: Add support for atomic update") Cc: stable@vger.kernel.org Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-07-11pwm: rockchip: Add support for atomic updateBoris Brezillon1-41/+43
Implement the ->apply() function to add support for atomic update. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Brian Norris <briannorris@chromium.org> Tested-by: Brian Norris <briannorris@chromium.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-07-11pwm: rockchip: Avoid glitches on already running PWMsBoris Brezillon1-1/+19
The current logic will disable the PWM clk even if the PWM was left enabled by the bootloader (because it's controlling a critical device like a regulator for example). Keep the PWM clk enabled if the PWM is enabled to avoid any glitches. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Reviewed-by: Brian Norris <briannorris@chromium.org> Tested-by: Brian Norris <briannorris@chromium.org> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-07-11pwm: rockchip: Add support for hardware readoutBoris Brezillon1-0/+67
Implement the ->get_state() function to expose initial state. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Reviewed-by: Brian Norris <briannorris@chromium.org> Tested-by: Brian Norris <briannorris@chromium.org> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-07-11pwm: rockchip: Fix period and duty cycle approximationBoris Brezillon1-4/+3
The current implementation always round down the duty and period values, while it would be better to round them to the closest integer. These changes are needed in preparation of atomic update support to prevent a period/duty cycle drift when executing several times the 'pwm_get_state() / modify / pwm_apply_state()' sequence. Say you have an expected period of 3.333 us and a clk rate of 112.666667 MHz -- the clock frequency doesn't divide evenly, so the period (stashed in nanoseconds) shrinks when we convert to the register value and back, as follows: pwm_apply_state(): register = period * 112666667 / 1000000000; pwm_get_state(): period = register * 1000000000 / 112666667; or in other words: period = period * 112666667 / 1000000000 * 1000000000 / 112666667; which yields a sequence like: 3333 -> 3328 3328 -> 3319 3319 -> 3310 3310 -> 3301 3301 -> 3292 3292 -> ... (etc) ... With this patch, we'd see instead: period = div_round_closest(period * 112666667, 1000000000) * 1000000000 / 112666667; which yields a stable sequence: 3333 -> 3337 3337 -> 3337 3337 -> ... (etc) ... Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Reviewed-by: Brian Norris <briannorris@chromium.org> Tested-by: Brian Norris <briannorris@chromium.org> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-07-20pwm: Make use of pwm_get_xxx() helpers where appropriateBoris Brezillon1-1/+1
Use the pwm_get_xxx() helpers instead of directly accessing the fields in struct pwm_device. This will allow us to smoothly move to the atomic update approach. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-08-26pwm: rockchip: Allow polarity invert on rk3288Doug Anderson1-9/+48
The rk3288 has the ability to invert the polarity of the PWM. Let's enable that ability. Note that this increases pwm_cells to 3 for rk3288. Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-by: Caesar Wang <caesar.wang@rock-chips.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-08-08pwm: rockchip: Added to support for RK3288 SoCCaesar Wang1-24/+111
This patch added to support the PWM controller found on RK3288 SoC. Signed-off-by: Caesar Wang <caesar.wang@rock-chips.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-07-11pwm: add Rockchip SoC PWM supportBeniamino Galvani1-0/+177
This commit adds a driver for the PWM controller found on Rockchip RK29, RK30 and RK31 SoCs. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
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