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path: root/drivers/pwm/pwm-mediatek.c
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2018-08-20pwm: mediatek: Add MT7628 supportJohn Crispin1-1/+18
Add support for MT7628. The SoC is legacy MIPS and hence has no complex clock tree. This patch add an extra flag to the SoC specific data indicating, that no clocks are present. Signed-off-by: John Crispin <john@phrozen.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-03-28pwm: mediatek: Improve precision in rate calculationSean Wang1-5/+12
Add a way that turning resolution from in nanosecond into in picosecond to improve noticeably almost 4.5% precision. It's necessary to hold the new resolution with type u64 and thus related operations on u64 are applied instead in those rate calculations. And the patch has a dependency on [1]. [1] http://lists.infradead.org/pipermail/linux-mediatek/2018-March/012225.html Cc: stable@vger.kernel.org Fixes: caf065f8fd58 ("pwm: Add MediaTek PWM support") Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-03-28pwm: mediatek: Remove redundant MODULE_ALIAS entriesSean Wang1-1/+0
MODULE_ALIAS exports information to allow the module to be auto-loaded at boot for the drivers registered using legacy platform registration. However, currently the driver is always used by DT-only platform, MODULE_ALIAS is redundant and should be removed properly. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-03-28pwm: mediatek: Fix up PWM4 and PWM5 malfunction on MT7623Sean Wang1-3/+21
Since the offset for both registers, PWMDWIDTH and PWMTHRES, used to control PWM4 or PWM5 are distinct from the other PWMs, whose wrong programming on PWM hardware causes waveform cannot be output as expected. Thus, the patch adds the extra condition for fixing up the weird case to let PWM4 or PWM5 able to work on MT7623. v1 -> v2: use pwm45_fixup naming instead of pwm45_quirk v2 -> v3: add more tags for Reviewed-by, Fixes, and Cc stable Cc: stable@vger.kernel.org Fixes: caf065f8fd58 ("pwm: Add MediaTek PWM support") Signed-off-by: Sean Wang <sean.wang@mediatek.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Cc: Zhi Mao <zhi.mao@mediatek.com> Cc: John Crispin <john@phrozen.org> Cc: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-11-15pwm: mediatek: Add MT2712/MT7622 supportZhi Mao1-9/+44
Add support for MT2712 and MT7622. Due to register offset address of pwm7 for MT2712 is not fixed 0x40, add mtk_pwm_reg_offset array for PWM register offset. Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Zhi Mao <zhi.mao@mediatek.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-08-21pwm: mediatek: Disable clock on PWM configuration failureZhi Mao1-1/+6
Make sure to disable the PWM clock if the PWM cannot be configured due to the clock divider exceeding the maximum value. While at it, replace the hardcoded maximum clock divider with a defined constant to improve code readability. Signed-off-by: Zhi Mao <zhi.mao@mediatek.com> Acked-by: John Crispin <john@phrozen.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-08-21pwm: mediatek: Fix clock control issueZhi Mao1-22/+47
In order to save some power, do not prepare the top and main clocks during mtk_pwm_probe(). Instead, prepare the clocks only when necessary and also make sure to enable the clocks to match the semantics of the common clock framework. While at it, don't explicitly disable all PWM channels in ->remove() because all users should have done that already. Signed-off-by: Zhi Mao <zhi.mao@mediatek.com> Acked-by: John Crispin <john@phrozen.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-08-21pwm: mediatek: Fix PWM source clock selectionZhi Mao1-1/+1
In original code, the PWM output frequency is not correct when set bit<3>=1 to PWMCON register. Signed-off-by: Zhi Mao <zhi.mao@mediatek.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: John Crispin <john@phrozen.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-04-13pwm: mediatek: Don't explicitly set .ownerkbuild test robot1-1/+0
drivers/pwm/pwm-mediatek.c:210:3-8: No need to set .owner here. The core will do it. Remove .owner field if calls are used which set it automatically Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci CC: John Crispin <john@phrozen.org> Signed-off-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-04-06pwm: Add MediaTek PWM supportJohn Crispin1-0/+220
This patch adds support for the PWM core found on current ARM base SoCs made by MediaTek. This IP core supports 5 channels and has 2 operational modes. There is the old mode, which is a classical PWM and the new mode which allows the user to define bitmasks that get clocked out on the pins. As the subsystem currently only supports PWM cores with the "old" mode, we can safely ignore the "new" mode for now. Signed-off-by: John Crispin <john@phrozen.org> [thierry.reding@gmail.com: minor cleanups] Signed-off-by: Thierry Reding <thierry.reding@gmail.com>