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path: root/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
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2019-12-31pinctrl: sh-pfc: r8a7778: Fix duplicate SDSELF_B and SD1_CLK_BGeert Uytterhoeven1-2/+2
The FN_SDSELF_B and FN_SD1_CLK_B enum IDs are used twice, which means one set of users must be wrong. Replace them by the correct enum IDs. Fixes: 87f8c988636db0d4 ("sh-pfc: Add r8a7778 pinmux support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20191218194812.12741-2-geert+renesas@glider.be
2019-06-04pinctrl: sh-pfc: r8a7778: Use new macros for non-GPIO pinsGeert Uytterhoeven1-13/+16
Update the R-Car M1A pin control driver to use the new macros for describing pins without GPIO functionality. This replaces the use of physical pin numbers on the R-Car M1A SoC (in 25x25 FCBGA package) by symbolic enum values, referring to signal names. Note that the user-visible names of these pins are still based on pin numbers instead of signal names, to preserve DT backwards compatibility. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
2019-05-21pinctrl: sh-pfc: r8a7778: Use common PORT_GP_CFG_27() macroGeert Uytterhoeven1-17/+1
Get rid of the custom PORT_GP_PUP_27() macro by using the common PORT_GP_CFG_27() macro instead. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-21pinctrl: sh-pfc: Move PIN_NONE to shared header fileGeert Uytterhoeven1-39/+37
Several drivers have identical definitions for PIN_NONE. Provide a definition with a SH_PFC_ prefix for general use in sh_pfc.h, and convert all drivers over to use it. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-21pinctrl: sh-pfc: Rename 2-parameter CPU_ALL_PORT() variantGeert Uytterhoeven1-1/+1
There are two variants of the CPU_ALL_PORT() macro in use: 1. A three-parameter variant, to be provided for SoCs with a linear GPIO pin space ("PORT style"), 2. A two-parameter variant, to be provided for SoCs with 32-port GPIO banks ("GP port style"). Rename the 2-parameter variant to CPU_ALL_GP(), to avoid confusion, and to increase naming consistency. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
2019-04-02pinctrl: sh-pfc: Absorb enum IDs in PINMUX_CFG_REG_VAR() macroGeert Uytterhoeven1-32/+49
Currently the PINMUX_CFG_REG_VAR() macro must be followed by initialization data, specifying all enum IDs. Hence the macro itself does not know anything about the enum IDs, preventing the macro from performing any validation on it. Make the macro accept the enum IDs as a parameter, and update all users. Note that array data enclosed by curly braces cannot be passed to a macro as a parameter, hence both the register field widths and the enum IDs are wrapped using the GROUP() macro. No functional changes. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-04-02pinctrl: sh-pfc: Absorb enum IDs in PINMUX_CFG_REG() macroGeert Uytterhoeven1-10/+10
Currently the PINMUX_CFG_REG() macro must be followed by initialization data, specifying all enum IDs. Hence the macro itself does not know anything about the enum IDs, preventing the macro from performing any validation on it. Make the macro accept the enum IDs as a parameter, and update all users. Note that array data enclosed by curly braces cannot be passed to a macro as a parameter, hence the enum IDs are wrapped using a new macro GROUPS(). No functional changes. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-01-21pinctrl: sh-pfc: r8a7778: Fix HSPI pin numbers and namesGeert Uytterhoeven1-3/+3
When declaring the HSPI RX1_B and TX1_B pins, two mistakes were made: - the rows and columns in the BGA pin matrix, from which the pin numbers are derived, were exchanged, - it was not taken into account that pin row labelling skips characters I, O, Q, and S. Fix the order, and the corresponding pin names. Notes: - The actual values of the pin numbers don't really matter (they just have to be unique), so the wrong order didn't have any impact, - Changing the names of the pins is user-visible, but there are no users in (upstream) DTS files. Fixes: 4f82e3ee724f1712 ("sh-pfc: Support pins not associated with a GPIO port") Fixes: 09cc76a95802e87d ("sh-pfc: r8a7778: add HSPI pin groups") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-11pinctrl: sh-pfc: Convert to SPDX identifiersKuninori Morimoto1-9/+1
This patch updates license to use SPDX-License-Identifier instead of verbose license text. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-20pinctrl: sh-pfc: r8a7778: Use generic bias register descriptionGeert Uytterhoeven1-181/+222
Move R-Car M1A bias support over to the generic way to describe bias registers. As the new description is more compact, this decreases kernel size by ca. 148 bytes. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-11-16pinctrl: sh-pfc: r8a7778: Use lookup function for bias dataNiklas Söderlund1-170/+172
Change the data structure and use the generic sh_pfc_pin_to_bias_info() function to get the register offset and bit information. Suggested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-06-21pinctrl: sh-pfc: Improve core and user API separationGeert Uytterhoeven1-1/+1
The Renesas Pin Function Controller uses two header files: - sh_pfc.h, for use by both core code and SoC-specific drivers, - core.h, for internal use by the core code only. Several SoC-specific drivers include core.h, as they need the sh_pfc structure, which is passed explicitly to the various SoC-specific callbacks, and used there. Hence move its definition from core.h to sh_pfc.h, and remove the inclusion of core.h from all SoC-specific files. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-08pinctrl: sh-pfc: Rename PINMUX_IPSR_DATA() to PINMUX_IPSR_GPSR()Geert Uytterhoeven1-345/+345
This macro describes a pinmux configuration that needs configuration in both a Peripheral Function Select Register (IPSR) and in a GPIO/Peripheral Function Select Register 1 (GPSR). Reflect that in the macro name for clarity. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2015-12-08pinctrl: sh-pfc: r8a7778: Use PINMUX_SINGLE() instead of raw PINMUX_DATA()Geert Uytterhoeven1-11/+11
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-10-20pinctrl: sh-pfc: Stop including <linux/platform_data/gpio-rcar.h>Geert Uytterhoeven1-1/+0
This header file will be removed soon. Copy the helper macro RCAR_GP_PIN(), which is used by the pinctrl drivers only, to sh_pfc.h, and drop the #include. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-20pinctrl: sh-pfc: Rename .gpio_data[] to .pinmux_data[]Geert Uytterhoeven1-2/+2
The sh_pfc_soc_info.gpio_data[] array contains not only GPIO data, but also various other pinmux-related data (functions and marks). Every single driver already calls its local array pinmux_data[]. Hence rename the sh_pfc_soc_info member to "pinmux_data". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2015-10-20pinctrl: sh-pfc: r8a7778: Add bias (pull-up) pinconf supportUlrich Hecht1-21/+242
On this SoC there is no simple mapping of GP pins to pull-up register bits, so we need a table. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2013-12-20pinctrl: sh-pfc: ARM: Constify pins and cfg_regs arraysLaurent Pinchart1-2/+2
The arrays are never modified, declare them as const. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-27sh-pfc: r8a7778: Add CAN pin groupsSergei Shtylyov1-0/+55
Add CAN data and clock pin groups to R8A7778 PFC driver. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2013-09-24sh-pfc: r8a7778: Add SRU/SSI pin supportKuninori Morimoto1-0/+125
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2013-07-29sh-pfc: Support pins not associated with a GPIO portLaurent Pinchart1-4/+9
Pins with selectable functions but without a GPIO port can't be named PORT_# or GP_#_#. Add a SH_PFC_PIN_NAMED macro to declare such pins in the pinmux pins array, naming them with the PIN_ prefix followed by the pin physical position. In order to make sure not to register those pins as GPIOs, add a SH_PFC_PIN_CFG_NO_GPIO pin flag to denote pins without a GPIO port. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
2013-07-29sh-pfc: Consolidate PFC SoC data macrosLaurent Pinchart1-40/+0
Move macros defined in several SoC data files to a common location and document them. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
2013-07-29sh-pfc: Replace pinmux_enum_id typedef with u16Laurent Pinchart1-1/+1
The typedef only conceals the real variable type without bringing any additional value (see Documentation/CodingStyle, section 5.b). Moreover, it polutes the pinmux namespace. Replace it with the integer type it used to hide. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
2013-06-18sh-pfc: r8a7778: tidyup MMC_D1 pinKuninori Morimoto1-2/+2
MMC_D1 is RCAR_GP_PIN(1, 8), not RCAR_GP_PIN(2, 8) Reported-by: Yusuke Goda <yusuke.goda.sx@renesas.com> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05sh-pfc: r8a7778: add MMCIF pin groupsKuninori Morimoto1-0/+38
Add MMCIF CLK/CMD/DATA groups to R8A7778 PFC driver. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05sh-pfc: r8a7778: add HSPI pin groupsKuninori Morimoto1-0/+61
Add HSPI CLK/CS/RX/TX pin groups to R8A7778 PFC driver. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05sh-pfc: r8a7778: add I2C pin groupsKuninori Morimoto1-0/+54
Add I2C SDA/SCL pin groups to R8A7778 PFC driver. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05sh-pfc: r8a7778: fixup IRQ1A settingsKuninori Morimoto1-1/+1
IP2[31] func2 is IRQ1A, not IRQ3A Reported-by: Yusuke Goda <yusuke.goda.sx@renesas.com> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05sh-pfc: r8a7778: add Ether pin groupsSergei Shtylyov1-0/+26
Add Ether RMII/LINK/MAGIC pin groups to R8A7778 PFC driver. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Laurent Pinchart<laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05sh-pfc: r8a7778: add VIN pin groupsVladimir Barinov1-0/+60
Add VIN DATA[0:8]/CLK/HSYNC/VSYNC pin groups to R8A7778 PFC driver. While at it, add SH_PFC_MUX8() macro for 8-bit data busses. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> [Sergei: updated the copyrights, added SH_PFC_MUX8() macro for 8-bit data bus, made use of SH_PFC_*() macros to define the pin groups.] Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05sh-pfc: r8a7778: add USB pin groupsSergei Shtylyov1-0/+28
Add USB0/1 PENC/USB_OVC pin groups to R8A7778 PFC driver. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05sh-pfc: r8a7778: tidyup SDHI naming suffixes and sort it alphabeticallyKuninori Morimoto1-84/+80
SDHI 1/2 are the target Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05sh-pfc: r8a7778: Fix outdated GPIO_FN commentsLaurent Pinchart1-13/+13
Function GPIOs have been removed, remove comments that refer to them. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04sh-pfc: r8a7778: add SDHI supportKuninori Morimoto1-0/+141
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04sh-pfc: r8a7778: add common PFC macro helperKuninori Morimoto1-8/+18
pfc-r8a7778 will have many devices pfc support in the future, and current pfc-r8a7778 is using pin/mux definition macro for SCIF. The device definition style using macro is readable code IMO, but creating new macro for each devices is not good sense. This patch adds common SH_PFC_xx() macro for each new feature devices Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04sh-pfc: Add r8a7778 pinmux supportKuninori Morimoto1-0/+2369
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms@verge.net.au>
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