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This deletes the special AB8500 GPIO platform data passing
header and merges the few remaining contents down into the
abx500 pinctrl driver which handles the abx500 GPIO device.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Fix a trivial typo.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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The ABx500 GPIO controller used to provide a set of virtual contiguous
IRQs for use by sub-devices, but they have been removed after a request
from Mainline Maintainers. Now the AB8500 core driver deals with almost
all IRQ related issues instead.
The ABx500 GPIO driver is now only used to convert between GPIO and IRQ
numbers which is actually quite difficult, as the ABx500 GPIO's
associated IRQs are clustered together throughout the interrupt number
space at irregular intervals. To solve this quandary, we have placed the
read-in values into the existing cluster information table to use during
conversion.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
[Moved irq_base removal into this patch]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Add AB8540 sub driver to the ABx500 family, pins, pin groups and
gpio range.
As the pin controller (also the ABx500 controllers) is an
inherent part of the SoC and will prevent boot if not
available, select this from the Ux500 SoC Kconfig.
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Add AB9540 sub driver to the ABx500 family, pins, pin groups and
gpio range.
As the pin controller (also the ABx500 controllers) is an
inherent part of the SoC and will prevent boot if not
available, select this from the Ux500 SoC Kconfig.
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Add AB8505 sub driver to the ABx5x family.
As the pin controller (also the ABx500 controllers) is an
inherent part of the SoC and will prevent boot if not
available, select this from the Ux500 SoC Kconfig.
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This adds a subdriver for the AB8500 pinctrl portions.
As the pin controller (also the ABx500 controllers) is an
inherent part of the SoC and will prevent boot if not
available, select this from the Ux500 SoC Kconfig.
Acked-by: Olof Johansson <olof@lixom.net>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This adds the AB8500 core driver, which will be utilized by
the follow-on drivers for different ABx500 variants.
Sselect the driver from the DBX500_SOC, as this chip is
powering and clocking that SoC.
Cc: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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