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2020-12-16Merge tag 'pinctrl-v5.11-1' of ↵Linus Torvalds1-0/+20
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "This is the bulk of pin control changes for the v5.11 kernel. Drivers, drivers and drivers. Not a single core change. Some new stuff, especially a bunch of new Intel, Qualcomm and Ocelot SoCs. As part of the modularization attempt, I applied one patch affecting the firmware subsystem as a functional (not syntactic/semantic) dependency and then it blew up in our face, so I had to revert it, bummer. It will come in later, through that subsystem, I guess. New drivers: - New driver for the Microchip Serial GPIO "SGPIO". - Qualcomm SM8250 LPASS (Low Power Audio Subsystem) GPIO driver. New subdrivers: - Intel Lakefield subdriver. - Intel Elkhart Lake subdriver. - Intel Alder Lake-S subdriver. - Qualcomm MSM8953 subdriver. - Qualcomm SDX55 subdriver. - Qualcomm SDX55 PMIC subdriver. - Ocelot Luton SoC subdriver. - Ocelot Serval SoC subdriver. Modularization: - The Meson driver can now be built as modules. - The Qualcomm driver(s) can now be built as modules. Incremental improvements: - The Intel driver now supports pin configuration for GPIO-related configurations. - A bunch of Renesas PFC drivers have been augmented with support for QSPI pins, groups and functions. - Non-critical fixes to the irq handling in the Allwinner Sunxi driver" * tag 'pinctrl-v5.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (80 commits) pinctrl/spear: simplify the return expression of spear300_pinctrl_probe() pinctrl: mediatek: simplify the return expression of mtk_pinconf_bias_disable_set_rev1() dt-bindings: pinctrl: pinctrl-microchip-sgpio: Add irq support pinctrl: pinctrl-microchip-sgpio: Add irq support (for sparx5) pinctrl: qcom: Add sm8250 lpass lpi pinctrl driver dt-bindings: pinctrl: qcom: Add sm8250 lpass lpi pinctrl bindings pinctrl: qcom-pmic-gpio: Add support for pmx55 dt-bindings: pinctrl: qcom-pmic-gpio: Add pmx55 support pinctrl: pinctrl-microchip-sgpio: Mark some symbols with static keyword pinctrl: at91-pio4: Make PINCTRL_AT91PIO4 depend on HAS_IOMEM to fix build error pinctrl: mtk: Fix low level output voltage issue pinctrl: falcon: add missing put_device() call in pinctrl_falcon_probe() pinctrl: actions: pinctrl-s500: Constify s500_padinfo[] pinctrl: pinctrl-microchip-sgpio: Add OF config dependency pinctrl: pinctrl-microchip-sgpio: Add pinctrl driver for Microsemi Serial GPIO dt-bindings: pinctrl: Add bindings for pinctrl-microchip-sgpio driver pinctrl: at91-pio4: add support for fewer lines on last PIO bank pinctrl: sunxi: Always call chained_irq_{enter, exit} in sunxi_pinctrl_irq_handler pinctrl: sunxi: Mark the irq bank not found in sunxi_pinctrl_irq_handler() with WARN_ON pinctrl: sunxi: fix irq bank map for the Allwinner A100 pin controller ...
2020-12-11pinctrl: pinctrl-microchip-sgpio: Add irq support (for sparx5)Lars Povlsen1-0/+1
This adds 'interrupt-controller' features for the signals available on the Microchip SGPIO controller, however only for controller versions on the Sparx5 platform (or later). Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> Link: https://lore.kernel.org/r/20201209142753.683208-2-lars.povlsen@microchip.com [Select GPIOLIB_IRQCHIP in Kconfig] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-12-08pinctrl: ralink: add a pinctrl driver for the rt2880 familySergio Paracuellos1-0/+1
These Socs have 1-3 banks of 8-32 gpios. Rather then setting the muxing of each pin individually, these socs have mux groups that when set will effect 1-N pins. Pin groups have a 2, 4 or 8 different muxes. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Link: https://lore.kernel.org/r/20201208075523.7060-3-sergio.paracuellos@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-12-04pinctrl: at91-pio4: Make PINCTRL_AT91PIO4 depend on HAS_IOMEM to fix build errorTiezhu Yang1-0/+1
If CONFIG_HAS_IOMEM is not set, devm_platform_ioremap_resource() will be not built in drivers/base/platform.c and then there exists a build error about undefined reference to "devm_platform_ioremap_resource" in pinctrl-at91-pio4.c under COMPILE_TEST and CONFIG_PINCTRL_AT91PIO4, make PINCTRL_AT91PIO4 depend on HAS_IOMEM to fix it. Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Link: https://lore.kernel.org/r/1606209423-4742-1-git-send-email-yangtiezhu@loongson.cn Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-12-02pinctrl: pinctrl-microchip-sgpio: Add OF config dependencyLars Povlsen1-0/+2
The pinctrl-microchip-sgpio driver needs OF support, so add that to Kconfig. Reported-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> Acked-by: Randy Dunlap <rdunlap@infradead.org> Link: https://lore.kernel.org/r/20201125122014.11237-1-lars.povlsen@microchip.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-12-02pinctrl: pinctrl-microchip-sgpio: Add pinctrl driver for Microsemi Serial GPIOLars Povlsen1-0/+16
This adds a pinctrl driver for the Microsemi/Microchip Serial GPIO (SGPIO) device used in various SoC's. The driver is added as a pinctrl driver, albeit only having just GPIO support currently. The hardware supports other functions that will be added following. Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> Link: https://lore.kernel.org/r/20201113145151.68900-3-lars.povlsen@microchip.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-09-21Merge tag 'renesas-pinctrl-for-v5.10-tag1' of ↵Linus Walleij1-33/+1
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: renesas: Updates for v5.10 - Add CAN and USB1 PWEN pin groups on R-Car H2 and RZ/G1, - Three more conversion of DT bindings to json-schema, - Group all Renesas pinctrl drivers and improve visual Kconfig structure, - Rename drivers/pinctrl/sh-pfc to drivers/pinctrl/renesas, - Minor fixes and improvements.
2020-09-15pinctrl: Rename sh-pfc to renesasGeert Uytterhoeven1-1/+1
The drivers/pinctrl/sh-pfc subdirectory was originally created to group pin control drivers for various Renesas SuperH and SH-Mobile platforms. However, the name "sh-pfc" no longer reflects its contents, as the directory now contains pin control drivers for Renesas SuperH, ARM32, and ARM64 SoCs. Hence rename the subdirectory from drivers/pinctrl/sh-pfc to drivers/pinctrl/renesas, and the related Kconfig symbol from PINCTRL_SH_PFC to PINCTRL_RENESAS. Rename the git branch in MAINTAINERS, too, for consistency. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20200909131534.12897-3-geert+renesas@glider.be
2020-09-15pinctrl: sh-pfc: Collect Renesas related CONFIGs in one placeKuninori Morimoto1-32/+0
Renesas related pinctrl CONFIGs are located in many places, which is confusing. This patch collects them into the same place, grouped in a new "Renesas pinctrl drivers" menu. This patch also moves pinctrl-rz{a1,a2,n1}.c into the sh-pfc folder. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87k0xoy4r7.wl-kuninori.morimoto.gx@renesas.com [geert: Update path in MAINTAINERS] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-12pinctrl: rockchip: depend on OFHeiko Stuebner1-0/+2
The Rockchip pinctrl driver needs to handle information from Devicetree so only makes sense getting compiled on systems with CONFIG_OF enabled. This also fixes a problem found by the "kernel-test-robot" when compiling the driver on test-builds that do not have CONFIG_OF enabled: drivers/pinctrl/pinctrl-rockchip.c: In function 'rockchip_pinctrl_parse_groups': >> drivers/pinctrl/pinctrl-rockchip.c:2881:9: error: implicit declaration of function 'pinconf_generic_parse_dt_config'; did you mean 'pinconf_generic_dump_config'? [-Werror=implicit-function-declaration] 2881 | ret = pinconf_generic_parse_dt_config(np_config, NULL, | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | pinconf_generic_dump_config drivers/pinctrl/pinctrl-rockchip.c: In function 'rockchip_gpiolib_register': >> drivers/pinctrl/pinctrl-rockchip.c:3473:5: error: 'struct gpio_chip' has no member named 'of_node' 3473 | gc->of_node = bank->of_node; Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Link: https://lore.kernel.org/r/20200905214955.907950-1-heiko@sntech.de Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-09-12pinctrl: visconti: Add Toshiba Visconti SoCs pinctrl supportNobuhiro Iwamatsu1-0/+1
Add pinctrl support to Toshiba Visconti SoCs. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> Reviewed-by: Punit Agrawal <punit1.agrawal@toshiba.co.jp> Link: https://lore.kernel.org/r/20200909204336.2558-3-nobuhiro1.iwamatsu@toshiba.co.jp Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-05-25pinctrl: at91-pio4: Add COMPILE_TEST supportTiezhu Yang1-1/+1
Add COMPILE_TEST support to the AT91 PIO4 pinctrl driver for better compile testing coverage. Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Link: https://lore.kernel.org/r/1590234326-2194-2-git-send-email-yangtiezhu@loongson.cn Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-05-16pinctrl: amd: Add ACPI dependencyGeert Uytterhoeven1-0/+1
Currently the AMD pin controller driver supports ACPI platform only. Make the PINCTRL_AMD config symbol depend on ACPI, to avoid asking the user about it when configuring a kernel without ACPI support. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20200507113751.24213-1-geert+renesas@glider.be Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-05-16pinctrl: equilibrium: Add architecture dependencyGeert Uytterhoeven1-0/+1
The Equilibrium pin controller is only present on Intel Lightning Mountain SoCs. Add an architecture dependency to the PINCTRL_EQUILIBRIUM config symbol, to avoid asking the user about it when configuring a kernel for a non-x86 architecture. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20200507113626.24026-2-geert+renesas@glider.be Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16pinctrl: mcp23s08: Split to three parts: core, I²C, SPIAndy Shevchenko1-3/+10
Split the driver to three parts: core, I²C, SPI. No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20200407173849.43628-9-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-19pinctrl: da9062: add driver supportMarco Felsch1-0/+12
The DA9062 is a mfd pmic device which supports 5 GPIOs. The GPIOs can be used as input, output or have a special use-case. The patch adds the support for the normal input/output use-case. Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Link: https://lore.kernel.org/r/20200108104746.1765-4-m.felsch@pengutronix.de Reviewed-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-12-16pinctrl: ingenic: Fixup PIN_CONFIG_OUTPUT configPaul Cercueil1-1/+1
JZ4760 support was added in parallel of the previous patch so this one slipped through. The first SoC to use the new register is the JZ4760 and not the JZ4770, fix it here. Fixes: 7009d046a601 ("pinctrl: ingenic: Handle PIN_CONFIG_OUTPUT config") Signed-off-by: Paul Cercueil <paul@crapouillou.net> Link: https://lore.kernel.org/r/20191210164446.53912-1-paul@crapouillou.net [Folded into OF dependency] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-12-13pinctrl: Modify Kconfig to fix linker errorRahul Tanwar1-0/+1
Fix below linker error ld: drivers/pinctrl/pinctrl-equilibrium.o: in function `pinconf_generic_dt_node_to_map_all': pinctrl-equilibrium.c:(.text+0xb): undefined reference to `pinconf_generic_dt_node_to_map' Caused by below commit 1948d5c51dba ("pinctrl: Add pinmux & GPIO controller driver for a new SoC") by adding 'depends on OF' in Kconfig driver entry. Reported-by: Randy Dunlap <rdunlap@infradead.org>> Signed-off-by: Rahul Tanwar <rahul.tanwar@linux.intel.com> Link: https://lore.kernel.org/r/ba937f271d1a2173828a2325990d62cb36d61595.1575514110.git.rahul.tanwar@linux.intel.com Acked-by: Randy Dunlap <rdunlap@infradead.org> # build-tested Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-11-21pinctrl: Fix Kconfig indentationKrzysztof Kozlowski1-9/+9
Adjust indentation from spaces to tab (+optional two spaces) as in coding style with command like: $ sed -e 's/^ /\t/' -i */Kconfig Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/1574306382-32516-1-git-send-email-krzk@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-11-21pinctrl: Add pinmux & GPIO controller driver for a new SoCRahul Tanwar1-0/+18
Intel Lightning Mountain SoC has a pinmux controller & GPIO controller IP which controls pin multiplexing & configuration including GPIO functions selection & GPIO attributes configuration. This IP is not based on & does not have anything in common with Chassis specification. The pinctrl drivers under pinctrl/intel/* are all based upon Chassis spec compliant pinctrl IPs. So this driver doesn't fit & can not use pinctrl framework under pinctrl/intel/* and it requires a separate new driver. Add a new GPIO & pin control framework based driver for this IP. Signed-off-by: Rahul Tanwar <rahul.tanwar@linux.intel.com> Link: https://lore.kernel.org/r/33e649758b70490f01724a887c490d5008c7656d.1573797249.git.rahul.tanwar@linux.intel.com Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-05-28Merge tag 'pinctrl-v5.2-2' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control fixes from Linus Walleij: "The commits that stand out are the Intel fixes that arrived during the merge window and I got relayed by pull request from Andy. Apart from that a minor Kconfig noise. - Interrupt clearing fix for the Intel pin controllers affecting touchpads on some laptops. - Compile Kconfig fix for the STMFX expander pin controller" * tag 'pinctrl-v5.2-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: pinctrl: stmfx: Fix compile issue when CONFIG_OF_GPIO is not defined pinctrl: intel: Clear interrupt status in mask/unmask callback pinctrl: intel: Use GENMASK() consistently
2019-05-24pinctrl: stmfx: Fix compile issue when CONFIG_OF_GPIO is not definedAmelie Delaunay1-1/+1
When CONFIG_GPIO_OF is not defined, struct gpio_chip 'of_node' member does not exist: drivers/pinctrl/pinctrl-stmfx.c: In function 'stmfx_pinctrl_probe': drivers/pinctrl/pinctrl-stmfx.c:652:17: error: 'struct gpio_chip' has no member named 'of_node' pctl->gpio_chip.of_node = np; Fixes: 1490d9f841b1 ("pinctrl: Add STMFX GPIO expander Pinctrl/GPIO driver") Reported-by: kbuild test robot <lkp@intel.com> Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-05-21treewide: Add SPDX license identifier - Makefile/KconfigThomas Gleixner1-0/+1
Add SPDX license identifiers to all Make/Kconfig files which: - Have no license information of any form These files fall under the project license, GPL v2 only. The resulting SPDX license identifier is: GPL-2.0-only Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-14Merge tag 'mfd-next-5.2' of ↵Linus Torvalds1-0/+14
git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd Pull MFD updates from Lee Jones: "Core Framework: - Document (kerneldoc) core mfd_add_devices() API New Drivers: - Altera SOCFPGA System Manager - Maxim MAX77650/77651 PMIC - Maxim MAX77663 PMIC - ST Multi-Function eXpander (STMFX) New Device Support: - LEDs support in Intel Cherry Trail Whiskey Cove PMIC - RTC support in SAMSUNG Electronics S2MPA01 PMIC - SAM9X60 support in Atmel HLCDC (High-end LCD Controller) - USB X-Powers AXP 8xx PMICs - Integrated Sensor Hub (ISH) in ChromeOS EC - USB PD Logger in ChromeOS EC - AXP223 in X-Powers AXP series PMICs - Power Supply in X-Powers AXP 803 PMICs - Comet Lake in Intel Low Power Subsystem - Fingerprint MCU in ChromeOS EC - Touchpad MCU in ChromeOS EC - Move TI LM3532 support to LED New Functionality: - max77650, max77620: Add/extend DT support - max77620 power-off - syscon clocking - croc_ec host sleep event Fix-ups: - Trivial; Formatting, spelling, etc; Kconfig, sec-core, ab8500-debugfs - Remove unused functionality; rk808, da9063-* - SPDX conversion; da9063-*, atmel-*, - Adapt/add new register definitions; cs47l35-tables, cs47l90-tables, imx6q-iomuxc-gpr - Fix-up DT bindings; ti-lmu, cirrus,lochnagar - Simply obtaining driver data; ssbi, t7l66xb, tc6387xb, tc6393xb Bug Fixes: - Fix incorrect defined values; max77620, da9063 - Fix device initialisation; twl6040 - Reset device on init; intel-lpss - Fix build warnings when !OF; sun6i-prcm - Register OF match tables; tps65912-spi - Fix DMI matching; intel_quark_i2c_gpio" * tag 'mfd-next-5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (65 commits) mfd: Use dev_get_drvdata() directly mfd: cros_ec: Instantiate properly CrOS Touchpad MCU device mfd: cros_ec: Instantiate properly CrOS FP MCU device mfd: cros_ec: Update the EC feature codes mfd: intel-lpss: Add Intel Comet Lake PCI IDs mfd: lochnagar: Add links to binding docs for sound and hwmon mfd: ab8500-debugfs: Fix a typo ("deubgfs") mfd: imx6sx: Add MQS register definition for iomuxc gpr dt-bindings: mfd: LMU: Fix lm3632 dt binding example mfd: intel_quark_i2c_gpio: Adjust IOT2000 matching mfd: da9063: Fix OTP control register names to match datasheets for DA9063/63L mfd: tps65912-spi: Add missing of table registration mfd: axp20x: Add USB power supply mfd cell to AXP803 mfd: sun6i-prcm: Fix build warning for non-OF configurations mfd: intel-lpss: Set the device in reset state when init platform/chrome: Add support for v1 of host sleep event mfd: cros_ec: Add host_sleep_event_v1 command mfd: cros_ec: Instantiate the CrOS USB PD logger driver mfd: cs47l90: Make DAC_AEC_CONTROL_2 readable mfd: cs47l35: Make DAC_AEC_CONTROL_2 readable ...
2019-05-10pinctrl: Kconfig: Fix STMFX GPIO expander Pinctrl/GPIO driver dependenciesAmelie Delaunay1-0/+2
module_i2c_driver and pinconf_generic_dt_node_to_map_pin are undeclared if CONFIG_I2C and CONFIG_OF are not enabled. Fixes: 1490d9f841b1 ("pinctrl: Add STMFX GPIO expander Pinctrl/GPIO driver") Reported-by: kbuild test robot <lkp@intel.com> Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-05-10pinctrl: Add STMFX GPIO expander Pinctrl/GPIO driverAmelie Delaunay1-0/+12
This patch adds pinctrl/GPIO driver for STMicroelectronics Multi-Function eXpander (STMFX) GPIO expander. STMFX is an I2C slave controller, offering up to 24 GPIOs. The driver relies on generic pin config interface to configure the GPIOs. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-05-03pinctrl: Rework Kconfig dependency for BM1880 pinctrl driverManivannan Sadhasivam1-1/+2
Make the BM1880 SoC pinctrl driver depend on COMPILE_TEST to get compiler test coverage and also select this driver by default for ARCH_BITMAIN platform. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-05-03pinctrl: Add pinctrl support for BM1880 SoCManivannan Sadhasivam1-0/+7
Add pinctrl support for Bitmain BM1880 SoC. The driver only handles pinmuxing as the SoC is not capable of handling pinconf. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-12-22pinctrl: ocelot: Add dependency on HAS_IOMEMLinus Walleij1-0/+1
As usual the build fails on UM Linux because that thing does not have IOMEM. Depend on HAS_IOMEM solves the build problem. Cc: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-12-21pinctrl: ocelot: add MSCC Jaguar2 supportAlexandre Belloni1-3/+2
Jaguar2 has the same register layout as Ocelot but it has 64 pins, meaning that there are 2 registers instead of one. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-11-23pinctrl: Add RZ/A2 pin and gpio controllerChris Brandt1-0/+11
Adds support for the pin and gpio controller found in R7S9210 (RZ/A2) SoCs. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-10-10Merge tag 'sh-pfc-for-v4.20-tag3' of ↵Linus Walleij1-0/+10
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: sh-pfc: Updates for v4.20 (take three) - Add support for the new RZ/N1D (R9A06G032) and RZ/N1S (R9A06G033) SoCs, - Add INTC-EX pin groups on R-Car E3.
2018-10-02pinctrl: renesas: Renesas RZ/N1 pinctrl driverPhil Edworthy1-0/+10
This provides a pinctrl driver for the Renesas RZ/N1 device family. Based on a patch originally written by Michel Pollet at Renesas. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-08-29Merge branch 'ib-ingenic' into develLinus Walleij1-2/+4
2018-08-29pinctrl: ingenic: Drop dependency on MACH_INGENICPaul Cercueil1-2/+2
Depending on MACH_INGENIC prevent us from creating a generic kernel that works on more than one MIPS board. Instead, we just depend on MIPS being set. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-08-29pinctrl: ingenic: Merge GPIO functionalityPaul Cercueil1-0/+2
Merge the code of the gpio-ingenic driver into the pinctrl-ingenic driver. The reason behind this, is that the same hardware block handles both pin config / muxing and GPIO. ingenic_gpio_probe() have been marked as __init, but for the most part, the code is the exact same as what it was in the gpio-ingenic driver. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-08-29pinctrl: nuvoton: add NPCM7xx pinctrl and GPIO driverTomer Maimon1-0/+1
Add Nuvoton BMC NPCM750/730/715/705 Pinmux and GPIO controller driver. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> [Add back select GPIO_GENERIC] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-08-20Merge tag 'mfd-next-4.19' of ↵Linus Torvalds1-0/+1
git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd Pull MFD updates from Lee Jones: "New Drivers: - Add Cirrus Logic Madera Codec (CS47L35, CS47L85 and CS47L90/91) driver - Add ChromeOS EC CEC driver - Add ROHM BD71837 PMIC driver New Device Support: - Add support for Dialog Semi DA9063L PMIC variant to DA9063 - Add support for Intel Ice Lake to Intel-PLSS-PCI - Add support for X-Powers AXP806 to AXP20x New Functionality: - Add support for USB Charging to the ChromeOS Embedded Controller - Add support for HDMI CEC to the ChromeOS Embedded Controller - Add support for HDMI CEC to Intel HDMI - Add support for accessory detection to Madera devices - Allow individual pins to be configured via DT' wlf,csnaddr-pd - Provide legacy platform specific EEPROM/Watchdog commands; rave-sp Fix-upsL - Trivial renaming/spelling fixes; cros_ec, da9063-* - Convert to Managed Resources (devm_*); da9063-*, ti_am335x_tscadc - Transition to helper macros/functions; da9063-* - Constify; kempld-core - Improve error path/messages; wm8994-core - Disable IRQs locally instead of relying on USB subsystem; dln2 - Remove unused code; rave-sp - New exports; sec-core Bug Fixes: - Fix possible false I2C transaction error; arizona-core - Fix declared memory area size; hi655x-pmic - Fix checksum type; rave-sp - Fix incorrect default serial port configuration: rave-sp - Fix incorrect coherent DMA mask for sub-devices; sm501" * tag 'mfd-next-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (60 commits) mfd: madera: Add register definitions for accessory detect mfd: sm501: Set coherent_dma_mask when creating subdevices mfd: bd71837: Devicetree bindings for ROHM BD71837 PMIC mfd: bd71837: Core driver for ROHM BD71837 PMIC media: platform: cros-ec-cec: Fix dependency on MFD_CROS_EC mfd: sec-core: Export OF module alias table mfd: as3722: Disable auto-power-on when AC OK mfd: axp20x: Support AXP806 in I2C mode mfd: axp20x: Add self-working mode support for AXP806 dt-bindings: mfd: axp20x: Add "self-working" mode for AXP806 mfd: wm8994: Allow to configure CS/ADDR Pulldown from dts mfd: wm8994: Allow to configure Speaker Mode Pullup from dts mfd: rave-sp: Emulate CMD_GET_STATUS on device that don't support it mfd: rave-sp: Add legacy watchdog ping command translation mfd: rave-sp: Add legacy EEPROM access command translation mfd: rave-sp: Initialize flow control and parity of the port mfd: rave-sp: Fix incorrectly specified checksum type mfd: rave-sp: Remove unused defines mfd: hi655x: Fix regmap area declared size for hi655x mfd: ti_am335x_tscadc: Fix struct clk memory leak ...
2018-08-06pinctrl: ocelot: add support for interrupt controllerQuentin Schulz1-0/+1
This GPIO controller can serve as an interrupt controller as well on the GPIOs it handles. An interrupt is generated whenever a GPIO line changes and the interrupt for this GPIO line is enabled. This means that both the changes from low to high and high to low generate an interrupt. For some use cases, it makes sense to ignore the high to low change and not generate an interrupt. Such a use case is a line that is hold in a level high/low manner until the event holding the line gets acked. This can be achieved by making sure the interrupt on the GPIO controller side gets acked and masked only after the line gets hold in its default state, this is what's done with the fasteoi functions. Only IRQ_TYPE_EDGE_BOTH and IRQ_TYPE_LEVEL_HIGH are supported for now. Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-07-27Merge branches 'ib-mfd-4.19', 'ib-mfd-gpio-pinctrl-4.19', ↵Lee Jones1-0/+1
'ib-mfd-i915-media-platform-4.19' and 'ib-mfd-regulator-4.19', tag 'ib-platform-chrome-mfd-move-cros-ec-transport-for-4.19' into ibs-for-mfd-merged Immutable branch (mfd, chrome) due for the v4.19 window Immutable Branch which moves the cros_ec_i2c and cros_ec_spi transport drivers from mfd to platform/chrome. Changes in arm are a simple rename in defconfigs. Change in input is a rename in help text.
2018-06-18pinctrl: mcp23s08: Kconfig: update to reflect supported featuresJan Kundrát1-4/+4
Commit d8f4494e70ae removed comments which described this limitation. The code supported interrupts even before. Also add some spacing so that the chip IDs are a bit more readable. Signed-off-by: Jan Kundrát <jan.kundrat@cesnet.cz> Reviewed-by: Phil Reid <preid@electromag.com.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-06-05pinctrl: madera: Add driver for Cirrus Logic Madera codecsRichard Fitzgerald1-0/+1
These codecs have a variable number of I/O lines each of which is individually selectable to a wide range of possible functions. The functionality is slightly different from the traditional muxed GPIO since most of the functions can be mapped to any pin (and even the same function to multiple pins). Most pins have a dedicated "alternate" function that is only available on that pin. The alternate functions are usually a group of signals, though it is not always necessary to enable the full group, depending on the alternate function and how it is to be used. The mapping between alternate functions and GPIO pins varies between codecs depending on the number of alternate functions and available pins. Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2018-05-02pinctrl: actions: Add Actions S900 pinctrl driverManivannan Sadhasivam1-0/+1
Add pinctrl driver for Actions Semi S900 SoC. The driver supports pinctrl, pinmux and pinconf functionalities through a range of registers common to both gpio driver and pinctrl driver. Pinmux functionality is available only for the pin groups while the pinconf functionality is available for both pin groups and individual pins. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-04-03Merge tag 'pinctrl-v4.17-1' of ↵Linus Torvalds1-12/+0
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control bulk updates from Linus Walleij: "New drivers: - Qualcomm SDM845: this is their new flagship SoC platform which seems to be targeted at premium mobile handsets. - Renesas R-Car M3-N SoC. - Renesas R8A77980 SoC. - NXP (ex Freescale) i.MX 6SLL SoC. - Mediatek MT2712 SoC. - Allwinner H6 SoC. Improvements: - Uniphier adds a few new functions and pins. - Renesas refactorings and additional pin definitions. - Improved pin groups for Axis Artpec6. Cleanup: - Drop the TZ1090 drivers. This platform is no longer maintained and is being deleted. - Drop ST-Ericsson U8540/U9540 support as this was never productified. - Overall minor fixes and janitorial" * tag 'pinctrl-v4.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (82 commits) pinctrl: uniphier: add UART hardware flow control pin-mux settings pinctrl: sunxi: add support for the Allwinner H6 main pin controller pinctrl: sunxi: change irq_bank_base to irq_bank_map pinctrl: sunxi: introduce IRQ bank conversion function pinctrl: sunxi: refactor irq related register function to have desc pinctrl: msm8998: Remove owner assignment from platform_driver pinctrl: uniphier: divide I2S and S/PDIF audio out pin-mux group pinctrl: uniphier: add PXs2 Audio in/out pin-mux settings pinctrl/amd: poll InterruptEnable bits in enable_irq pinctrl: ocelot: fix gpio direction pinctrl: mtk: fix check warnings. pintcrl: mtk: support bias-disable of generic and special pins simultaneously pinctrl: add mt2712 pinctrl driver pinctrl: pinctrl-single: Fix pcs_request_gpio() when bits_per_mux != 0 pinctrl: imx: Add pinctrl driver support for imx6sll dt-bindings: imx: update pinctrl doc for imx6sll pinctrl: intel: Implement intel_gpio_get_direction callback pinctrl: stm32: add 'depends on HAS_IOMEM' to fix unmet dependency pinctrl: mediatek: mtk-common: use true and false for boolean values pinctrl: sunxi: always look for apb block ...
2018-03-26pinctrl: remove adi2/blackfin driversArnd Bergmann1-19/+0
The blackfin architecture is getting removed, so these are now obsolete. Acked-by: Aaron Wu <aaron.wu@analog.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-03-01pinctrl: Drop TZ1090 driversJames Hogan1-12/+0
Now that arch/metag/ has been removed, along with TZ1090 SoC support, remove the TZ1090 pinctrl drivers. They are of no value without the architecture and SoC platform code. Signed-off-by: James Hogan <jhogan@kernel.org> Cc: linux-gpio@vger.kernel.org Cc: linux-metag@vger.kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-01-09pinctrl: Add Microsemi Ocelot SoC driverAlexandre Belloni1-0/+11
The Microsemi Ocelot SoC has a few pins that can be used as GPIOs or take multiple other functions. Add a driver for the pinmuxing and the GPIOs. There is currently no support for interrupts. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-12-20pinctrl: axp209: add missing Kconfig dependenciesQuentin Schulz1-0/+4
This fixes some compilation issues. GENERIC_PINCONF and OF at least for pinconf_generic_dt_*, PINMUX at least for pinmux_ops and GPIOLIB for at least gpio_chip. Fixes: 23f75d7dfa92 ("pinctrl: axp209: add pinctrl features") Reported-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com> Acked-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-12-07pinctrl: move gpio-axp209 to pinctrlQuentin Schulz1-0/+10
To prepare the driver for the upcoming pinctrl features, move the GPIO driver AXP209 from GPIO to pinctrl subsystem. Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-16Merge tag 'pinctrl-v4.15-1' of ↵Linus Torvalds1-18/+14
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "This is the bulk of pin control changes for the v4.15 kernel cycle: Core: - The pin control Kconfig entry PINCTRL is now turned into a menuconfig option. This obviously has the implication of making the subsystem menu visible in menuconfig. This is happening because of two things: (a) Intel have started to deploy and depend on pin controllers in a way that is affecting users directly. This happens on the highly integrated laptop chipsets named after geographical places: baytrail, broxton, cannonlake, cedarfork, cherryview, denverton, geminilake, lewisburg, merrifield, sunrisepoint... It started a while back and now it is ever more evident that this is crucial infrastructure for x86 laptops and not an embedded obscurity anymore. Users need to be aware. (b) Pin control expanders on I2C and SPI that are arch-agnostic. Currently Semtech SX150X and Microchip MCP28x08 but more are expected. Users will have to be able to configure these in directly for their set-up. - Just go and select GPIOLIB now that we made sure that GPIOLIB is a very vanilla subsystem. Do not depend on it, if we need it, select it. - Exposing the pin control subsystem in menuconfig uncovered a bunch of obscure bugs that are now hopefully fixed, all more or less pertaining to Blackfin. - Unified namespace for cross-calls between pin control and GPIO. - New support for clock skew/delay generic DT bindings and generic pin config options for this. - Minor documentation improvements. Various: - The Renesas SH-PFC pin controller has evolved a lot. It seems Renesas are churning out new SoCs by the minute. - A bunch of non-critical fixes for the Rockchip driver. - Improve the use of library functions instead of open coding. - Support the MCP28018 variant in the MCP28x08 driver. - Static constifying" * tag 'pinctrl-v4.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (91 commits) pinctrl: gemini: Fix missing pad descriptions pinctrl: Add some depends on HAS_IOMEM pinctrl: samsung/s3c24xx: add CONFIG_OF dependency pinctrl: gemini: Fix GMAC groups pinctrl: qcom: spmi-gpio: Add pmi8994 gpio support pinctrl: ti-iodelay: remove redundant unused variable dev pinctrl: max77620: Use common error handling code in max77620_pinconf_set() pinctrl: gemini: Implement clock skew/delay config pinctrl: gemini: Use generic DT parser pinctrl: Add skew-delay pin config and bindings pinctrl: armada-37xx: Add edge both type gpio irq support pinctrl: uniphier: remove eMMC hardware reset pin-mux pinctrl: rockchip: Add iomux-route switching support for rk3288 pinctrl: intel: Add Intel Cedar Fork PCH pin controller support pinctrl: intel: Make offset to interrupt status register configurable pinctrl: sunxi: Enforce the strict mode by default pinctrl: sunxi: Disable strict mode for old pinctrl drivers pinctrl: sunxi: Introduce the strict flag pinctrl: sh-pfc: Save/restore registers for PSCI system suspend pinctrl: sh-pfc: r8a7796: Use generic IOCTRL register description ...
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-19 13:22:12 +0000