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2015-02-15Merge tag 'usb-3.20-rc1' of ↵Linus Torvalds7-94/+369
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb Pull USB patches from Greg KH: "Here's the big pull request for the USB driver tree for 3.20-rc1. Nothing major happening here, just lots of gadget driver updates, new device ids, and a bunch of cleanups. All of these have been in linux-next for a while with no reported issues" * tag 'usb-3.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (299 commits) usb: musb: fix device hotplug behind hub usb: dwc2: Fix a bug in reading the endpoint directions from reg. staging: emxx_udc: fix the build error usb: Retry port status check on resume to work around RH bugs Revert "usb: Reset USB-3 devices on USB-3 link bounce" uhci-hub: use HUB_CHAR_* usb: kconfig: replace PPC_OF with PPC ehci-pci: disable for Intel MID platforms (update) usb: gadget: Kconfig: use bool instead of boolean usb: musb: blackfin: remove incorrect __exit_p() USB: fix use-after-free bug in usb_hcd_unlink_urb() ehci-pci: disable for Intel MID platforms usb: host: pci_quirks: joing string literals USB: add flag for HCDs that can't receive wakeup requests (isp1760-hcd) USB: usbfs: allow URBs to be reaped after disconnection cdc-acm: kill unnecessary messages cdc-acm: add sanity checks usb: phy: phy-generic: Fix USB PHY gpio reset usb: dwc2: fix USB core dependencies usb: renesas_usbhs: fix NULL pointer dereference in dma_release_channel() ...
2015-02-11Merge tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsiLinus Torvalds8-0/+1784
Pull first round of SCSI updates from James Bottomley: "This is the usual grab bag of driver updates (hpsa, storvsc, mp2sas, megaraid_sas, ses) plus an assortment of minor updates. There's also an update to ufs which adds new phy drivers and finally a new logging infrastructure for SCSI" * tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi: (114 commits) scsi_logging: return void for dev_printk() functions scsi: print single-character strings with seq_putc scsi: merge consecutive seq_puts calls scsi: replace seq_printf with seq_puts aha152x: replace seq_printf with seq_puts advansys: replace seq_printf with seq_puts scsi: remove SPRINTF macro sg: remove an unused variable hpsa: Use local workqueues instead of system workqueues hpsa: add in P840ar controller model name hpsa: add in gen9 controller model names hpsa: detect and report failures changing controller transport modes hpsa: shorten the wait for the CISS doorbell mode change ack hpsa: refactor duplicated scan completion code into a new routine hpsa: move SG descriptor set-up out of hpsa_scatter_gather() hpsa: do not use function pointers in fast path command submission hpsa: print CDBs instead of kernel virtual addresses for uncommon errors hpsa: do not use a void pointer for scsi_cmd field of struct CommandList hpsa: return failed from device reset/abort handlers hpsa: check for ctlr lockup after command allocation in main io path ...
2015-01-30phy: miphy365x: Pass sysconfig register offsets via syscfg dt property.Peter Griffin1-19/+10
Based on Arnds review comments here https://lkml.org/lkml/2014/11/13/161, update the miphy365 phy driver to access sysconfig register offsets via syscfg dt property. This is because the reg property should not be mixing address spaces like it does currently for miphy365. This change then also aligns us to how other platforms such as keystone and bcm7445 pass there syscon offsets via DT. This patch breaks DT compatibility, but this platform is considered WIP, and is only used by a few developers who are upstreaming support for it. This change has been done as a single atomic commit to ensure it is bisectable. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Maxime Coquelin <maxime.coquelin@st.com> Tested-by: Maxime Coquelin <maxime.coquelin@st.com>
2015-01-30phy: exynos-video-mipi: Fix regression by adding support for PMU regmapSylwester Nawrocki1-32/+57
After the Exynos Power Management Unit (PMU) driver was converted to the platform device driver in commit 14fc8b93d47323561edf5d482 ("ARM: EXYNOS: Add platform driver support for Exynos PMU") and then PMU device nodes added to Exynos4 DTs in commit 7b9613aca42a5522d269 ("ARM: dts: add PMU syscon node for exynos4") the mipi video phy driver started failing probing, due to overlapping memory mapped register region resources. Now all the Exynos peripheral devices which have registers in the PMU region are supposed to use the regmap provided by the syscon driver. So support for regmap is added in this patch, this unfortunately creates yet another indirection into that supposedly trivial driver. The additional mutex is required because single register is used by PHY pairs (they share bit in a register). An improvement here could be to allow a PHY instance be created with a driver custom mutex, which would then be common for each PHY pair. This would eliminate one of 3 mutexes which need to be taken in the phy_power_on/ phy_power_off code path. However, I tried to keep this bug fix patch possibly simple. This change is needed to make MIPI DSI displays and MIPI CSI-2 camera sensors working again on Exynos4 boards. Cc: Pankaj Dubey <pankaj.dubey@samsung.com> Cc: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-01-30phy: add a driver for the Rockchip SoC internal USB2.0 PHYYunzhi Li3-0/+166
This patch to add a generic PHY driver for ROCKCHIP usb PHYs, currently this driver can support RK3288. The RK3288 SoC have three independent USB PHY IPs which are all configured through a set of registers located in the GRF (general register files) module. Signed-off-by: Yunzhi Li <lyz@rock-chips.com> Tested-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-01-27Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller4-10/+13
Conflicts: arch/arm/boot/dts/imx6sx-sdb.dts net/sched/cls_bpf.c Two simple sets of overlapping changes. Signed-off-by: David S. Miller <davem@davemloft.net>
2015-01-21phy: phy-stih407-usb: Pass sysconfig register offsets via syscfg property.Peter Griffin1-11/+14
Based on Arnds review comments here https://lkml.org/lkml/2014/11/13/161, update the phy driver to not use the reg property to access the sysconfig register offsets. This is because other phy's (miphy28, miphy365) have a combination of memory mapped registers and sysconfig control regs, and we shouldn't be mixing address spaces in the reg property. In addition we would ideally like the sysconfig offsets to be passed via DT in a uniform way. This new method will also allow us to support devices which have sysconfig registers in different banks more easily and it is also analagous to how keystone and bcm7745 platforms pass there syscon offsets in DT. This breaks DT compatibility, but this platform is considered WIP, and is only used by a few developers who are upstreaming support for it. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-01-21phy: miphy28lp: Pass sysconfig register offsets via syscfg dt property.Gabriel FERNANDEZ1-29/+32
Based on Arnds review comments here https://lkml.org/lkml/2014/11/13/161, update the miphy28lp phy driver to access sysconfig register offsets via syscfg dt property. This is because the reg property should not be mixing address spaces like it does currently for miphy28lp. This change then also aligns us to how other platforms such as keystone and bcm7445 pass there syscon offsets via DT. I have updated the miphy28lp phy driver same way as Peter's implementation. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-01-21phy: fix return value check in armada375_usb_phy_probe()Wei Yongjun1-2/+2
In case of error, the function devm_ioremap_resource() returns ERR_PTR() and never returns NULL. The NULL test in the return value check should be replaced with IS_ERR(). Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-01-21phy: ti-pipe3: Fix SATA across suspend/resumeRoger Quadros1-16/+42
Failed test case: Boot without SATA drive connected. Suspend/resume the board and then connect SATA drive. It fails to enumerate. Due to Errata i783 "SATA Lockup After SATA DPLL Unlock/Relock" we can't allow SATA DPLL to be in the unlocked state. The SATA refclk (sata_ref_clk) is the source of the SATA_DPLL. This clock is being controlled only by the AHCI SATA driver and is shut off during system suspend (if the SATA drive was not already attached) causing the SATA DPLL to be unlocked and so causing errata i783. To prevent sata_ref_clk from being disabled, we add the control of this clock to the SATA PHY driver and prevent it from being disabled. This also fixes the issue of SATA not working on OMAP5/DRA7 when AHCI platform driver is built as a module. NOTE: Device tree changes also required for OMAP5 & DRA7. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-01-21phy: ti-pipe3: Disable clocks on system suspendRoger Quadros1-22/+77
On system suspend, the runtime_suspend() driver hook doesn't get called for USB phy and so the clocks are not disabled in the driver. This causes the L3INIT_960M_GFCLK and L3INIT_480M_GFCLK to remain active on the DRA7 platform while in system suspend. In case of pcie-phy, the runtime_suspend hook gets called after the suspend hook so we introduce a flag phy->enabled to keep track if our clocks are enabled or not to prevent multiple enable/disables. Add suspend/resume hooks to the driver. Move enabling/disabling clock code into helper functions. Reported-by: Nishant Menon <nm@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-01-20phy: qcom-ufs: add support for 14nm phyYaniv Gardi3-0/+379
This change adds a support for a 14nm qcom-ufs phy that is required in platforms that use ufs-qcom controller. Signed-off-by: Yaniv Gardi <ygardi@codeaurora.org> Reviewed-by: Dov Levenglick <dovl@codeaurora.org> Signed-off-by: Christoph Hellwig <hch@lst.de>
2015-01-20phy: qcom-ufs: add support for 20nm phyYaniv Gardi4-1/+535
This change adds a support for a 20nm qcom-ufs phy that is required in platforms that use ufs-qcom controller. Signed-off-by: Yaniv Gardi <ygardi@codeaurora.org> Reviewed-by: Dov Levenglick <dovl@codeaurora.org> Signed-off-by: Christoph Hellwig <hch@lst.de>
2015-01-20phy: qcom-ufs: add support for QUALCOMM Technologies UFS PHY driversYaniv Gardi4-0/+871
This change adds a generic and common API support for ufs phy QUALCOMM Technologies. This support provides common code and also points to specific phy callbacks to differentiate between different behaviors of frequent use-cases (like power on, power off, phy calibration etc). Signed-off-by: Yaniv Gardi <ygardi@codeaurora.org> Reviewed-by: Dov Levenglick <dovl@codeaurora.org> Signed-off-by: Christoph Hellwig <hch@lst.de>
2015-01-11phy: miphy365x: Pass sysconfig register offsets via syscfg dt property.Peter Griffin1-19/+10
Based on Arnds review comments here https://lkml.org/lkml/2014/11/13/161, update the miphy365 phy driver to access sysconfig register offsets via syscfg dt property. This is because the reg property should not be mixing address spaces like it does currently for miphy365. This change then also aligns us to how other platforms such as keystone and bcm7445 pass there syscon offsets via DT. This patch breaks DT compatibility, but this platform is considered WIP, and is only used by a few developers who are upstreaming support for it. This change has been done as a single atomic commit to ensure it is bisectable. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-01-11phy: phy-stih407-usb: Pass sysconfig register offsets via syscfg property.Peter Griffin1-11/+14
Based on Arnds review comments here https://lkml.org/lkml/2014/11/13/161, update the phy driver to not use the reg property to access the sysconfig register offsets. This is because other phy's (miphy28, miphy365) have a combination of memory mapped registers and sysconfig control regs, and we shouldn't be mixing address spaces in the reg property. In addition we would ideally like the sysconfig offsets to be passed via DT in a uniform way. This new method will also allow us to support devices which have sysconfig registers in different banks more easily and it is also analagous to how keystone and bcm7745 platforms pass there syscon offsets in DT. This breaks DT compatibility, but this platform is considered WIP, and is only used by a few developers who are upstreaming support for it. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-12-23phy: phy-ti-pipe3: fix inconsistent enumeration of PCIe gen2 cardsVignesh R2-8/+9
Prior to DRA74x silicon rev 1.1, pcie_pcs register bits 8-15 and bits 16-23 were used to configure RC delay count for phy1 and phy2 respectively. phyid was used as index to distinguish the phys and to configure the delay values appropriately. As of DRA74x silicon rev 1.1, pcie_pcs register definition has changed. Bits 16-23 are used to configure delay values for *both* phy1 and phy2. Hence phyid is no longer required. So, drop id field from ti_pipe3 structure and its subsequent references for configuring pcie_pcs register. Also, pcie_pcs register now needs to be configured with delay value of 0x96 at bit positions 16-23. See register description of CTRL_CORE_PCIE_PCS in ARM572x TRM, SPRUHZ6, October 2014, section 18.5.2.2, table 18-1804. This is needed to ensure Gen2 cards are enumerated consistently. DRA72x silicon behaves same way as DRA74x rev 1.1 as far as this functionality is considered. Test results on DRA74x and DRA72x EVMs: Before patch ------------ DRA74x ES 1.0: Gen1 cards work, Gen2 cards do not work (expected result due to silicon errata) DRA74x ES 1.1: Gen1 cards work, Gen2 cards do not work sometimes due to incorrect programming of register DRA72x: Gen1 cards work, Gen2 cards do not work sometimes due to incorrect programming of register After patch ----------- DRA74x ES 1.0: Gen1 cards work, Gen2 cards do not work (expected result due to silicon errata) DRA74x ES 1.1: Gen1 cards work, Gen2 cards work consistently. DRA72x: Gen1 and Gen2 cards enumerate consistently. Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-12-23phy-sun4i-usb: Change disconnect threshold value for sun6iHans de Goede1-1/+2
The allwinner SDK uses a value of 3 for the disconnect threshold setting on sun6i, do the same in the kernel. In my previous experience with sun5i problems getting the threshold right is important to avoid usb2 devices being unplugged sometimes going unnoticed. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-12-23phy: miphy28lp: unlock on error in miphy28lp_init()Dan Carpenter1-1/+2
We need to unlock before returning the -EINVAL here. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Acked-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-12-18Merge tag 'pm+acpi-3.19-rc1-2' of ↵Linus Torvalds2-2/+2
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm Pull more ACPI and power management updates from Rafael Wysocki: "These are regression fixes (leds-gpio, ACPI backlight driver, operating performance points library, ACPI device enumeration messages, cpupower tool), other bug fixes (ACPI EC driver, ACPI device PM), some cleanups in the operating performance points (OPP) framework, continuation of CONFIG_PM_RUNTIME elimination, a couple of minor intel_pstate driver changes, a new MAINTAINERS entry for it and an ACPI fan driver change needed for better support of thermal management in user space. Specifics: - Fix a regression in leds-gpio introduced by a recent commit that inadvertently changed the name of one of the properties used by the driver (Fabio Estevam). - Fix a regression in the ACPI backlight driver introduced by a recent fix that missed one special case that had to be taken into account (Aaron Lu). - Drop the level of some new kernel messages from the ACPI core introduced by a recent commit to KERN_DEBUG which they should have used from the start and drop some other unuseful KERN_ERR messages printed by ACPI (Rafael J Wysocki). - Revert an incorrect commit modifying the cpupower tool (Prarit Bhargava). - Fix two regressions introduced by recent commits in the OPP library and clean up some existing minor issues in that code (Viresh Kumar). - Continue to replace CONFIG_PM_RUNTIME with CONFIG_PM throughout the tree (or drop it where that can be done) in order to make it possible to eliminate CONFIG_PM_RUNTIME (Rafael J Wysocki, Ulf Hansson, Ludovic Desroches). There will be one more "CONFIG_PM_RUNTIME removal" batch after this one, because some new uses of it have been introduced during the current merge window, but that should be sufficient to finally get rid of it. - Make the ACPI EC driver more robust against race conditions related to GPE handler installation failures (Lv Zheng). - Prevent the ACPI device PM core code from attempting to disable GPEs that it has not enabled which confuses ACPICA and makes it report errors unnecessarily (Rafael J Wysocki). - Add a "force" command line switch to the intel_pstate driver to make it possible to override the blacklisting of some systems in that driver if needed (Ethan Zhao). - Improve intel_pstate code documentation and add a MAINTAINERS entry for it (Kristen Carlson Accardi). - Make the ACPI fan driver create cooling device interfaces witn names that reflect the IDs of the ACPI device objects they are associated with, except for "generic" ACPI fans (PNP ID "PNP0C0B"). That's necessary for user space thermal management tools to be able to connect the fans with the parts of the system they are supposed to be cooling properly. From Srinivas Pandruvada" * tag 'pm+acpi-3.19-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (32 commits) MAINTAINERS: add entry for intel_pstate ACPI / video: update the skip case for acpi_video_device_in_dod() power / PM: Eliminate CONFIG_PM_RUNTIME NFC / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM SCSI / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM ACPI / EC: Fix unexpected ec_remove_handlers() invocations Revert "tools: cpupower: fix return checks for sysfs_get_idlestate_count()" tracing / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM x86 / PM: Replace CONFIG_PM_RUNTIME in io_apic.c PM: Remove the SET_PM_RUNTIME_PM_OPS() macro mmc: atmel-mci: use SET_RUNTIME_PM_OPS() macro PM / Kconfig: Replace PM_RUNTIME with PM in dependencies ARM / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM sound / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM phy / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM video / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM tty / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM spi: Replace CONFIG_PM_RUNTIME with CONFIG_PM ACPI / PM: Do not disable wakeup GPEs that have not been enabled ACPI / utils: Drop error messages from acpi_evaluate_reference() ...
2014-12-13phy / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PMRafael J. Wysocki2-2/+2
After commit b2b49ccbdd54 (PM: Kconfig: Set PM_RUNTIME if PM_SLEEP is selected) PM_RUNTIME is always set if PM is set, so #ifdef blocks depending on CONFIG_PM_RUNTIME may now be changed to depend on CONFIG_PM. Replace CONFIG_PM_RUNTIME with CONFIG_PM everywhere under drivers/phy/. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-11-27Merge tag 'for-3.19' of ↵Greg Kroah-Hartman28-118/+1936
git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into usb-testing Kishon writes: Improvements in phy-core specifically on PHY core finds the PHY in the case of non-dt boot. Adds three new PHY drivers using the PHY framework and some miscellaneous fixes and cleanups.
2014-11-26phy: add support for USB cluster on the Armada 375 SoCGregory CLEMENT3-0/+165
The Armada 375 SoC comes with an USB2 host and device controller and an USB3 controller. The USB cluster control register allows to manage common features of both USB controllers. This commit adds a driver integrated in the generic PHY framework to control this USB cluster feature. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> [ kishon@ti.com : Made it to use the updated devm_phy_create API and soem cosmentic changes in Kconfig file.] Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Jason Cooper <jason@lakedaemon.net>
2014-11-26phy: Use PTR_ERR_OR_ZERO to fix warning raised by coccinelleGregory CLEMENT4-16/+4
Use PTR_ERR_OR_ZERO rather than if(IS_ERR(...)) + PTR_ERR Generated by: coccinelle/api/ptr_ret.cocci Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-11-25Merge tag 'usb-for-v3.19' of ↵Greg Kroah-Hartman2-12/+8
git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next Felipe writes: usb: patches for v3.19 merge window This time, a very pull request with 216 non-merge commits. Most of the commits contained here are sparse or coccinelle fixes ranging from missing 'static' to returning 0 in case of errors. More importantly, we have the removal the now unnecessary 'driver' argument to ->udc_stop(). DWC2 learned about Dual-Role builds. Users of this IP can now have a single driver built for host and device roles. DWC3 got support for two new HW platforms: Exynos7 and AMD. The Broadcom USB 3.0 Device Controller IP is now supported and so is PLX USB338x, which means DWC3 has lost is badge as the only USB 3.0 peripheral IP supported on Linux. Thanks for Tony Lindgren's work, we can now have a distro-like kernel where all MUSB glue layers can be built into the same kernel (statically or dynamically linked) and it'll work in PIO (DMA will come probably on v3.20). Other than these, the usual set of cleanups and non-critical fixes. Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-22phy: exynos7-usbdrd: Update dependency for ARCH_EXYNOSVivek Gautam1-1/+1
This PHY controller is also present on Exynos7 platform in arch-exynos family. So PHY_EXYNOS5_USBDRD should now depend on ARCH_EXYNOS. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-11-22phy: exynos5-usbdrd: Add facility for VBUS-BOOST-5V supplyVivek Gautam1-2/+30
Some Exynos boards have a separate regulator controlling a Boost 5V supply which goes as input for VBUS regulator. So adding a control for the same in driver, to enable vbus supply on the port. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-11-22phy: exynos5-usbdrd: Add pipe-clk, utmi-clk and itp-clk supportVivek Gautam1-18/+86
Exynos7 SoC has now separate gate control for 125MHz pipe3 phy clock, as well as 60MHz utmi phy clock. Additionally, separate gate control is available for the clock used for ITP (Isochronous Transfer Packet) generation. So get the same and control in the phy-exynos5-usbdrd driver. Suggested-by: Anton Tikhomirov <av.tikhomirov@samsung.com> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-11-22phy: remove the old lookup methodHeikki Krogerus25-74/+28
The users of the old method are now converted to the new one. Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> [ kishon@ti.com : made phy-berlin-usb.c and phy-miphy28lp.c to use the updated devm_phy_create API.] Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-11-22phy: twl4030: use the new lookup methodHeikki Krogerus1-3/+6
Creates the lookup separately. Hard coding the consumer as it can't be anything else except musb. Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-11-21phy: improved lookup methodHeikki Krogerus1-1/+83
Separates registration of the phy and the lookup. The method is copied from clkdev.c, Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-11-21phy: add the Berlin USB PHY driverAntoine Tenart3-0/+232
Add the driver driving the Marvell Berlin USB PHY. This allows to initialize the PHY and to use it from the USB driver later. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-11-13phy: berlin-sata: Add support for BG2 SATA PHYSebastian Hesselbarth1-1/+6
Berlin BG2 also has a SATA PHY compatible with the current driver except different PHY_BASE. Add a new compatible to the driver reflecting the different PHY_BASE. Acked-by: Antoine Ténart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-11-13phy: berlin-sata: Move PHY_BASE into private data structSebastian Hesselbarth1-9/+15
Currently, Berlin SATA PHY driver assumes PHY_BASE address being constant. While this PHY_BASE is correct for BG2Q, older BG2 PHY_BASE is different. Prepare the driver for BG2 support by moving the phy_base into private driver data. Acked-by: Antoine Ténart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-11-13phy: sun4i: add support for USB phy0Roman Byshko1-3/+6
The driver for sun4i USB phys currently supports only phy1 and phy2 which are used for USB host controllers. This patch adds support for USB phy0, which is used by the musb hdrc USB controller. Signed-off-by: Roman Byshko <rbyshko@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-11-12phy: phy-core: use the np present in of_phandle_args to get the PHYKishon Vijay Abraham I1-9/+1
Instead of using the node pointer of the PHY provider and then scanning its child nodes to get a reference to the PHY, directly use the node pointer present in of_phandle_args to get a reference to the PHY. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-11-12phy: miphy28lp: Tune tx impedance across Soc cutsGabriel FERNANDEZ1-0/+16
This patch to compensate tx impedance (Sata, PCIe) depending on Soc cuts the kernel is built for. Signed-off-by: Giuseppe Condorelli <giuseppe.condorelli@st.com> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-11-12phy: miphy28lp: Add SSC support for PCIEGabriel FERNANDEZ1-0/+44
SSC is the technique of modulating the operating frequency of a signal slightly to spread its radiated emissions over a range of frequencies. This reduction in the maximum emission for a given frequency helps meet radiated emission requirements. These settings are applicable for PCIE with Internal clock. Signed-off-by: Harsh Gupta <harsh.gupta@st.com> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-11-12phy: miphy28lp: Add SSC support for SATAGabriel FERNANDEZ1-0/+46
This patch to tune on/off the ssc on miphy sata setup. User can now enable ssc via dt blob, it is useful to reduce effects of EMI. Signed-off-by: Giuseppe Condorelli <giuseppe.condorelli@st.com> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-11-12phy: miphy28lp: Provide support for the MiPHY28lp Generic PHYGabriel FERNANDEZ3-0/+1186
The MiPHY28lp is a Generic PHY which can serve various SATA or PCIe or USB3 devices. Signed-off-by: alexandre torgue <alexandre.torgue@st.com> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-11-10phy: twl4030: Fix build breakageFelipe Balbi1-3/+3
commit e47d925 (usb: move the OTG state from the USB PHY to the OTG structure) moved the OTG state field from struct usb_phy to struct usb_otg but, even though I fixed many other build breakages, I still missed one on phy-twl4030-usb.c. Fix the build breakage now. While at that, also a build warning introduced by the same commit. Cc: Kishon Vijay Abraham I <kishon@ti.com> Cc: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-05phy: omap-usb2: Enable runtime PM of omap-usb2 phy properlyOussama Ghorbel1-2/+4
The USB OTG port does not work since v3.16 on omap platform. This is a regression introduced by the commit eb82a3d846fa (phy: omap-usb2: Balance pm_runtime_enable() on probe failure and remove). This because the call to pm_runtime_enable() function is moved after the call to devm_phy_create() function, which has side effect since later in the subsequent calls of devm_phy_create() there is a check with pm_runtime_enabled() to configure few things. Fixes: eb82a3d846fa Signed-off-by: Oussama Ghorbel <ghorbel@pivasoftware.com> Tested-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Cc: stable <stable@vger.kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-11-03usb: rename phy to usb_phy in OTGAntoine Tenart1-3/+3
This patch prepares the introduction of the generic PHY support in the USB OTG common functions. The USB PHY member of the OTG structure is renamed to 'usb_phy' and modifications are done in all drivers accessing it. Renaming this pointer will allow to keep the compatibility for USB PHY drivers. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03usb: move the OTG state from the USB PHY to the OTG structureAntoine Tenart1-6/+2
Before using the PHY framework instead of the USB PHY one, we need to move the OTG state into another place, since it won't be available when USB PHY isn't used. This patch moves the OTG state into the OTG structure, and makes all the needed modifications in the drivers using the OTG state. [ balbi@ti.com : fix build regressions with phy-tahvo.c, musb_dsps.c, phy-isp1301-omap, and chipidea's debug.c ] Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-09-24phy: remove .owner field for drivers using module_platform_driverPeter Griffin18-18/+0
This patch removes the superflous .owner field for drivers which use the module_platform_driver or platform_driver_register api, as this is overriden in __platform_driver_register. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-09-24phy: exynos-dp-video: Use syscon support to control pmu registerVivek Gautam1-25/+54
Currently the DP_PHY_ENABLE register is mapped in the driver, and accessed to control power to the PHY. With mfd-syscon and regmap interface available at our disposal, it's wise to use that instead of using a 'reg' property for the controller and allocating a memory resource for that. To facilitate this, we have added another compatible string for Exynso5420 SoC to acquire driver data which contains different DP-PHY-CONTROL register offset. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Jingoo Han <jg1.han@samsung.com> Cc: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-09-24phy: phy-stih41x-usb: Add usb phy support for STiH41x SoCs.Peter Griffin3-0/+196
This driver adds support for USB (1.1 and 2.0) phy for STiH415 and STiH416 System-On-Chips from STMicroelectronics. Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-09-24phy: phy-stih407-usb: Add usb picoPHY driver found on stih407 SoC familyPeter Griffin3-0/+187
This is the generic phy driver for the picoPHY ports used by the USB2 and USB3 Host controllers when controlling usb2/1.1 devices. It is found on STiH407 SoC family from STMicroelectronics. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-09-24usb: phy: twl4030-usb: Use mutex instead of spinlock for protecting the dataTony Lindgren1-9/+7
We're using threaded irq on a I2C bus and we're sleeping in twl4030_usb_irq() as it calls twl4030_usb_linkstat() which calls the i2c functions. If we ever need to lock for longer I2C transaction sequences a mutex will allow us to do that easily. Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-09-24usb: phy: twl4030-usb: Remove asleep and rely on runtime PMTony Lindgren1-9/+5
There's no longer need for tracking the phy state in the driver with asleep, we can now rely on runtime PM. Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>