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path: root/drivers/phy/cadence/phy-cadence-torrent.c
AgeCommit message (Expand)AuthorFilesLines
2021-03-31phy: cadence-torrent: Add delay for PIPE clock to be stableKishon Vijay Abraham I1-0/+9
2021-03-31phy: cadence-torrent: Explicitly request exclusive reset controlKishon Vijay Abraham I1-1/+1
2021-03-31phy: cadence-torrent: Do not configure SERDES if it's already configuredKishon Vijay Abraham I1-10/+22
2021-03-31phy: cadence-torrent: Group reset APIs and clock APIsKishon Vijay Abraham I1-31/+53
2021-03-31phy: cadence-torrent: Use a common header file for Cadence SERDESKishon Vijay Abraham I1-1/+1
2021-03-30phy: cadence-torrent: Update PCIe + USB config for correct PLL1 clockSwapnil Jakhade1-16/+31
2021-03-30phy: cadence-torrent: Update SGMII/QSGMII configuration specific to TIKishon Vijay Abraham I1-14/+44
2021-03-30phy: cadence-torrent: Update PCIe + QSGMII config for correct PLL1 clockSwapnil Jakhade1-28/+49
2021-03-30phy: cadence-torrent: Add support to drive refclk outKishon Vijay Abraham I1-3/+185
2021-01-13phy: cadence-torrent: Fix error code in cdns_torrent_phy_probe()Dan Carpenter1-0/+1
2020-09-18phy: cadence-torrent: Add USB + SGMII/QSGMII multilink configurationSwapnil Jakhade1-0/+254
2020-09-18phy: cadence-torrent: Add PCIe + USB multilink configurationSwapnil Jakhade1-0/+216
2020-09-18phy: cadence-torrent: Add single link USB register sequencesSwapnil Jakhade1-1/+259
2020-09-18phy: cadence-torrent: Add single link SGMII/QSGMII register sequencesSwapnil Jakhade1-0/+89
2020-09-18phy: cadence-torrent: Configure PHY_PLL_CFG as part of link_cmn_valsSwapnil Jakhade1-4/+18
2020-09-18phy: cadence-torrent: Add PHY link configuration sequences for single linkSwapnil Jakhade1-0/+44
2020-09-18phy: cadence-torrent: Add clk changes for multilink configurationSwapnil Jakhade1-24/+17
2020-09-18phy: cadence-torrent: Update PHY reset for multilink configurationSwapnil Jakhade1-7/+21
2020-09-18phy: cadence-torrent: Add support for PHY multilink configurationSwapnil Jakhade1-26/+757
2020-09-18phy: cadence-torrent: Add PHY APB reset supportSwapnil Jakhade1-0/+13
2020-09-18phy: cadence-torrent: Check cmn_ready assertion during PHY power onSwapnil Jakhade1-1/+30
2020-09-18phy: cadence-torrent: Add single link PCIe supportSwapnil Jakhade1-30/+266
2020-09-18phy: cadence-torrent: Check total lane count for all subnodes is within limitSwapnil Jakhade1-4/+15
2020-09-18phy: cadence-torrent: Add separate regmap functions for torrent and DPSwapnil Jakhade1-33/+66
2020-09-18phy: cadence-torrent: Enable support for multiple subnodesSwapnil Jakhade1-15/+0
2020-09-18phy: cadence-torrent: Use devm_platform_ioremap_resource() to get reg addressesSwapnil Jakhade1-6/+2
2020-09-18phy: cadence-torrent: Use of_device_get_match_data() to get driver dataSwapnil Jakhade1-8/+5
2020-09-16phy: cadence: torrent: Constify regmap_config structsRikard Falkeborn1-6/+6
2020-09-16phy: cadence-torrent: Set Torrent PHY attributesSwapnil Jakhade1-0/+4
2020-03-20phy: cadence-torrent: Add support for subnode bindingsSwapnil Jakhade1-75/+217
2020-03-20phy: cadence-torrent: Add platform dependent initialization structureSwapnil Jakhade1-0/+9
2020-03-20phy: cadence-torrent: Use regmap to read and write DPTX PHY registersSwapnil Jakhade1-69/+100
2020-03-20phy: cadence-torrent: Use regmap to read and write Torrent PHY registersSwapnil Jakhade1-369/+650
2020-03-20phy: cadence-torrent: Implement PHY configure APIsSwapnil Jakhade1-5/+431
2020-03-20phy: cadence-torrent: Add 19.2 MHz reference clock supportSwapnil Jakhade1-17/+441
2020-03-20phy: cadence-torrent: Refactor code for reusabilitySwapnil Jakhade1-93/+137
2020-03-20phy: cadence-torrent: Add wrapper for DPTX register accessSwapnil Jakhade1-21/+50
2020-03-20phy: cadence-torrent: Add wrapper for PHY register accessSwapnil Jakhade1-65/+77
2020-03-20phy: cadence-torrent: Adopt Torrent nomenclatureSwapnil Jakhade1-53/+58
2020-03-20phy: cadence-dp: Rename to phy-cadence-torrentYuti Amonkar1-0/+541