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path: root/drivers/net/wireless/ath/ath9k/ar9003_hw.c
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2019-10-28net: Fix misspellings of "configure" and "configuration"Geert Uytterhoeven1-1/+1
Fix various misspellings of "configuration" and "configure". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Kalle Valo <kvalo@codeaurora.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-01-26ath9k_hw: add low power tx gain table for AR953xFelix Fietkau1-0/+3
Used in some newer TP-Link AR9533 devices. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2015-10-14ath9k: rename ini_modes_rxgain_5g_xlna to ini_modes_rxgain_xlnaMiaoqing Pan1-5/+5
rename the variable as preparation for using the array with 2.4 GHz band, etc. Signed-off-by: Miaoqing Pan <miaoqing@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2015-03-20ath9k: Register private AIC opsSujith Manoharan1-0/+1
AIC can be disabled or enabled on a per-card basis using MCI configuration, so register a function to check its status. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2015-03-13ath9k: Check allowed PCIE powersave configurationSujith Manoharan1-16/+57
When assigning the initvals for PCIE sleep/awake registers, check the configuration that has been assigned to pll_pwrsave during initialization. Also, display a warning if we don't have valid arrays. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2015-03-13ath9k: Fix PLL powersave for AR9485Sujith Manoharan1-5/+5
Use the value in ah->config.pll_pwrsave to determine which array needs to be loaded. Also, initialize pll_pwrsave to 1 by default. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2015-01-15ath9k: Add initvals for QCA956xMiaoqing Pan1-1/+60
Signed-off-by: Miaoqing Pan <miaoqing@qca.qualcomm.com> Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2014-11-17ath9k: Use new QCA953x initvalsMiaoqing Pan1-10/+41
This patch updates the initvals for QCA953x v1.1 and v2.0 Signed-off-by: Miaoqing Pan <miaoqing@qca.qualcomm.com> Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-10-27ath9k_hw: remove support for UB124 tx gain tableFelix Fietkau1-3/+0
UB124 is a USB based reference design not supported by ath9k or ath9k_htc. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-06-25ath9k_hw: Add QCA953x 2.0 initvalsRajkumar Manoharan1-4/+11
Signed-off-by: Rajkumar Manoharan <rmanohar@qti.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-01-03ath9k: Initialize QCA953x INI arraysSujith Manoharan1-1/+47
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-01-03ath9k: Fix MAC HW hang check for AR9003Sujith Manoharan1-55/+75
The current method of identifying MAC hangs is convoluted and also, the signatures are wrong and don't apply to all the chips in the AR9003 family. Fix this by cleaning up the code and checking for the correct hang signatures. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-01-03ath9k: Add HW callbacks for MAC/BB hang checksSujith Manoharan1-0/+72
This is required for adding separate hang check routines for AR9002 and AR9003. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-01-03ath9k: Register supported HW hang checksSujith Manoharan1-0/+21
HW hang checks have to be done on a per-chip basis. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-12-09ath9k: Use a separate TX gain table for WZR-HP-G450HSujith Manoharan1-3/+9
The Buffalo device WZR-HP-G450H uses the index 3 for TX gain, which is set to the high_power table currently. Later variants of the router use the same index, but instead refer to the low_ob_db gain table. This is not handled in the driver since there is no way to distinguish board revisions and the high_power table is used (incorrectly) for the newer variants. By default, devices based on AR9300 using the TX gain index 3 have to use the high_power table. To make sure that WZR-HP-G450H is not broken when the high_power table is updated, use a separate array based on information obtained from the platform data. The current situation where only the original variant of WZR-HP-G450H works properly stays unchanged. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-12-09ath9k: Initialize baseband for DFS channelsSujith Manoharan1-0/+6
Certain baseband registers require different values to be programmed when operating in a DFS channel to ensure that radar detection works correctly. This is required for AR9300, AR9340 and AR9580. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-12-02ath9k: Fix initvals for freq 2484Sujith Manoharan1-3/+9
This is missing for AR9300, AR9580 and AR9340. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-12-02ath9k: Remove duplicate initvals for AR9462 v2.1Sujith Manoharan1-12/+12
The initvals for AR9462 v2.1 are very similar to v2.0. Identify duplicate arrays and reuse the values from v2.0 to reduce module size. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-12-02ath9k: Attach INI arrays for AR9565 v1.1Sujith Manoharan1-0/+54
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-12-02ath9k: Apply CUS227 specific TX gain valuesSujith Manoharan1-0/+8
CUS227, which is an AR9340 based card used in Qualcomm's Allplay platforms requires a custom TX gain array, based on the index 7. Add suport for this. Cc: Michael Larson <mlarson@qce.qualcomm.com> Cc: Stephen Collmeyer <scollmey@qce.qualcomm.com> Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-12-02ath9k: Remove pcieSerDesWriteSujith Manoharan1-11/+9
This HW config option is always set to true and is not needed. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-12-02ath9k: Add SERDES initvals for AR9462 2.1Sujith Manoharan1-0/+4
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-11-11ath9k: Use correct PCIE initvals for AR9485Sujith Manoharan1-11/+11
Currently, the PLL is turned off for AR9485 when switching to a low power state, but AR9485 has an issue where the card will become unresponsive if left idle for a long time without any traffic. To fix this, force the PLL to always be on using a different initval array, ar9485_1_1_pll_on_cdr_on_clkreq_disable_L1. This is done for most of the AR9485 based cards like HB125, WB225 etc. but certain models require the feature to be turned off. Identify such cards and use default values for them. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-09-26ath9k: Add and use initvals for channel 14Sujith Manoharan1-0/+2
This is missing for AR9565. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-09-26ath9k: Use correct RX gain table for AR9565Sujith Manoharan1-0/+3
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-08-26ath9k: Fix ASPM workaround usageSujith Manoharan1-6/+1
The PCIE Workaround register (AR_WA/0x4004) is used to handle various hardware quirks. For AR9002 chips, AR_WA_D3_L1_DISABLE is used to prevent the HW from automatically entering L1 state when D3 is enforced. AR_WA_D3_L1_DISABLE has to be enabled for a few AR9280 based cards, mark them based on their PCI subdevice/subvendor IDs and enforce it in ar9002_hw_configpcipowersave(). Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-08-26ath9k: Fix ASPM for AR9462Sujith Manoharan1-0/+14
If the L1 entrance latency is not calibrated properly in the EEPROM in WB222 boards, there could be problems in connectivity. Check and correct the calibrated value if it doesn't match the optimal value for WB222, 4us. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-08-22ath9k: Add support for AR9485 1.2Sujith Manoharan1-9/+9
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-06-27ath9k: Add mix tx gain table for AR9462 2.0Sujith Manoharan1-0/+3
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-06-24ath9k: Program initvals for AR9462 2.1Sujith Manoharan1-2/+57
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-06-18ath9k: Program initvals for CUS217Sujith Manoharan1-0/+4
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-06-18ath9k: Add support for 5G-XLNA/AR9462Sujith Manoharan1-1/+17
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-01-28Merge branch 'master' of ↵John W. Linville1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless Conflicts: drivers/net/wireless/ath/ath9k/main.c drivers/net/wireless/iwlwifi/dvm/tx.c
2013-01-22ath9k_hw: fix RF bank initializationFelix Fietkau1-1/+1
ar900*_init_mode_regs needs to be called before RF banks are allocated, otherwise the storage size of RF banks isn't known. This patch fixes a memory overrun that can show up as a crash on unloading the module. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-01-11ath9k_hw: add tx gain tables for newer devicesFelix Fietkau1-18/+49
Improves stability on affected devices and also fixes the Tx IQ calibration related regression on some AR9340 devices such as the TP-Link TL-WDR4300. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-01-02ath9k_hw: Fix RX gain initvals for AR9485Sujith Manoharan1-1/+1
Populate iniModesRxGain with the correct initvals array for AR9485 v1.1 Cc: stable@vger.kernel.org Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-11-16ath9k_hw: Program filter coefficients correctlySujith Manoharan1-9/+13
2484 Mhz (Japan) usage requires filter coefficients to be programmed in the CCK TX FIR registers. This is required for AR9331, AR9485 and AR9462. Fix this and also remove a few useless macros and a duplicate variable. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-10-29ath9k_hw: Enable hw PLL power save for AR9565Rajkumar Manoharan1-2/+2
This reduced the power consumption to half in full and network sleep. Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-10-29ath9k_hw: Enable hw PLL power save for AR9462Rajkumar Manoharan1-2/+2
This reduced the power consumption to half in full and network sleep. Cc: stable@vger.kernel.org Cc: Paul Stewart <pstew@chromium.org> Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-09-11ath9k_hw: Add AR9565 initvalsSujith Manoharan1-5/+52
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-07-17ath9k_hw: remove redundant arguments to INIT_INI_ARRAYFelix Fietkau1-395/+146
The row/column sizes can be derived from the array argument within the macro itself, which is less error prone. In a few cases the supplied column size was actually wrong. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-07-17ath9k_hw: fix tx gain tables for AR934xFelix Fietkau1-6/+23
Use the EEPROM information to choose the right tx gain table Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-07-09ath9k: add mode register initialization code for AR9550Gabor Juhos1-2/+84
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-07-09ath9k: add initvals for AR9550Gabor Juhos1-0/+1
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-04-13ath9k_hw: Remove BTCOEX initvalsSujith Manoharan1-5/+0
The MAX_TXPWR table for BTCOEX is not needed for AR9462. Programming these values to the HW results in undesirable behavior - for example, large number of delimiter/data underruns are seen in AES-CCMP mode. Also, registers like AR_PCU_MISC_MODE2 return 0xdeadbeef after the BTCOEX_MAX power table is programmed to the HW, and frames being transmitted end up being looped back to the RX engine, an example being beacon frames in IBSS mode. Remove this table for now - this fixes CCMP performance and general IBSS usage. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-03-15ath9k_hw: clean up iniModesAdditionalFelix Fietkau1-12/+13
use iniModesFastClock for 5 ghz fast clock specific settings, and iniAdditional for clock/chip specific initval overrides Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-02-27ath9k: Remove AR9462 v1.0 supportSujith Manoharan1-85/+3
v1.0 chips are not available in the market. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-10-14ath9k: Rename AR9480 into AR9462Rajkumar Manoharan1-91/+91
Renamed to be in sync with Marketing term and to avoid confusion with other chip names. Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-10-14ath9k_hw: Rename AR9480 -> AR9462 initvalsRajkumar Manoharan1-2/+2
The AR946/8x chips are 2x2 Dual band with BT support. In order to avoid misleading with other chips and to be in sync with marketing team's term, AR9480 is renamed as AR9462. Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-09-16ath9k_hw: Add support for AR946/8x chipsets.Senthil Balasubramanian1-0/+191
This patch adds support for AR946/8x chipets. Signed-off-by: Senthil Balasubramanian <senthilb@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-08 22:25:49 +0000