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path: root/drivers/net/wireless/ath/ath10k/pci.c
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2019-04-29ath10k: perform crash dump collection in workqueueBrian Norris1-5/+19
Commit 25733c4e67df ("ath10k: pci: use mutex for diagnostic window CE polling") introduced a regression where we try to sleep (grab a mutex) in an atomic context: [ 233.602619] BUG: sleeping function called from invalid context at kernel/locking/mutex.c:254 [ 233.602626] in_atomic(): 1, irqs_disabled(): 0, pid: 0, name: swapper/0 [ 233.602636] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G W 5.1.0-rc2 #4 [ 233.602642] Hardware name: Google Scarlet (DT) [ 233.602647] Call trace: [ 233.602663] dump_backtrace+0x0/0x11c [ 233.602672] show_stack+0x20/0x28 [ 233.602681] dump_stack+0x98/0xbc [ 233.602690] ___might_sleep+0x154/0x16c [ 233.602696] __might_sleep+0x78/0x88 [ 233.602704] mutex_lock+0x2c/0x5c [ 233.602717] ath10k_pci_diag_read_mem+0x68/0x21c [ath10k_pci] [ 233.602725] ath10k_pci_diag_read32+0x48/0x74 [ath10k_pci] [ 233.602733] ath10k_pci_dump_registers+0x5c/0x16c [ath10k_pci] [ 233.602741] ath10k_pci_fw_crashed_dump+0xb8/0x548 [ath10k_pci] [ 233.602749] ath10k_pci_napi_poll+0x60/0x128 [ath10k_pci] [ 233.602757] net_rx_action+0x140/0x388 [ 233.602766] __do_softirq+0x1b0/0x35c [...] ath10k_pci_fw_crashed_dump() is called from NAPI contexts, and firmware memory dumps are retrieved using the diag memory interface. A simple reproduction case is to run this on QCA6174A / WLAN.RM.4.4.1-00132-QCARMSWP-1, which happens to be a way to b0rk the firmware: dd if=/sys/kernel/debug/ieee80211/phy0/ath10k/mem_value bs=4K count=1 of=/dev/null (NB: simulated firmware crashes, via debugfs, don't trigger firmware dumps.) The fix is to move the crash-dump into a workqueue context, and avoid relying on 'data_lock' for most mutual exclusion. We only keep using it here for protecting 'fw_crash_counter', while the rest of the coredump buffers are protected by a new 'dump_mutex'. I've tested the above with simulated firmware crashes (debugfs 'reset' file), real firmware crashes (the 'dd' command above), and a variety of reboot and suspend/resume configurations on QCA6174A. Reported here: http://lkml.kernel.org/linux-wireless/20190325202706.GA68720@google.com Fixes: 25733c4e67df ("ath10k: pci: use mutex for diagnostic window CE polling") Signed-off-by: Brian Norris <briannorris@chromium.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2019-02-20ath10k: switch to use SPDX license identifiersKalle Valo1-12/+1
Use SPDX identifiers everywhere in ath10k. Makefile was incorrectly marked in commit b24413180f56 ("License cleanup: add SPDX GPL-2.0 license identifier to files with no license"), fix that as well. Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2019-02-11ath10k: enable Factory Test Mode for WCN3990Rakesh Pillai1-1/+2
The support to put WCN3990 firmware into Factory test mode is not present currently. The WCN3990 firmware can operate in Factory test mode based on the mode it receives in the wlan enable message from the host driver. When the host driver is started in testmode send the operating mode as UTF mode, to the WCN3990 firmware, in the wlan enable message to start the firmware in Factory test mode. Tested on: WCN3990 Tested FW: WLAN.HL.2.0-01192-QCAHLSWMTPLZ-1. Signed-off-by: Rakesh Pillai <pillair@codeaurora.org> Reviewed-by: Brian Norris <briannorris@chromium.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2019-02-11ath10k: pci: use mutex for diagnostic window CE pollingBrian Norris1-26/+15
The DIAG copy engine is only used via polling, but it holds a spinlock with softirqs disabled. Each iteration of our read/write loops can theoretically take 20ms (two 10ms timeout loops), and this loop can be run an unbounded number of times while holding the spinlock -- dependent on the request size given by the caller. As of commit 39501ea64116 ("ath10k: download firmware via diag Copy Engine for QCA6174 and QCA9377."), we transfer large chunks of firmware memory using this mechanism. With large enough firmware segments, this becomes an exceedingly long period for disabling soft IRQs. For example, with a 500KiB firmware segment, in testing QCA6174A, I see 200 loop iterations of about 50-100us each, which can total about 10-20ms. In reality, we don't really need to block softirqs for this duration. The DIAG CE is only used in polling mode, and we only need to hold ce_lock to make sure any CE bookkeeping is done without screwing up another CE. Otherwise, we only need to ensure exclusion between ath10k_pci_diag_{read,write}_mem() contexts. This patch moves to use fine-grained locking for the shared ce_lock, while adding a new mutex just to ensure mutual exclusion of diag read/write operations. Tested on QCA6174A, firmware version WLAN.RM.4.4.1-00132-QCARMSWPZ-1. Fixes: 39501ea64116 ("ath10k: download firmware via diag Copy Engine for QCA6174 and QCA9377.") Signed-off-by: Brian Norris <briannorris@chromium.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2019-02-11ath10k: disable interface pause wow config for integrated chipsetGovind Singh1-1/+2
wow pause iface config controls the PCI D0/D3-WOW cases for pcie bus state. Firmware does not expects WOW_IFACE_PAUSE_ENABLED config for bus/link that cannot be suspended ex:snoc and does not trigger common subsystem shutdown. Disable interface pause wow config for integrated chipset(WCN3990) for correct WOW configuration in the firmware. Testing: Tested on WCN3990 HW. Tested FW: WLAN.HL.2.0-01192-QCAHLSWMTPLZ-1. Signed-off-by: Govind Singh <govinds@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2019-02-08Merge ath-next from git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.gitKalle Valo1-1/+1
ath.git patches for 5.1. Major changes: ath10k * change QMI interface to support the new (and backwards incompatible) interface from HL3.1 and used in recent HL2.0 branch firmware releases ath * add new country codes for US
2019-02-04ath10k: fix S5 power consumption issue for QCA9377Yu Wang1-1/+1
After system entering S5 (shut down but system still providing power to QCA9377) on Ubuntu platform, power consumption of QCA9377 is 69mA, which is too high. The root cause is pci_soft_reset is not set for QCA9377 during pci probe. To fix this issue, set 'pci_soft_reset' to 'th10k_pci_warm_reset', and then the power consumption drops to a normal value(10mA). Verified on Dell Ubuntu platform with firmware: WLAN.TF.1.0-00002-QCATFSWPZ-5 Signed-off-by: Yu Wang <yyuwang@codeaurora.org> Signed-off-by: Yu Wang <yyuwang@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2019-01-08cross-tree: phase out dma_zalloc_coherent()Luis Chamberlain1-2/+1
We already need to zero out memory for dma_alloc_coherent(), as such using dma_zalloc_coherent() is superflous. Phase it out. This change was generated with the following Coccinelle SmPL patch: @ replace_dma_zalloc_coherent @ expression dev, size, data, handle, flags; @@ -dma_zalloc_coherent(dev, size, handle, flags) +dma_alloc_coherent(dev, size, handle, flags) Suggested-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Luis Chamberlain <mcgrof@kernel.org> [hch: re-ran the script on the latest tree] Signed-off-by: Christoph Hellwig <hch@lst.de>
2018-10-13ath10k: allocate small size dma memory in ath10k_pci_diag_write_memCarl Huang1-12/+11
ath10k_pci_diag_write_mem may allocate big size of the dma memory based on the parameter nbytes. Take firmware diag download as example, the biggest size is about 500K. In some systems, the allocation is likely to fail because it can't acquire such a large contiguous dma memory. The fix is to allocate a small size dma memory. In the loop, driver copies the data to the allocated dma memory and writes to the destination until all the data is written. Tested with QCA6174 PCI with firmware-6.bin_WLAN.RM.4.4.1-00119-QCARMSWP-1, this also affects QCA9377 PCI. Signed-off-by: Carl Huang <cjhuang@codeaurora.org> Reviewed-by: Brian Norris <briannorris@chomium.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-09-06ath10k: add device type enum to ath10k_bus_paramsErik Stromdahl1-0/+1
Add dev_type parameter to struct ath10k_bus_params. The dev type specifies if the device is a high latency device (usb and sdio) or low latency device (pci, ahb and snoc) The setup of high latency chips is sometimes different than for chips using low latency interfaces. Signed-off-by: Erik Stromdahl <erik.stromdahl@gmail.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-09-06ath10k: add struct ath10k_bus_paramsErik Stromdahl1-6/+6
This struct is used as argument to ath10k_core_register in order to make it easier to add more bus parameters in the future. Signed-off-by: Erik Stromdahl <erik.stromdahl@gmail.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-09-06ath10k: support to access target space below 1M for qca6174 and qca9377Carl Huang1-2/+17
To download firmware via diag interface, driver needs to write the target memory space below 1M. It means the bit20 should be zero for the converted address if the target memory space is below 1M. Otherwise, bit20 is one if the target address is larger or equal to 1M space. As downloading firmware via diag interface is only required for qca6174 and qca9377, a new specific function is introduced to convert the target address to ce address: ath10k_pci_qca6174_targ_cpu_to_ce_addri(). This function supports to convert any target address to ce address. It's tested with QCA6174 hw3.2 and firmware-6.bin_WLAN.RM.4.4.1-00111-QCARMSWP-1. QCA9377 is also affected. Signed-off-by: Carl Huang <cjhuang@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-09-06ath10k: optimize pci diag mem read & write operationsCarl Huang1-18/+22
Delay 1ms is too long for both diag read and write operations. This is observed when writing a big memory buffer to target or reading a big memory buffer from target. Take writing/reading 512k bytes as example, the delay itself is 256ms as the maximum length of every write/read is 2k size. Reduce the delay to 50us for read and write operations. Take the ath10k_pci_targ_cpu_to_ce_addr() out of loop and put it in the beginning of the loop for ath10k_pci_diag_read_mem(). The ath10k_pci_targ_cpu_to_ce_addr() is to convert the address from target cpu's perspective to CE's perspective, so it makes no sense to convert a CE's perspective address again in the loop. It's a wrong implementation but happens to work. If the target address is below 1M space, then the convert in the loop from the second time becomes wrong because the previously converted address is larger than 1M. The counterpart ath10k_pci_diag_write_mem() has the correct implementation. With this change, ath10k_pci_diage_read_mem() works correctly no matter the target address is below 1M or above 1M. It's tested with QCA6174 hw3.2 and firmware-6.bin_WLAN.RM.4.4.1-00111-QCARMSWP-1. QCA9377 is also affected. Signed-off-by: Carl Huang <cjhuang@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-09-06ath10k: enable pktlog for WCN3990 targetGovind Singh1-1/+1
WCN3990 target uses separate htc service for pktlog. Add pktlog service request and support for pktlog rx path handling. Testing: Tested on WCN3990 and QCA6174 HW. Tested FW: WLAN.HL.2.0-01192-QCAHLSWMTPLZ-1, WLAN.RM.4.4.1-00109-QCARMSWPZ-1 Signed-off-by: Govind Singh <govinds@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-09-06ath10k: introduce CE_ATTR_POLL attribute for polling pipeGovind Singh1-1/+1
Existing copy engine interrupt enable logic assumes that last CE is using polling mode and due to this interrupt for last copy engine are always disabled. WCN3990 uses last CE for pktlog and interrupt remains disabled with existing logic. To mitigate this issue, introduce CE_ATTR_POLL flag and control the interrupt based on the flag which can be set in ce_attr. Testing: Tested on WCN3990 and QCA6174 HW. Tested FW: WLAN.HL.2.0-01192-QCAHLSWMTPLZ-1, WLAN.RM.4.4.1-00109-QCARMSWPZ-1 Signed-off-by: Govind Singh <govinds@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-08-24ath10k: fix kernel panic by moving pci flush after napi_disableTamizh chelvam1-1/+1
When continuously running wifi up/down sequence, the napi poll can be scheduled after the CE buffers being freed by ath10k_pci_flush Steps: In a certain condition, during wifi down below scenario might occur. ath10k_stop->ath10k_hif_stop->napi_schedule->ath10k_pci_flush->napi_poll(napi_synchronize). In the above scenario, CE buffer entries will be freed up and become NULL in ath10k_pci_flush. And the napi_poll has been invoked after the flush process and it will try to get the skb from the CE buffer entry and perform some action on that. Since the CE buffer already cleaned by pci flush this action will create NULL pointer dereference and trigger below kernel panic. Unable to handle kernel NULL pointer dereference at virtual address 0000005c PC is at ath10k_pci_htt_rx_cb+0x64/0x3ec [ath10k_pci] ath10k_pci_htt_rx_cb [ath10k_pci] ath10k_ce_per_engine_service+0x74/0xc4 [ath10k_pci] ath10k_ce_per_engine_service [ath10k_pci] ath10k_ce_per_engine_service_any+0x74/0x80 [ath10k_pci] ath10k_ce_per_engine_service_any [ath10k_pci] ath10k_pci_napi_poll+0x48/0xec [ath10k_pci] ath10k_pci_napi_poll [ath10k_pci] net_rx_action+0xac/0x160 net_rx_action __do_softirq+0xdc/0x208 __do_softirq irq_exit+0x84/0xe0 irq_exit __handle_domain_irq+0x80/0xa0 __handle_domain_irq gic_handle_irq+0x38/0x5c gic_handle_irq __irq_usr+0x44/0x60 Tested on QCA4019 and firmware version 10.4.3.2.1.1-00010 Signed-off-by: Tamizh chelvam <tamizhr@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-04-19ath10k: modify hif tx paddr to dma_addr_t typeGovind Singh1-4/+4
Change type of hif sg tx paddr to dma_addr_t for supporting target having addressing mode greater than 32 bit. Signed-off-by: Govind Singh <govinds@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-03-29ath10k: add memory dump support QCA9984Anilkumar Kolli1-0/+43
QCA9984/QCA99X0/QCA4019 chipsets have 8 memory regions, dump all of them to the firmware coredump file. Some of the regions need to be read using ioread() so add new region types for them. Signed-off-by: Anilkumar Kolli <akolli@codeaurora.org> [kvalo: refactoring etc] Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-03-29ath10k: refactor ath10k_pci_dump_memory() in preparation for QCA9984 supportKalle Valo1-19/+36
As QCA9984 needs two region types refactor the code to make it easier add the new types. No functional changes. Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-03-29ath10k: add FW API 6 firmware image for QCA9377Ryan Hsu1-0/+1
Firmware WLAN.TF.2.1-00014-QCARMSWP-1 now supports reading the board ID information and also required 9 IRAM bank, which older ath10k version don't have the support will fail to be enabled, so in order to maintain the backward compatibility, we need to update the FW API to 6. Signed-off-by: Ryan Hsu <ryanhsu@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-02-27ath10k: update the IRAM bank number for QCA9377Ryan Hsu1-1/+1
Preparation for a new QCA9377 firmware release. The new firmware release requires more IRAM banks, hence update that on ath10k. The IRAM banks promotion won't break any backwards compatibility, as those IRAM banks were not getting used in previous firmware releases. Signed-off-by: Ryan Hsu <ryanhsu@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-02-07ath10k: add support for Ubiquiti rebranded QCA988X v2Tobias Schramm1-0/+6
Some modern Ubiquiti devices contain a rebranded QCA988X rev2 with a custom Ubiquiti vendor and device id. This patch adds support for those devices, treating them as a QCA988X v2. Signed-off-by: Tobias Schramm <tobleminer@gmail.com> [kvalo@codeaurora.org: rebase, add missing fields in hw_params, fix a long line in pci.c:61] Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-01-16ath10k: remove redundant -ve check against u32 integer sizeColin Ian King1-3/+0
Variable section_table.size is a u32 and so cannot be less than zero, hence the less than zero check is redundant and can be removed. Detected by CoverityScan, CID#1463855 ("Unsigned compared against 0") Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-01-16ath10k: fix spelling mistake: "addrress" -> "address"Colin Ian King1-1/+1
Trivial fix to spelling mistake in warning message text. Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2017-12-27ath10k: update copyright yearKalle Valo1-1/+1
Update year for Qualcomm Atheros, Inc. copyrights. Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-12-27ath10k: add memory dump support for QCA6174/QCA9377Alan Liu1-0/+218
Add memory dump to the firmware crash data file which is provided to user space via devcoredump interface. This makes it easier for firmware engineers to debug firmware crashes. Due to increased memory consumption the memory dump is disabled by default. To enable it make sure that bit 3 is set in coredump_mask module parameter: modprobe ath10k_core coredump_mask=0xffffffff When RAMDUMP is enabled a buffer for the dump is allocated with vmalloc during device probe. The actual memory layout is different in hardware versions and the layouts are defined in coredump.c. The memory is split to regions and, to get even finegrained control of what to copy, the region can split to smaller sections as not all registers are readable (which could cause the whole system to stall). Signed-off-by: Alan Liu <alanliu@qca.qualcomm.com> [kvalo@qca.qualcomm.com: refactoring and cleanup] Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-12-27ath10k: refactor firmware crashdump code to coredump.cKalle Valo1-1/+2
In preparation to add RAM dump support. No functional changes, only moving code and renaming function names. Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-12-27ath10k: Add support for 64 bit ce descriptorGovind Singh1-3/+3
WCN3990 CE descriptor uses 64bit address for src/dst ring buffer. It has extended field for toeplitz hash result, which is being used for HW assisted hash results. To accommodate WCN3990 descriptor, define new CE descriptor for extended addressing mode and related methods to handle the descriptor data. Signed-off-by: Govind Singh <govinds@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-12-27ath10k: Use dma_addr_t for ce buffers to support 64bit targetGovind Singh1-2/+2
CE send and receive API's are using u32 ring address, which truncates the address for target with 64bit addressing range. Use dma_addr_t for ce buffers to support target with extended addressing range. Signed-off-by: Govind Singh <govinds@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-10-27ath: Convert timers to use timer_setup()Kees Cook1-9/+8
In preparation for unconditionally passing the struct timer_list pointer to all timer callbacks, switch to using the new timer_setup() and from_timer() to pass the timer pointer explicitly. Cc: Kalle Valo <kvalo@qca.qualcomm.com> Cc: linux-wireless@vger.kernel.org Cc: netdev@vger.kernel.org Signed-off-by: Kees Cook <keescook@chromium.org> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-10-27ath10k: fix build errors with !CONFIG_PMBrian Norris1-5/+0
Build errors have been reported with CONFIG_PM=n: drivers/net/wireless/ath/ath10k/pci.c:3416:8: error: implicit declaration of function 'ath10k_pci_suspend' [-Werror=implicit-function-declaration] drivers/net/wireless/ath/ath10k/pci.c:3428:8: error: implicit declaration of function 'ath10k_pci_resume' [-Werror=implicit-function-declaration] These are caused by the combination of the following two commits: 6af1de2e4ec4 ("ath10k: mark PM functions as __maybe_unused") 96378bd2c6cd ("ath10k: fix core PCI suspend when WoWLAN is supported but disabled") Both build fine on their own. But now that ath10k_pci_pm_{suspend,resume}() is compiled unconditionally, we should also compile ath10k_pci_{suspend,resume}() unconditionally. And drop the #ifdef around ath10k_pci_hif_{suspend,resume}() too; they are trivial (empty), so we're not saving much space by compiling them out. And the alternatives would be to sprinkle more __maybe_unused, or spread the #ifdef's further. Build tested with the following combinations: CONFIG_PM=y && CONFIG_PM_SLEEP=y CONFIG_PM=y && CONFIG_PM_SLEEP=n CONFIG_PM=n Fixes: 96378bd2c6cd ("ath10k: fix core PCI suspend when WoWLAN is supported but disabled") Fixes: 096ad2a15fd8 ("Merge branch 'ath-next'") Signed-off-by: Brian Norris <briannorris@chromium.org> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-10-27Merge ath-next from git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.gitKalle Valo1-10/+14
ath.git patches for 4.15. Major changes: ath10k * add support for CCMP-256, GCMP and GCMP-256 ciphers on hardware there it's supported (QCA99x0 and QCA4019)
2017-10-13ath10k: fix core PCI suspend when WoWLAN is supported but disabledBrian Norris1-10/+14
For devices where the FW supports WoWLAN but user-space has not configured it, we don't do any PCI-specific suspend/resume operations, because mac80211 doesn't call drv_suspend() when !wowlan. This has particularly bad effects for some platforms, because we don't stop the power-save timer, and if this timer goes off after the PCI controller has suspended the link, Bad Things will happen. Commit 32faa3f0ee50 ("ath10k: add the PCI PM core suspend/resume ops") got some of this right, in that it understood there was a problem on non-WoWLAN firmware. But it forgot the $subject case. Fix this by moving all the PCI driver suspend/resume logic exclusively into the driver PM hooks. This shouldn't affect WoWLAN support much (this just gets executed later on). I would just as well kill the entirety of ath10k_hif_suspend(), as it's not even implemented on the USB or SDIO drivers. I expect that we don't need the callback, except to return "supported" (i.e., 0) or "not supported" (i.e., -EOPNOTSUPP). Fixes: 32faa3f0ee50 ("ath10k: add the PCI PM core suspend/resume ops") Fixes: 77258d409ce4 ("ath10k: enable pci soc powersaving") Signed-off-by: Brian Norris <briannorris@chromium.org> Cc: Ryan Hsu <ryanhsu@qti.qualcomm.com> Cc: Kalle Valo <kvalo@qca.qualcomm.com> Cc: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-09-21ath10k: mark PM functions as __maybe_unusedArnd Bergmann1-5/+2
When CONFIG_PM_SLEEP is disabled, we get a compile-time warning: drivers/net/wireless/ath/ath10k/pci.c:3417:12: error: 'ath10k_pci_pm_resume' defined but not used [-Werror=unused-function] static int ath10k_pci_pm_resume(struct device *dev) ^~~~~~~~~~~~~~~~~~~~ drivers/net/wireless/ath/ath10k/pci.c:3401:12: error: 'ath10k_pci_pm_suspend' defined but not used [-Werror=unused-function] static int ath10k_pci_pm_suspend(struct device *dev) Rather than fixing the #ifdef, this just marks both functions as __maybe_unused, which is a more robust way to do this. Fixes: 32faa3f0ee50 ("ath10k: add the PCI PM core suspend/resume ops") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-08-31ath10k: add the PCI PM core suspend/resume opsRyan Hsu1-0/+42
The actual PCI suspend/resume in ath10k has been handled in wow.c, but in the case of the device doesn't support remote wakeup, the .hif_suspend() and .hif_resume() will never be handled. ath10k_wow_op_suspend() { if (WARN_ON(!test_bit(ATH10K_FW_FEATURE_WOWLAN_SUPPORT, ar->running_fw->fw_file.fw_features))) { ret = 1; goto exit; } .... ret = ath10k_hif_suspend(ar); } So register the PCI PM core to support the suspend/resume if the device doesn't support remote wakeup. Signed-off-by: Ryan Hsu <ryanhsu@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-08-08ath10k: switch to use new generic UUID APIAndy Shevchenko1-4/+4
There are new types and helpers that are supposed to be used in new code. As a preparation to get rid of legacy types and API functions do the conversion here. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-07-06ath10k: add copy engine register MAP for wcn3990 targetGovind Singh1-0/+4
Copy engine is a host to target communication interface between wlan firmware and wlan wcn3990 platform driver. Add copy engine register map for wcn3990 wlan module. This add support for the copy engine source/destination ring configuration for wcn3990 chipset. Signed-off-by: Govind Singh <govinds@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-07-06ath10k: make CE layer bus agnosticGovind Singh1-22/+29
Remove bus specific dependencies from CE layer to have common CE layer across multiple targets. This is required for adding support for WCN3990 chipset support as WCN3990 chipset uses SNOC bus interface with Copy Engine endpoint. Signed-off-by: Govind Singh <govinds@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-06-28ath10k: fix a bunch of spelling mistakes in messagesColin Ian King1-1/+1
Fix the following spelling mistakes in messages: syncronise -> synchronize unusally -> unusually addrress -> address inverval -> interval Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-06-01ath10k: log when longer bmi cmds happenBen Greear1-6/+21
This lets one have a clue that maybe timeouts are happening when we just aren't waiting long enough. Signed-off-by: Ben Greear <greearb@candelatech.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-04-19ath10k: bump up FW API to 6Ryan Hsu1-0/+1
For QCA6174 hw3.0, since WLAN.RM.4.4-00022-QCARMSWPZ-2, it starts to support the board ID information from otp, with some devices released on the market that didn't calibrated with OTP, will have 0 for board ID information, which cause the backward compatibility issue and was fixed in commit 'd2e202c06ca4 ("ath10k: ignore configuring the incorrect board_id")' So bump the fw api version to differentiate the latest firmware support. Signed-off-by: Ryan Hsu <ryanhsu@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-04-05ath10k: fix block comments styleMarcin Rokicki1-4/+8
Fix output from checkpatch.pl like: Block comments use a trailing */ on a separate lin Signed-off-by: Marcin Rokicki <marcin.rokicki@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-03-16ath10k: remove redundant error checkColin Ian King1-6/+0
The check on ret for an error is redundant because it is already been checked for non-zero earlier on and ret is never non-zero at this point. Fix this by removing the redundant check and error message. Detected by CoverityScan, CID#1357170 ("Logically Dead Code") Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-02-14ath10k: fix napi crash during rmmod when probe firmware failsKalle Valo1-1/+2
This fixes the below crash when ath10k probe firmware fails, NAPI polling tries to access a rx ring resource which was never allocated. An easy way to reproduce this is easy to remove all the firmware files, load ath10k modules and ath10k will crash when calling 'rmmod ath10k_pci'. The fix is to call napi_enable() from ath10k_pci_hif_start() so that it matches with napi_disable() being called from ath10k_pci_hif_stop(). Big thanks to Mohammed Shafi Shajakhan who debugged this and provided first version of the fix. In this patch I just fix the actual problem in pci.c instead of having a workaround in core.c. BUG: unable to handle kernel NULL pointer dereference at (null) IP: __ath10k_htt_rx_ring_fill_n+0x19/0x230 [ath10k_core] __ath10k_htt_rx_ring_fill_n+0x19/0x230 [ath10k_core] Call Trace: [<ffffffffa113ec62>] ath10k_htt_rx_msdu_buff_replenish+0x42/0x90 [ath10k_core] [<ffffffffa113f393>] ath10k_htt_txrx_compl_task+0x433/0x17d0 [ath10k_core] [<ffffffff8114406d>] ? __wake_up_common+0x4d/0x80 [<ffffffff811349ec>] ? cpu_load_update+0xdc/0x150 [<ffffffffa119301d>] ? ath10k_pci_read32+0xd/0x10 [ath10k_pci] [<ffffffffa1195b17>] ath10k_pci_napi_poll+0x47/0x110 [ath10k_pci] [<ffffffff817863af>] net_rx_action+0x20f/0x370 Reported-by: Ben Greear <greearb@candelatech.com> Fixes: 3c97f5de1f28 ("ath10k: implement NAPI support") Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-02-07ath10k: fix reading sram contents for QCA4019Ashok Raj Nagarajan1-19/+32
With QCA4019 platform, SRAM address can be accessed directly from host but currently, we are assuming sram addresses cannot be accessed directly and hence we convert the addresses. While there, clean up growing hw checks during conversion of target CPU address to CE address. Now we have function pointer pertaining to different chips. Signed-off-by: Ashok Raj Nagarajan <arnagara@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-02-07ath10k: few whitespace fixesKalle Valo1-1/+1
Fixes checkpatch warnings: drivers/net/wireless/ath/ath10k/pci.c:1593: Statements should start on a tabstop drivers/net/wireless/ath/ath10k/ce.c:962: Alignment should match open parenthesis Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-02-01Merge tag 'wireless-drivers-next-for-davem-2017-02-01' of ↵David S. Miller1-3/+3
git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers-next Kalle Valo says: ==================== wireless-drivers-next patches for 4.11 It's nice to see rt2x00 development has becoming active, for example adding support for a new chip version. Also wcn36xx has been converted to use the recently merged QCOM_SMD subsystem. Otherwise new features and fixes it lots of drivers. Major changes: iwlwifi * some more work in preparation for A000 family support * add support for radiotap timestamps * some work on our firmware debugging capabilities wcn36xx * convert to a proper QCOM_SMD driver (from the platform_driver interface) ath10k * VHT160 support * dump Copy Engine registers during firmware crash * search board file extension from SMBIOS wil6210 * add disable_ap_sme module parameter rt2x00 * support RT3352 with external PA * support for RT3352 with 20MHz crystal * add support for RT5350 WiSoC brcmfmac * add support for BCM43455 sdio device rtl8xxxu * add support for D-Link DWA-131 rev E1, TP-Link TL-WN822N v4 and others ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2017-01-30drivers: net: generalize napi_complete_done()Eric Dumazet1-1/+1
napi_complete_done() allows to opt-in for gro_flush_timeout, added back in linux-3.19, commit 3b47d30396ba ("net: gro: add a per device gro flush timer") This allows for more efficient GRO aggregation without sacrifying latencies. Signed-off-by: Eric Dumazet <edumazet@google.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-01-27ath10k: fix typo in addr calculationSrinivas Kandagatla1-1/+1
CORE_CTRL_ADDRESS is offset in register address space, it does not make sense to OR it to derive the final address. It looks like its a typo, so fix it. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-01-27ath10k: use dma_zalloc_coherent()Srinivas Kandagatla1-2/+1
use dma_zalloc_coherent() instead of dma_alloc_coherent and memset(). Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>