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path: root/drivers/net/wireless/ath/ath10k/ce.h
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2018-01-16ath10k: fix recently introduced checkpatch warningsKalle Valo1-0/+1
Checkpatch found these issues: drivers/net/wireless/ath/ath10k/ce.h:324: Please use a blank line after function/struct/union/enum declarations drivers/net/wireless/ath/ath10k/core.c:1321: Please don't use multiple blank lines drivers/net/wireless/ath/ath10k/htt.h:1859: Please use a blank line after function/struct/union/enum declarations Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2017-12-27ath10k: update copyright yearKalle Valo1-1/+1
Update year for Qualcomm Atheros, Inc. copyrights. Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-12-27ath10k: Add support for 64 bit ce descriptorGovind Singh1-2/+46
WCN3990 CE descriptor uses 64bit address for src/dst ring buffer. It has extended field for toeplitz hash result, which is being used for HW assisted hash results. To accommodate WCN3990 descriptor, define new CE descriptor for extended addressing mode and related methods to handle the descriptor data. Signed-off-by: Govind Singh <govinds@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-12-27ath10k: Use dma_addr_t for ce buffers to support 64bit targetGovind Singh1-6/+8
CE send and receive API's are using u32 ring address, which truncates the address for target with 64bit addressing range. Use dma_addr_t for ce buffers to support target with extended addressing range. Signed-off-by: Govind Singh <govinds@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-07-06ath10k: make CE layer bus agnosticGovind Singh1-4/+26
Remove bus specific dependencies from CE layer to have common CE layer across multiple targets. This is required for adding support for WCN3990 chipset support as WCN3990 chipset uses SNOC bus interface with Copy Engine endpoint. Signed-off-by: Govind Singh <govinds@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-06-16ath10k: define structures for CE ctrl/misc registerSarada Prasanna Garnayak1-132/+0
Define structures for the copy engine ctrl/misc registers, that includes CE CMD halt, watermark source, watermark destination, host IE ring, source, destination and dmax ring. This adds support to avoid the conditional compilation, code optimization and dynamic configuration of the copy engine register map for respective hardware bus interface. Signed-off-by: Sarada Prasanna Garnayak <c_sgarna@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-01-19ath10k: dump Copy Engine registers during firmware crashMohammed Shafi Shajakhan1-2/+2
Dump Copy Engine source and destination ring addresses. This is useful information to debug firmware crashes, assertes or hangs over long run assessing the Copy Engine Register status. This also enables dumping CE register status in debugfs Crash Dump file. Screenshot: ath10k_pci 0000:02:00.0: simulating hard firmware crash ath10k_pci 0000:02:00.0: firmware crashed! (uuid 84901ff5-d33c-456e-93ee-0165dea643cf) ath10k_pci 0000:02:00.0: qca988x hw2.0 target 0x4100016c chip_id 0x043202ff sub 0000:0000 ath10k_pci 0000:02:00.0: kconfig debug 1 debugfs 1 tracing 1 dfs 1 testmode 1 ath10k_pci 0000:02:00.0: firmware ver 10.2.4.70.59-2 api 5 features no-p2p,raw-mode,mfp,allows-mesh-bcast crc32 4159f498 ath10k_pci 0000:02:00.0: board_file api 1 bmi_id N/A crc32 bebc7c08 ath10k_pci 0000:02:00.0: htt-ver 2.1 wmi-op 5 htt-op 2 cal otp max-sta 128 raw 0 hwcrypto 1 ath10k_pci 0000:02:00.0: firmware register dump: ath10k_pci 0000:02:00.0: [00]: 0x4100016C 0x00000000 0x009A0F2A 0x00000000 ath10k_pci 0000:02:00.0: [04]: 0x00000000 0x00000000 0x00000000 0x00000000 ath10k_pci 0000:02:00.0: [08]: 0x00000000 0x00000000 0x00000000 0x00000000 ath10k_pci 0000:02:00.0: [12]: 0x00000000 0x00000000 0x00000000 0x00000000 ath10k_pci 0000:02:00.0: [16]: 0x00000000 0x00000000 0x00000000 0x009A0F2A ath10k_pci 0000:02:00.0: [20]: 0x00000000 0x00401930 0x00000000 0x00000000 ath10k_pci 0000:02:00.0: [24]: 0x00000000 0x00000000 0x00000000 0x00000000 ath10k_pci 0000:02:00.0: [28]: 0x00000000 0x00000000 0x00000000 0x00000000 ath10k_pci 0000:02:00.0: [32]: 0x00000000 0x00000000 0x00000000 0x00000000 ath10k_pci 0000:02:00.0: [36]: 0x00000000 0x00000000 0x00000000 0x00000000 ath10k_pci 0000:02:00.0: [40]: 0x00000000 0x00000000 0x00000000 0x00000000 ath10k_pci 0000:02:00.0: [44]: 0x00000000 0x00000000 0x00000000 0x00000000 ath10k_pci 0000:02:00.0: [48]: 0x00000000 0x00000000 0x00000000 0x00000000 ath10k_pci 0000:02:00.0: [52]: 0x00000000 0x00000000 0x00000000 0x00000000 ath10k_pci 0000:02:00.0: [56]: 0x00000000 0x00000000 0x00000000 0x00000000 ath10k_pci 0000:02:00.0: Copy Engine register dump: ath10k_pci 0000:02:00.0: [00]: 0x00057400 7 7 3 3 ath10k_pci 0000:02:00.0: [01]: 0x00057800 18 18 85 86 ath10k_pci 0000:02:00.0: [02]: 0x00057c00 49 49 48 49 ath10k_pci 0000:02:00.0: [03]: 0x00058000 16 16 17 16 ath10k_pci 0000:02:00.0: [04]: 0x00058400 4 4 44 4 ath10k_pci 0000:02:00.0: [05]: 0x00058800 12 12 11 12 ath10k_pci 0000:02:00.0: [06]: 0x00058c00 3 3 3 3 ath10k_pci 0000:02:00.0: [07]: 0x00059000 0 0 0 0 ieee80211 phy0: Hardware restart was requested ath10k_pci 0000:02:00.0: device successfully recovered Signed-off-by: Mohammed Shafi Shajakhan <mohammed@qti.qualcomm.com> [kvalo@qca.qualcomm.com: simplify the implementation] Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2016-04-14ath10k: fix checkpatch warnings related to spacesKalle Valo1-1/+1
Fix checkpatch warnings about use of spaces with operators: spaces preferred around that '*' (ctx:VxV) This has been recently added to checkpatch. Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2016-04-04ath10k: reuse copy engine 5 (htt rx) descriptorsRajkumar Manoharan1-0/+3
Whenever htt rx indication i.e target to host messages are received on rx copy engine (CE5), the message will be freed after processing the response. Then CE 5 will be refilled with new descriptors at post rx processing. This memory alloc and free operations can be avoided by reusing the same descriptors. During CE pipe allocation, full ring is not initialized i.e n-1 entries are filled up. So for CE 5 full ring should be filled up to reuse descriptors. Moreover CE 5 write index will be updated in single shot instead of incremental access. This could avoid multiple pci_write and ce_ring access. From experiments, It improves CPU usage by ~3% in IPQ4019 platform. Signed-off-by: Rajkumar Manoharan <rmanohar@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2016-04-04ath10k: cleanup copy engine receive next completionRajkumar Manoharan1-8/+2
The physical address necessary to unmap DMA ('bufferp') is stored in ath10k_skb_cb as 'paddr'. For diag register read and write operations, 'paddr' is stored in transfer context. ath10k doesn't rely on the meta/transfer_id. So the unused output arguments {bufferp, nbytesp and transfer_idp} are removed from CE recv_next completion. Signed-off-by: Rajkumar Manoharan <rmanohar@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2016-03-06ath10k: fix HTT Tx CE ring sizeMichal Kazior1-1/+1
QCA4019 can queue up to 2500 frames at a time. This means it requires roughly 5000 entires on the ring to work properly. Otherwise random tx failure may occur. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2015-10-29ath10k: remove shadow copy of CE descriptors for source ringRajkumar Manoharan1-6/+0
For the messages from host to target, shadow copy of CE descriptors are maintained in source ring. Before writing actual CE descriptor, first shadow copy is filled and then it is copied to CE address space. To optimize in download path and to reduce d-cache pressure, removing shadow copy of CE descriptors. This will also reduce driver memory consumption by 33KB during on device probing. Signed-off-by: Rajkumar Manoharan <rmanohar@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2015-10-29ath10k: cleanup copy engine send completionRajkumar Manoharan1-8/+2
The physical address necessary to unmap DMA ('bufferp') is stored in ath10k_skb_cb as 'paddr'. ath10k doesn't rely on the meta/transfer_id when handling send completion (htc ep id is stored in sk_buff control buffer). So the unused output arguments {bufferp, nbytesp and transfer_idp} are removed from CE send completion. This change is needed before removing the shadow copy of copy engine (CE) descriptors in follow up patch. Signed-off-by: Rajkumar Manoharan <rmanohar@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2015-10-16ath10k: register per copy engine receive callbacksRajkumar Manoharan1-2/+2
Register receive callbacks for every copy engines (CE) separately instead of having common receive handler. Some of the copy engines receives different type of messages (i.e HTT/HTC/pktlog) from target. Hence to service them accordingly, register per copy engine receive callbacks. Reviewed-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Rajkumar Manoharan <rmanohar@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2015-10-16ath10k: register per copy engine send completion callbacksRajkumar Manoharan1-1/+2
Register send completion callbacks for every copy engines (CE) separately instead of having common completion handler. Since some of the copy engines delivers different type of messages, per-CE callbacks help to service them differently. Reviewed-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Rajkumar Manoharan <rmanohar@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2015-06-30ath10k: Extend CE src desc flags for interrupt indicationVasanthakumar Thiagarajan1-2/+7
QCA99X0 uses two new copy engine src desc flags for interrupt indication. Bit_2 is to mark if host interrupt is disabled after processing the current desc and bit_3 is to mark if target interrupt is diabled after the processing of current descriptor. CE_DESC_FLAGS_META_DATA_MASK and CE_DESC_FLAGS_META_DATA_LSB are based on the target type. Signed-off-by: Vasanthakumar Thiagarajan <vthiagar@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2015-06-30ath10k: Copy Engine related changes for QCA99X0Vasanthakumar Thiagarajan1-1/+1
QCA99X0 supports upto 12 Copy engines. Host and target CE configuration table is updated to support new copy engine pipes. This also fixes the assumption of diagnostic CE by making CE_7 as the one instead of CE_COUNT - 1. Signed-off-by: Vasanthakumar Thiagarajan <vthiagar@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2015-06-30ath10k: Add new reg_address/mask to hw register tableVasanthakumar Thiagarajan1-2/+4
Add more register address and mask which can be different for newer chip to hw_reg table. Signed-off-by: Vasanthakumar Thiagarajan <vthiagar@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2015-02-15ath10k: fix CE_DESC_FLAGS_META_DATA_LSB definitionBen Greear1-1/+1
The value was off by one. The error probably has no negative affect on any upstream firmware, but should be fixed anyway in case it comes into use in the future. Signed-off-by: Ben Greear <greearb@candelatech.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2015-01-27ath10k: add support for qca6174Michal Kazior1-1/+1
The QCA6174 in combination with new wmi-tlv firmware is capable of multi-channel, beamforming, tdls and other features. This patch just makes it possible to boot these devices and do some basic stuff like connect to an AP without encryption. Some things may not work or may be unreliable. New features will be implemented later. This will be addressed eventually with future patches. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2014-10-23ath10k: split ce pipe init/alloc furtherMichal Kazior1-4/+4
Calling init to reinit ce pipe state would also re-set all static structure links and setting (which don't change over driver lifecycle). Make it so alloc links structures and initializes static data and init part to setup state variables and clear stuff. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2014-09-26ath10k: add diag_read() to hif opsKalle Valo1-0/+13
diag_read() is used for reading from firmware memory via the diagnose window. First user will be cal_data debugfs file. To serialise diagnostic window access and make it safe to use while firmware is running take ce_lock both in ath10k_pci_diag_write_mem() and ath10k_pci_diag_read_mem(). Because of that all the CE calls had to be changed to _nolock variants. Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2014-09-18ath10k: fix use of multiple blank linesKalle Valo1-3/+0
Fixes checkpatch warnings: CHECK: Please don't use multiple blank lines Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2014-09-18ath10k: fix checkpatch warnings about parenthesis alignmentKalle Valo1-5/+5
CHECK: Alignment should match open parenthesis Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2014-08-25ath10k: rework posting pci rx buffersMichal Kazior1-13/+3
It was possible on a host system running low on memory to end up with no rx buffers on pci pipes. This makes the driver more robust as it won't fail to start if it can't allocate all rx buffers right away. If it is fatal then upper layers will notice trouble anyway. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2014-08-25ath10k: split ce irq/handler setupMichal Kazior1-8/+4
It doesn't make much sense to overwrite send_cb and recv_cb callbacks over and over again whenever transport starts. Just make sure to unmask copy engine interrupts when starting. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2014-05-27ath10k: abort incomplete scatter-gather pci tx properlyMichal Kazior1-0/+2
This prevents leaving incomplete scatter-gather transfer on CE rings which can lead firmware to crash. Reported-By: Avery Pennarun <apenwarr@gmail.com> Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2014-03-28ath10k: split ce initialization and allocationMichal Kazior1-7/+8
Definitions by which copy engine structure are allocated do not change so it doesn't make much sense to re-create those structures each time device is booted (e.g. due to firmware recovery). This should decrease chance of memory allocation failures. While at it remove per_transfer_context pointer indirection. The array has been trailing the copy engine ringbuffer structure anyway. This also saves pointer size worth of bytes for each copy engine ringbuffer. Reported-By: Avery Pennarun <apenwarr@gmail.com> Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2014-02-28ath10k: bypass htc for htt tx pathMichal Kazior1-1/+1
Going through full htc tx path for htt tx is a waste of resources. By skipping it it's possible to easily submit scatter-gather to the pci hif for reduced host cpu load and improved performance. The new approach uses dma pool to store the following metadata for each tx request: * msdu fragment list * htc header * htt tx command The htt tx command contains a msdu prefetch. Instead of copying it original mapped msdu address is used to submit a second scatter-gather item to hif to make a complete htt tx command. The htt tx command itself hands over dma mapped pointers to msdus and completion of the command itself doesn't mean the frame has been sent and can be unmapped/freed. This is why htc tx completion is skipped for htt tx as all tx related resources are freed upon htt tx completion indication event (which also implicitly means htt tx command itself was completed). Since now each htt tx request effectively consists of 2 copy engine items CE_HTT_H2T_MSG_SRC_NENTRIES is updated to allow maximum of TARGET_10X_NUM_MSDU_DESC msdus being queued. This keeps the tx path resource management simple. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2014-02-28ath10k: replace send_head() with tx_sg()Michal Kazior1-0/+7
PCI is capable of handling scatter-gather lists. This can be used to avoid copying memory. Change the name of the callback while at to reflect its purpose. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2013-11-27ath10k: defer irq registration until hif start()Michal Kazior1-1/+0
It's impossible to rely on disable_irq() and/or CE interrupt masking with legacy shared interrupts. Other devices sharing the same irq line may assert it while ath10k is doing something that requires no interrupts. Irq handlers are now registered after all preparations are complete so spurious/foreign interrupts won't do any harm. The handlers are unregistered when no interrupts are required (i.e. during driver teardown). This also removes the ability to receive FW early indication (since interrupts are not registered until early boot is complete). This is not mission critical (it's more of a hint that early boot failed due to unexpected FW crash) and will be re-added in a follow up patch. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2013-11-12ath10k: re-arrange PCI init codeMichal Kazior1-0/+1
This patch moves irq registering after necessary structures have been allocated and initialized. This should prevent interrupts from causing tasklet access invalid memory pointers. Reported-By: Ben Greear <greearb@candelatech.com> Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2013-11-12ath10k: propagate ath10k_ce_disable_interrupts() errorsMichal Kazior1-1/+1
This shouldn't be silenced. This will be necessary for PCI init code reordering. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2013-10-07ath10k: remove num_sends_allowedMichal Kazior1-0/+1
The value provided by num_sends_allowed is now derived from CE source ringbuffer state. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2013-10-07ath10k: remove ce_sendlist_sendMichal Kazior1-15/+0
It is completely pointless to keep this function around. It doesn't do anything different than ce_send except it introduces more overhead. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2013-09-12ath10k: delete struct ce_sendlistKalle Valo1-40/+4
struct ce_sendlist is useless as we always add just one buffer onto it. And most importantly, it's ugly as it doesn't use skb properly. Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2013-09-08ath10k: prevent CE from looping indefinitelyMichal Kazior1-22/+4
The double while() could end up running forever. Inner while() would complete very fast. However the completion processing could take enough time for more completions to flow in. In that case the outer while() would not terminate and run again, and again. This could happen especially on a slow host system. This could lead to a system freeze during heavy traffic. Note: this doesn't solve all known starvation issues yet. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2013-09-01ath10k: rename ce_ring_state to ath10k_ce_ringMichal Kazior1-4/+3
The new naming makes more sense. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2013-09-01ath10k: rename ce_state to ath10k_ce_pipeMichal Kazior1-27/+26
The new naming makes more sense. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2013-09-01ath10k: remove unused ce_attr parametersMichal Kazior1-6/+0
Some parameters were unused and are not required. They have no representation in firmware. Clean them up. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2013-09-01ath10k: remove ce_op_stateMichal Kazior1-8/+0
It was only written to and never read back. No use to keep it around. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2013-06-12ath10k: mac80211 driver for Qualcomm Atheros 802.11ac CQA98xx devicesKalle Valo1-0/+516
Here's a new mac80211 driver for Qualcomm Atheros 802.11ac QCA98xx devices. A major difference from ath9k is that there's now a firmware and that's why we had to implement a new driver. The wiki page for the driver is: http://wireless.kernel.org/en/users/Drivers/ath10k The driver has had many authors, they are listed here alphabetically: Bartosz Markowski <bartosz.markowski@tieto.com> Janusz Dziedzic <janusz.dziedzic@tieto.com> Kalle Valo <kvalo@qca.qualcomm.com> Marek Kwaczynski <marek.kwaczynski@tieto.com> Marek Puzyniak <marek.puzyniak@tieto.com> Michal Kazior <michal.kazior@tieto.com> Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>