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path: root/drivers/net/phy/marvell.c
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2021-08-16net: phy: marvell: Add WAKE_PHY support to WOL eventSong Yoong Siang1-3/+36
Add Wake-on-PHY feature support by enabling the Link Up Event. Signed-off-by: Song Yoong Siang <yoong.siang.song@intel.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-08-13net: phy: marvell: add SFP support for 88E1510Ivan Bornyakov1-1/+104
Add support for SFP cages connected to the Marvell 88E1512 transceiver. 88E1512 supports for SGMII/1000Base-X/100Base-FX media type with RGMII on system interface. Configure PHY to appropriate mode depending on the type of SFP inserted. On SFP removal configure PHY to the RGMII-copper mode so RJ-45 port can still work. Signed-off-by: Ivan Bornyakov <i.bornyakov@metrotek.ru> Link: https://lore.kernel.org/r/20210812134256.2436-1-i.bornyakov@metrotek.ru Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-06-16net: phy: replace if-else statements with switchWeihang Li1-4/+9
Switch statement is clearer than a group of 'if-else'. Signed-off-by: Weihang Li <liweihang@huawei.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-06-03net: phy: marvell: use phy_modify_changed() for marvell_set_polarity()Russell King1-21/+6
Rather than open-coding the phy_modify_changed() sequence, use this helper in marvell_set_polarity(). Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Marek Behún <kabel@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-04-30net: phy: marvell: enable downshift by defaultMaxim Kochetkov1-12/+50
A number of PHYs support the PHY tunable to set and get downshift. However, only 88E1116R enables downshift by default. Extend this default enabled to all the PHYs that support the downshift tunable. Signed-off-by: Maxim Kochetkov <fido_max@inbox.ru> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-04-28net: phy: marvell: add downshift support for M88E1240Maxim Kochetkov1-0/+2
Add downshift support for 88E1240, it uses the same downshift configuration registers as 88E1011. Signed-off-by: Maxim Kochetkov <fido_max@inbox.ru> Link: https://lore.kernel.org/r/20210428095356.621536-1-fido_max@inbox.ru Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-04-26Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netDavid S. Miller1-20/+32
2021-04-22net: phy: marvell: fix m88e1111_set_downshiftMaxim Kochetkov1-10/+16
Changing downshift params without software reset has no effect, so call genphy_soft_reset() after change downshift params. As the datasheet says: Changes to these bits are disruptive to the normal operation therefore, any changes to these registers must be followed by software reset to take effect. Fixes: 5c6bc5199b5d ("net: phy: marvell: add downshift support for M88E1111") Signed-off-by: Maxim Kochetkov <fido_max@inbox.ru> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-04-22net: phy: marvell: fix m88e1011_set_downshiftMaxim Kochetkov1-10/+16
Changing downshift params without software reset has no effect, so call genphy_soft_reset() after change downshift params. As the datasheet says: Changes to these bits are disruptive to the normal operation therefore, any changes to these registers must be followed by software reset to take effect. Fixes: 911af5e149bb ("net: phy: marvell: fix downshift function naming") Signed-off-by: Maxim Kochetkov <fido_max@inbox.ru> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-04-21net: phy: marvell: don't use empty switch default caseMarek Behún1-2/+0
This causes error reported by kernel test robot. Signed-off-by: Marek Behún <kabel@kernel.org> Fixes: 41d26bf4aba0 ("net: phy: marvell: refactor HWMON OOP style") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-04-20net: phy: marvell: add support for Amethyst internal PHYMarek Behún1-3/+114
Add support for Amethyst internal PHY. The only difference from Peridot is HWMON. Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-04-20net: phy: marvell: use assignment by bitwise AND operatorMarek Behún1-1/+1
Use the &= operator instead of ret = ret & ... Signed-off-by: Marek Behún <kabel@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-04-20net: phy: marvell: fix HWMON enable register for 6390Marek Behún1-10/+9
Register 27_6.15:14 has the following description in 88E6393X documentation: Temperature Sensor Enable 0x0 - Sample every 1s 0x1 - Sense rate decided by bits 10:8 of this register 0x2 - Use 26_6.5 (One shot Temperature Sample) to enable 0x3 - Disable This is compatible with how the 6390 code uses this register currently, but the 6390 code handles it as two 1-bit registers (somewhat), instead of one register with 4 possible values. (A newer version of the 6390 documentation removed temperature sensor section completely. In an older version, the above mentioned register is reserved, although it is R/W. Since the code works, I think we can assume that it is correct.) Rename this register and define all 4 values according to 6393X documentation. Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-04-20net: phy: marvell: refactor HWMON OOP styleMarek Behún1-244/+125
Use a structure of Marvell PHY specific HWMON methods to reduce code duplication. Store a pointer to this structure into the PHY driver's driver_data member. Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-04-12net: phy: marvell: fix detection of PHY on Topaz switchesPali Rohár1-3/+29
Since commit fee2d546414d ("net: phy: marvell: mv88e6390 temperature sensor reading"), Linux reports the temperature of Topaz hwmon as constant -75°C. This is because switches from the Topaz family (88E6141 / 88E6341) have the address of the temperature sensor register different from Peridot. This address is instead compatible with 88E1510 PHYs, as was used for Topaz before the above mentioned commit. Create a new mapping table between switch family and PHY ID for families which don't have a model number. And define PHY IDs for Topaz and Peridot families. Create a new PHY ID and a new PHY driver for Topaz's internal PHY. The only difference from Peridot's PHY driver is the HWMON probing method. Prior this change Topaz's internal PHY is detected by kernel as: PHY [...] driver [Marvell 88E6390] (irq=63) And afterwards as: PHY [...] driver [Marvell 88E6341 Family] (irq=63) Signed-off-by: Pali Rohár <pali@kernel.org> BugLink: https://github.com/globalscaletechnologies/linux/issues/1 Fixes: fee2d546414d ("net: phy: marvell: mv88e6390 temperature sensor reading") Reviewed-by: Marek Behún <kabel@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-02-16net: phy: marvell: Ensure SGMII auto-negotiation is enabled for 88E1111Robert Hancock1-5/+8
When 88E1111 is operating in SGMII mode, auto-negotiation should be enabled on the SGMII side so that the link will come up properly with PCSes which normally have auto-negotiation enabled. This is normally the case when the PHY defaults to SGMII mode at power-up, however if we switched it from some other mode like 1000Base-X, as may happen in some SFP module situations, it may not be, particularly for modules which have 1000Base-X auto-negotiation defaulting to disabled. Call genphy_check_and_restart_aneg on the fiber page to ensure that auto- negotiation is properly enabled on the SGMII interface. Signed-off-by: Robert Hancock <robert.hancock@calian.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-02-11net: phy: introduce phydev->portMichael Walle1-0/+1
At the moment, PORT_MII is reported in the ethtool ops. This is odd because it is an interface between the MAC and the PHY and no external port. Some network card drivers will overwrite the port to twisted pair or fiber, though. Even worse, the MDI/MDIX setting is only used by ethtool if the port is twisted pair. Set the port to PORT_TP by default because most PHY drivers are copper ones. If there is fibre support and it is enabled, the PHY driver will set it to PORT_FIBRE. This will change reporting PORT_MII to either PORT_TP or PORT_FIBRE; except for the genphy fallback driver. Suggested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-02-09net: phy: drop explicit genphy_read_status() opMichael Walle1-1/+0
genphy_read_status() is already the default for the .read_status() op. Drop the unnecessary references. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-12-01net: phy: marvell: replace phy_modify()Yejune Deng1-8/+8
a set of phy_set_bits() looks more neater Signed-off-by: Yejune Deng <yejune.deng@gmail.com> Link: https://lore.kernel.org/r/1606732895-9136-1-git-send-email-yejune.deng@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-11-17net: phy: marvell: remove the use of .ack_interrupt()Ioana Ciornei1-20/+11
In preparation of removing the .ack_interrupt() callback, we must replace its occurrences (aka phy_clear_interrupt), from the 2 places where it is called from (phy_enable_interrupts and phy_disable_interrupts), with equivalent functionality. This means that clearing interrupts now becomes something that the PHY driver is responsible of doing, before enabling interrupts and after clearing them. Make this driver follow the new contract. Cc: Maxim Kochetkov <fido_max@inbox.ru> Cc: Baruch Siach <baruch@tkos.co.il> Cc: Robert Hancock <robert.hancock@calian.com> Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-11-17net: phy: marvell: implement generic .handle_interrupt() callbackIoana Ciornei1-21/+36
In an attempt to actually support shared IRQs in phylib, we now move the responsibility of triggering the phylib state machine or just returning IRQ_NONE, based on the IRQ status register, to the PHY driver. Having 3 different IRQ handling callbacks (.handle_interrupt(), .did_interrupt() and .ack_interrupt() ) is confusing so let the PHY driver implement directly an IRQ handler like any other device driver. Make this driver follow the new convention. Cc: Maxim Kochetkov <fido_max@inbox.ru> Cc: Baruch Siach <baruch@tkos.co.il> Cc: Robert Hancock <robert.hancock@calian.com> Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-10-30net: phy: marvell: add special handling of Finisar modules with 88E1111Robert Hancock1-1/+99
The Finisar FCLF8520P2BTL 1000BaseT SFP module uses a Marvel 88E1111 PHY with a modified PHY ID. Add support for this ID using the 88E1111 methods. By default these modules do not have 1000BaseX auto-negotiation enabled, which is not generally desirable with Linux networking drivers. Add handling to enable 1000BaseX auto-negotiation when these modules are used in 1000BaseX mode. Also, some special handling is required to ensure that 1000BaseT auto-negotiation is enabled properly when desired. Based on existing handling in the AMD xgbe driver and the information in the Finisar FAQ: https://www.finisar.com/sites/default/files/resources/an-2036_1000base-t_sfp_faqreve1.pdf Signed-off-by: Robert Hancock <robert.hancock@calian.com> Reviewed-by: Russell King <rmk+kernel@armlinux.org.uk> Link: https://lore.kernel.org/r/20201028171540.1700032-1-robert.hancock@calian.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-10-30drivers: net: phy: Fix spelling in comment defalut to defaultBhaskar Chowdhury1-1/+1
Fixed spelling in comment like below: s/defalut/default/p This is in linux-next. Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20201029095525.20200-1-unixbhaskar@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-10-05net: phy: marvell: Use phy_read_paged() instead of open coding itJisheng Zhang1-10/+4
Convert m88e1318_get_wol() to use the well implemented phy_read_paged() instead of open coding it. Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Reviewed-by: Marek Behún <kabel@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-22net: phy: marvell: Add Marvell 88E1548P supportMaxim Kochetkov1-0/+23
Add support for this new phy ID. Signed-off-by: Maxim Kochetkov <fido_max@inbox.ru> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-22net: phy: marvell: Add Marvell 88E1340S supportMaxim Kochetkov1-0/+23
Add support for this new phy ID. Signed-off-by: Maxim Kochetkov <fido_max@inbox.ru> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-22net: phy: marvell: use a single style for referencing functionsMaxim Kochetkov1-111/+111
The kernel in general does not use &func referencing format. Signed-off-by: Maxim Kochetkov <fido_max@inbox.ru> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-05net: marvell: Fix OF_MDIO config checkDan Murphy1-1/+1
When CONFIG_OF_MDIO is set to be a module the code block is not compiled. Use the IS_ENABLED macro that checks for both built in as well as module. Fixes: cf41a51db8985 ("of/phylib: Use device tree properties to initialize Marvell PHYs.") Signed-off-by: Dan Murphy <dmurphy@ti.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-29net: phy: marvell: unlock after phy_select_page() failureDan Carpenter1-1/+1
We need to call phy_restore_page() even if phy_select_page() fails. Otherwise we are holding the phy_lock_mdio_bus() lock. This requirement is documented at the start of the phy_select_page() function. Fixes: a618e86da91d ("net : phy: marvell: Speedup TDR data retrieval by only changing page once") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-26net: phy: marvell: Configure TDR pulse based on measurement lengthAndrew Lunn1-2/+23
When performing a TDR measurement for a short distance, the pulse width should be low, to help differentiate between the outgoing pulse and any reflection. For longer distances, the pulse should be wider, to help with attenuation. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-26net : phy: marvell: Speedup TDR data retrieval by only changing page onceAndrew Lunn1-12/+19
Getting the TDR data requires a large number of MDIO bus transactions. The number can however be reduced if the page is only changed once. Add the needed locking to allow this, and make use of unlocked read/write methods where needed. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-26net: ethtool: Allow PHY cable test TDR data to configuredAndrew Lunn1-17/+42
Allow the user to configure where on the cable the TDR data should be retrieved, in terms of first and last sample, and the step between samples. Also add the ability to ask for TDR data for just one pair. If this configuration is not provided, it defaults to 1-150m at 1m intervals for all pairs. Signed-off-by: Andrew Lunn <andrew@lunn.ch> v3: Move the TDR configuration into a structure Add a range check on step Use NL_SET_ERR_MSG_ATTR() when appropriate Move TDR configuration into a nest Document attributes in the request Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-26net: phy: marvell: Add support for amplitude graphAndrew Lunn1-1/+231
The Marvell PHYs can measure the amplitude of the returned signal for a given distance. Implement this option of the cable test infrastructure. When reporting the step, convert the distance into cm. Signed-off-by: Andrew Lunn <andrew@lunn.ch> v2: Step based on the measurement resolution, and convert this to cm. Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-10net: phy: marvell: Add cable test supportAndrew Lunn1-0/+201
The Marvell PHYs have a couple of different register sets for performing cable tests. Page 7 provides the simplest to use. v3: s/mavell/marvell/g Remove include of <uapi/linux/ethtool_netlink.h> Signed-off-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-04-11net: phy: marvell: Fix pause frame negotiationClemens Gruber1-22/+24
The negotiation of flow control / pause frame modes was broken since commit fcf1f59afc67 ("net: phy: marvell: rearrange to use genphy_read_lpa()") moved the setting of phydev->duplex below the phy_resolve_aneg_pause call. Due to a check of DUPLEX_FULL in that function, phydev->pause was no longer set. Fix it by moving the parsing of the status variable before the blocks dealing with the pause frames. As the Marvell 88E1510 datasheet does not specify the timing between the link status and the "Speed and Duplex Resolved" bit, we have to force the link down as long as the resolved bit is not set, to avoid reporting link up before we even have valid Speed/Duplex. Tested with a Marvell 88E1510 (RGMII to Copper/1000Base-T) Fixes: fcf1f59afc67 ("net: phy: marvell: rearrange to use genphy_read_lpa()") Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-03-23net: phy: marvell: remove downshift warning now that phylib takes careHeiner Kallweit1-24/+0
Now that phylib notifies the user of a downshift we can remove this functionality from the driver. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-02-27net: phy: marvell: don't interpret PHY status unless resolvedRussell King1-0/+5
Don't attempt to interpret the PHY specific status register unless the PHY is indicating that the resolution is valid. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-12-19net: phy: marvell: use genphy_check_and_restart_aneg()Russell King1-20/+1
Use the helper to check and restart autonegotiation for the marvell fiber page negotiation setting. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-12-19net: phy: marvell: use phy_modify_changed()Russell King1-16/+10
Use phy_modify_changed() to change the fiber advertisement register rather than open coding this functionality. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-12-19net: phy: marvell: use existing clause 37 definitionsRussell King1-18/+8
Use existing clause 37 advertising/link partner definitions rather than private ones for the advertisement registers. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-12-19net: phy: marvell: consolidate phy status readingRussell King1-43/+17
marvell_read_status_page_an() always reads the PHY status register, but marvell_update_link() has already done this. Rather than wastefully reading the register twice in quick succession, read it once in marvell_read_status_page() and use the result for both. This makes marvell_update_link() rather pointless, so move it into marvell_read_status_page(). Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-12-19net: phy: marvell: use positive logic for link stateRussell King1-4/+3
Rather than using negative logic: if (there is no link) set link = 0 else set link = 1 use the more natural positive logic: if (there is link) set link = 1 else set link = 0 Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-12-19net: phy: marvell: initialise link partner state earlierRussell King1-20/+5
Move the initialisation of the link partner state earlier, inside marvell_read_status_page(), so we don't have the same initialisation scattered amongst the other files. This is in a similar place to the genphy implementation, so would result in the same behaviour if a PHY read error occurs. This allows us to get rid of marvell_read_status_page_fixed(), which became a pointless wrapper around genphy_read_status_fixed(). Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-12-19net: phy: marvell: rearrange to use genphy_read_lpa()Russell King1-34/+32
Rearrange the Marvell PHY driver to use genphy_read_lpa() rather than open-coding this functionality. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-12-19net: phy: provide and use genphy_read_status_fixed()Russell King1-15/+4
There are two drivers and generic code which contain exactly the same code to read the status of a PHY operating without autonegotiation enabled. Rather than duplicate this code, provide a helper to read this information. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-12-19net: phy: use phy_resolve_aneg_pause()Russell King1-4/+1
Several drivers code their own version of this, working from the LPA register, after setting the ethtool link partner advertisement bitmask. Use the generic function instead. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-10-30net: phy: marvell: add downshift support for 88E1145Heiner Kallweit1-0/+3
Add downshift support for 88E1145, it uses the same downshift configuration registers as 88E1111. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-10-29net: phy: marvell: add PHY tunable support for more PHY versionsHeiner Kallweit1-0/+12
More PHY versions are compatible with the existing downshift implementation, so let's add downshift support for them. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-10-29net: phy: marvell: add downshift support for M88E1111Heiner Kallweit1-0/+64
This patch adds downshift support for M88E1111. This PHY version uses another register for downshift configuration, reading downshift status is possible via the same register as for other PHY versions. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-10-29net: phy: marvell: fix downshift function namingHeiner Kallweit1-15/+15
I got access to the M88E1111 datasheet, and this PHY version uses another register for downshift configuration. Therefore change prefix to m88e1011, aligned with constants like MII_M1011_PHY_SCR. Fixes: a3bdfce7bf9c ("net: phy: marvell: support downshift as PHY tunable") Reported-by: Chris Healy <Chris.Healy@zii.aero> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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