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2019-12-07r8169: fix rtl_hw_jumbo_disable for RTL8168evlHeiner Kallweit1-1/+1
In referenced fix we removed the RTL8168e-specific jumbo config for RTL8168evl in rtl_hw_jumbo_enable(). We have to do the same in rtl_hw_jumbo_disable(). v2: fix referenced commit id Fixes: 14012c9f3bb9 ("r8169: fix jumbo configuration for RTL8168evl") Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-12-07r8169: add missing RX enabling for WoL on RTL8125Heiner Kallweit1-1/+1
RTL8125 also requires to enable RX for WoL. v2: add missing Fixes tag Fixes: f1bce4ad2f1c ("r8169: add support for RTL8125") Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-12-01r8169: fix resume on cable plug-inHeiner Kallweit1-0/+1
It was reported [0] that network doesn't wake up on cable plug-in with certain chip versions. Reason is that on these chip versions the PHY doesn't detect cable plug-in when being in power-down mode. So prevent the PHY from powering down if WoL is enabled. [0] https://bugzilla.kernel.org/show_bug.cgi?id=202103 Fixes: 95fb8bb3181b ("net: phy: force phy suspend when calling phy_stop") Reported-by: jhdskag3 <jhdskag3@tutanota.com> Tested-by: jhdskag3 <jhdskag3@tutanota.com> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-12-01r8169: fix jumbo configuration for RTL8168evlHeiner Kallweit1-1/+1
Alan reported [0] that network is broken since the referenced commit when using jumbo frames. This commit isn't wrong, it just revealed another issue that has been existing before. According to the vendor driver the RTL8168e-specific jumbo config doesn't apply for RTL8168evl. [0] https://lkml.org/lkml/2019/11/30/119 Fixes: 4ebcb113edcc ("r8169: fix jumbo packet handling on resume from suspend") Reported-by: Alan J. Wylie <alan@wylie.me.uk> Tested-by: Alan J. Wylie <alan@wylie.me.uk> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-22Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netJakub Kicinski1-2/+5
Minor conflict in drivers/s390/net/qeth_l2_main.c, kept the lock from commit c8183f548902 ("s390/qeth: fix potential deadlock on workqueue flush"), removed the code which was removed by commit 9897d583b015 ("s390/qeth: consolidate some duplicated HW cmd code"). Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
2019-11-20r8169: add check for PHY_MDIO_CHG to rtl_nic_fw_data_okHeiner Kallweit1-5/+10
Only values 0 and 1 are currently defined as parameters for PHY_MDIO_CHG. Instead of silently ignoring unknown values and misinterpreting the firmware code let's explicitly check. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-20r8169: use macro FIELD_SIZEOF in definition of FW_OPCODE_SIZEHeiner Kallweit1-1/+1
Using macro FIELD_SIZEOF makes this define easier understandable. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-20r8169: change mdelay to msleep in rtl_fw_write_firmwareHeiner Kallweit1-1/+1
We're not in atomic context here, therefore switch to msleep. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-19r8169: disable TSO on a single version of RTL8168c to fix performanceCorinna Vinschen1-2/+5
During performance testing, I found that one of my r8169 NICs suffered a major performance loss, a 8168c model. Running netperf's TCP_STREAM test didn't return the expected throughput of > 900 Mb/s, but rather only about 22 Mb/s. Strange enough, running the TCP_MAERTS and UDP_STREAM tests all returned with throughput > 900 Mb/s, as did TCP_STREAM with the other r8169 NICs I can test (either one of 8169s, 8168e, 8168f). Bisecting turned up commit 93681cd7d94f83903cb3f0f95433d10c28a7e9a5, "r8169: enable HW csum and TSO" as the culprit. I added my 8168c version, RTL_GIGA_MAC_VER_22, to the code special-casing the 8168evl as per the patch below. This fixed the performance problem for me. Fixes: 93681cd7d94f ("r8169: enable HW csum and TSO") Signed-off-by: Corinna Vinschen <vinschen@redhat.com> Reviewed-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-16r8169: load firmware for RTL8168fp/RTL8117Heiner Kallweit1-1/+6
Load Realtek-provided firmware for RTL8168fp/RTL8117. Unlike the firmware for other chip versions which is for the PHY, firmware for RTL8168fp/RTL8117 is for the MAC. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-16r8169: improve conditional firmware loading for RTL8168dHeiner Kallweit1-20/+19
Using constant MII_EXPANSION is misleading here because register 0x06 has a different meaning on page 0x0005. Here a proprietary PHY parameter is read by writing the parameter id to register 0x05 on page 0x0005, followed by reading the parameter value from register 0x06. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-14r8169: use r8168d_modify_extpage in rtl8168f_config_eee_phyHeiner Kallweit1-5/+1
Use r8168d_modify_extpage() also in rtl8168f_config_eee_phy() to simplify the code. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-11r8169: add support for RTL8117Heiner Kallweit1-15/+120
Add support for chip version RTL8117. Settings have been copied from Realtek's r8168 driver, there however chip ID 54a belongs to a chip version called RTL8168FP. It was confirmed that RTL8117 works with Realtek's driver, so both chip versions seem to be the same or at least compatible. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-11r8169: respect EEE user setting when restarting networkHeiner Kallweit1-3/+15
Currently, if network is re-started, we advertise all supported EEE modes, thus potentially overriding a manual adjustment the user made e.g. via ethtool. Be friendly to the user and preserve a manual setting on network re-start. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-09r8169: remove rtl8168c_4_hw_phy_configHeiner Kallweit1-6/+1
rtl8168c_4_hw_phy_config() duplicates rtl8168c_3_hw_phy_config(), so we can remove the function. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-09r8169: add helper r8168d_modify_extpageHeiner Kallweit1-82/+39
Certain integrated PHY's from RTL8168d support extended pages. On page 0x0007 the number of the extended page is written to register 0x1e, then the registers on the extended page can be accessed. Add a helper for this to improve readability and simplify the code. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-09r8169: switch to phylib functions in more placesHeiner Kallweit1-68/+17
Use the phylib MDIO access functions in more places to simplify the code. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-09r8169: add helper r8168d_phy_paramHeiner Kallweit1-164/+85
Integrated PHY's from RTL8168d support an indirect access method for PHY parameters. On page 0x0005 parameter number is written to register 0x05, then the parameter can be accessed via register 0x06. Add a helper for this to improve readability and simplify the code. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-09r8169: add helper r8168g_phy_paramHeiner Kallweit1-187/+98
Integrated PHY's from RTL8168g support an indirect access method for PHY parameters. On page 0x0a43 parameter number is written to register 0x13, then the parameter can be accessed via register 0x14. Add a helper for this to improve readability and simplify the code. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-09Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netDavid S. Miller1-0/+3
One conflict in the BPF samples Makefile, some fixes in 'net' whilst we were converting over to Makefile.target rules in 'net-next'. Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-06r8169: fix page read in r8168g_mdio_readHeiner Kallweit1-0/+3
Functions like phy_modify_paged() read the current page, on Realtek PHY's this means reading the value of register 0x1f. Add special handling for reading this register, similar to what we do already in r8168g_mdio_write(). Currently we read a random value that by chance seems to be 0 always. Fixes: a2928d28643e ("r8169: use paged versions of phylib MDIO access functions") Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-02Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netDavid S. Miller1-0/+4
The only slightly tricky merge conflict was the netdevsim because the mutex locking fix overlapped a lot of driver reload reorganization. The rest were (relatively) trivial in nature. Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-01r8169: fix wrong PHY ID issue with RTL8168dpHeiner Kallweit1-0/+4
As reported in [0] at least one RTL8168dp version has problems establishing a link. This chip version has an integrated RTL8211b PHY, however the chip seems to report a wrong PHY ID, resulting in a wrong PHY driver (for Generic Realtek PHY) being loaded. Work around this issue by adding a hook to r8168dp_2_mdio_read() for returning the correct PHY ID. [0] https://bbs.archlinux.org/viewtopic.php?id=246508 Fixes: 242cd9b5866a ("r8169: use phy_resume/phy_suspend") Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-10-28r8169: use helper rtl_hw_aspm_clkreq_enable also in rtl_hw_start_8168g_2Heiner Kallweit1-2/+1
One place in the driver was left where the open-coded functionality hasn't been replaced with helper rtl_hw_aspm_clkreq_enable yet. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-10-25r8169: improve rtl8169_rx_fillHeiner Kallweit1-6/+3
We have only one user of the error path, so we can inline it. In addition the call to rtl8169_make_unusable_by_asic() can be removed because rtl8169_alloc_rx_data() didn't call rtl8169_mark_to_asic() yet for the respective index if returning NULL. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-10-25r8169: align fix_features callback with vendor driverHeiner Kallweit1-1/+1
This patch aligns the fix_features callback with the vendor driver and also disables IPv6 HW checksumming and TSO if jumbo packets are used on RTL8101/RTL8168/RTL8125. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-10-23r8169: never set PCI_EXP_DEVCTL_NOSNOOP_ENHeiner Kallweit1-13/+0
Setting PCI_EXP_DEVCTL_NOSNOOP_EN for certain chip versions had been added to the vendor driver more than 10 years ago, and copied from there to r8169. It has been removed from the vendor driver meanwhile and I think we can safely remove this too. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-10-22r8169: remove rtl_hw_start_8168befHeiner Kallweit1-11/+4
We can remove rtl_hw_start_8168bef() and use rtl_hw_start_8168b() instead because setting register Config4 is done in rtl_jumbo_config(), being called from rtl_hw_start(). Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
2019-10-22r8169: remove rtl_hw_start_8168dpHeiner Kallweit1-8/+1
We can remove rtl_hw_start_8168dp() because it's the same as rtl_hw_start_8168dp() now. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
2019-10-22r8169: simplify setting PCI_EXP_DEVCTL_NOSNOOP_ENHeiner Kallweit1-24/+10
r8168b_0_hw_jumbo_enable() and r8168b_0_hw_jumbo_disable() both do the same and just set PCI_EXP_DEVCTL_NOSNOOP_EN. We can simplify the code by moving this setting for RTL8168B to rtl_hw_start_8168(). Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
2019-10-22r8169: remove fiddling with the PCIe max read request sizeHeiner Kallweit1-36/+4
The attempt to improve performance by changing the PCIe max read request size was added in the vendor driver more than 10 years back and copied to r8169 driver. In the vendor driver this has been removed long ago. Obviously it had no effect, also in my tests I didn't see any difference. Typically the max payload size is less than 512 bytes anyway, and the PCI core takes care that the maximum supported value is set. So let's remove fiddling with PCIe max read request size from r8169 too. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
2019-10-10r8169: fix jumbo packet handling on resume from suspendHeiner Kallweit1-24/+11
Mariusz reported that invalid packets are sent after resume from suspend if jumbo packets are active. It turned out that his BIOS resets chip settings to non-jumbo on resume. Most chip settings are re-initialized on resume from suspend by calling rtl_hw_start(), so let's add configuring jumbo to this function. There's nothing wrong with the commit marked as fixed, it's just the first one where the patch applies cleanly. Fixes: 7366016d2d4c ("r8169: read common register for PCI commit") Reported-by: Mariusz Bialonczyk <manio@skyboo.net> Tested-by: Mariusz Bialonczyk <manio@skyboo.net> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
2019-09-23Merge tag 'pci-v5.4-changes' of ↵Linus Torvalds1-1/+0
git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI updates from Bjorn Helgaas: "Enumeration: - Consolidate _HPP/_HPX stuff in pci-acpi.c and simplify it (Krzysztof Wilczynski) - Fix incorrect PCIe device types and remove dev->has_secondary_link to simplify code that deals with upstream/downstream ports (Mika Westerberg) - After suspend, restore Resizable BAR size bits correctly for 1MB BARs (Sumit Saxena) - Enable PCI_MSI_IRQ_DOMAIN support for RISC-V (Wesley Terpstra) Virtualization: - Add ACS quirks for iProc PAXB (Abhinav Ratna), Amazon Annapurna Labs (Ali Saidi) - Move sysfs SR-IOV functions to iov.c (Kelsey Skunberg) - Remove group write permissions from sysfs sriov_numvfs, sriov_drivers_autoprobe (Kelsey Skunberg) Hotplug: - Simplify pciehp indicator control (Denis Efremov) Peer-to-peer DMA: - Allow P2P DMA between root ports for whitelisted bridges (Logan Gunthorpe) - Whitelist some Intel host bridges for P2P DMA (Logan Gunthorpe) - DMA map P2P DMA requests that traverse host bridge (Logan Gunthorpe) Amazon Annapurna Labs host bridge driver: - Add DT binding and controller driver (Jonathan Chocron) Hyper-V host bridge driver: - Fix hv_pci_dev->pci_slot use-after-free (Dexuan Cui) - Fix PCI domain number collisions (Haiyang Zhang) - Use instance ID bytes 4 & 5 as PCI domain numbers (Haiyang Zhang) - Fix build errors on non-SYSFS config (Randy Dunlap) i.MX6 host bridge driver: - Limit DBI register length (Stefan Agner) Intel VMD host bridge driver: - Fix config addressing issues (Jon Derrick) Layerscape host bridge driver: - Add bar_fixed_64bit property to endpoint driver (Xiaowei Bao) - Add CONFIG_PCI_LAYERSCAPE_EP to build EP/RC drivers separately (Xiaowei Bao) Mediatek host bridge driver: - Add MT7629 controller support (Jianjun Wang) Mobiveil host bridge driver: - Fix CPU base address setup (Hou Zhiqiang) - Make "num-lanes" property optional (Hou Zhiqiang) Tegra host bridge driver: - Fix OF node reference leak (Nishka Dasgupta) - Disable MSI for root ports to work around design problem (Vidya Sagar) - Add Tegra194 DT binding and controller support (Vidya Sagar) - Add support for sideband pins and slot regulators (Vidya Sagar) - Add PIPE2UPHY support (Vidya Sagar) Misc: - Remove unused pci_block_cfg_access() et al (Kelsey Skunberg) - Unexport pci_bus_get(), etc (Kelsey Skunberg) - Hide PM, VC, link speed, ATS, ECRC, PTM constants and interfaces in the PCI core (Kelsey Skunberg) - Clean up sysfs DEVICE_ATTR() usage (Kelsey Skunberg) - Mark expected switch fall-through (Gustavo A. R. Silva) - Propagate errors for optional regulators and PHYs (Thierry Reding) - Fix kernel command line resource_alignment parameter issues (Logan Gunthorpe)" * tag 'pci-v5.4-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (112 commits) PCI: Add pci_irq_vector() and other stubs when !CONFIG_PCI arm64: tegra: Add PCIe slot supply information in p2972-0000 platform arm64: tegra: Add configuration for PCIe C5 sideband signals PCI: tegra: Add support to enable slot regulators PCI: tegra: Add support to configure sideband pins PCI: vmd: Fix shadow offsets to reflect spec changes PCI: vmd: Fix config addressing when using bus offsets PCI: dwc: Add validation that PCIe core is set to correct mode PCI: dwc: al: Add Amazon Annapurna Labs PCIe controller driver dt-bindings: PCI: Add Amazon's Annapurna Labs PCIe host bridge binding PCI: Add quirk to disable MSI-X support for Amazon's Annapurna Labs Root Port PCI/VPD: Prevent VPD access for Amazon's Annapurna Labs Root Port PCI: Add ACS quirk for Amazon Annapurna Labs root ports PCI: Add Amazon's Annapurna Labs vendor ID MAINTAINERS: Add PCI native host/endpoint controllers designated reviewer PCI: hv: Use bytes 4 and 5 from instance ID as the PCI domain numbers dt-bindings: PCI: tegra: Add PCIe slot supplies regulator entries dt-bindings: PCI: tegra: Add sideband pins configuration entries PCI: tegra: Add Tegra194 PCIe support PCI: Get rid of dev->has_secondary_link flag ...
2019-09-01r8169: don't set bit RxVlan on RTL8125Heiner Kallweit1-2/+4
RTL8125 uses a different register for VLAN offloading config, therefore don't set bit RxVlan. Fixes: f1bce4ad2f1c ("r8169: add support for RTL8125") Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29r8169: add support for EEE on RTL8125Heiner Kallweit1-0/+24
This adds EEE support for RTL8125 based on the vendor driver. Supported is EEE for 100Mbps and 1Gbps. Realtek recommended to not yet enable EEE for 2.5Gbps due to potential compatibility issues. Also ethtool doesn't support yet controlling EEE for 2.5Gbps and 5Gbps. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29r8169: add RTL8125 PHY initializationHeiner Kallweit1-3/+127
This patch adds PHY initialization magic copied from the r8125 vendor driver. In addition it supports loading the firmware for chip version RTL_GIGA_MAC_VER_61. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29r8169: add support for RTL8125Heiner Kallweit2-18/+265
This adds support for 2.5Gbps chip RTL8125, it's partially based on the r8125 vendor driver. Tested with a Delock 89531 PCIe card against a Netgear GS110MX Multi-Gig switch. Firmware isn't strictly needed, but on some systems there may be compatibility issues w/o firmware. Firmware has been submitted to linux-firmware. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29r8169: don't use bit LastFrag in tx descriptor after sendHeiner Kallweit1-1/+1
On RTL8125 this bit is always cleared after send. Therefore check for tx_skb->skb being set what is functionally equivalent. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29r8169: read common register for PCI commitHeiner Kallweit1-1/+1
RTL8125 uses a different register number for IntrMask. To net have side effects by reading a random register let's use a register that is the same on all supported chip families. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29r8169: move disabling interrupt coalescing to RTL8169/RTL8168 initHeiner Kallweit1-2/+6
RTL8125 doesn't support the same coalescing registers, therefore move this initialization to the 8168/6169-specific init. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29r8169: factor out reading MAC address from registersHeiner Kallweit1-3/+10
For RTL8125 we will have to read the MAC address also from another register range, therefore create a small helper. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29r8169: restrict rtl_is_8168evl_up to RTL8168 chip versionsHeiner Kallweit1-1/+2
Extend helper rtl_is_8168evl_up to properly work once we add mac version numbers >51 for RTL8125. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29r8169: change interrupt mask type to u32Heiner Kallweit1-5/+11
RTL8125 uses a 32 bit interrupt mask even though only bits in the lower 16 bits are used. Change interrupt mask size to u32 to be prepared and reintroduce helper rtl_get_events. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-28PCI: Move ASPM declarations to linux/pci.hKrzysztof Wilczynski1-1/+0
Move ASPM definitions and function prototypes from include/linux/pci-aspm.h to include/linux/pci.h so users only need to include <linux/pci.h>: PCIE_LINK_STATE_L0S PCIE_LINK_STATE_L1 PCIE_LINK_STATE_CLKPM pci_disable_link_state() pci_disable_link_state_locked() pcie_no_aspm() No functional changes intended. Link: https://lore.kernel.org/r/20190827095620.11213-1-kw@linux.com Signed-off-by: Krzysztof Wilczynski <kw@linux.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2019-08-26r8169: improve DMA handling in rtl_rxHeiner Kallweit1-4/+3
Move the call to dma_sync_single_for_cpu after calling napi_alloc_skb. This avoids calling dma_sync_single_for_cpu w/o handing control back to device if the memory allocation should fail. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-23r8169: fix DMA issue on MIPS platformHeiner Kallweit1-0/+4
As reported by Aaro this patch causes network problems on MIPS Loongson platform. Therefore revert it. Fixes: f072218cca5b ("r8169: remove not needed call to dma_sync_single_for_device") Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reported-by: Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-15r8169: sync EEE handling for RTL8168h with vendor driverHeiner Kallweit1-1/+11
Sync EEE init for RTL8168h with vendor driver and add two writes to vendor-specific registers. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-15r8169: use the generic EEE management functionsHeiner Kallweit1-148/+24
Now that the Realtek PHY driver maps the vendor-specific EEE registers to the standard MMD registers, we can remove all special handling and use the generic functions phy_ethtool_get/set_eee. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-14r8169: fix sporadic transmit timeout issueHeiner Kallweit1-0/+1
Holger reported sporadic transmit timeouts and it turned out that one path misses ringing the doorbell. Fix was suggested by Eric. Fixes: ef14358546b1 ("r8169: make use of xmit_more") Suggested-by: Eric Dumazet <edumazet@google.com> Tested-by: Holger Hoffstätte <holger@applied-asynchrony.com> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-11r8169: inline rtl8169_free_rx_databuffHeiner Kallweit1-17/+7
rtl8169_free_rx_databuff is used in only one place, so let's inline it. We can improve the loop because rtl8169_init_ring zero's RX_databuff before calling rtl8169_rx_fill, and rtl8169_rx_fill fills Rx_databuff starting from index 0. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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