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2016-12-06net: dsa: mv88e6xxx: add PPU operationsVivien Didelot4-74/+81
Some Marvell chips can enable/disable the PPU on demand. This is needed to access the PHY registers when there is no indirection mechanism. Add two new ppu_enable and ppu_disable ops to describe this and finally get rid of the MV88E6XXX_FLAG_PPU* flags. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-12-06net: dsa: mv88e6xxx: add a soft reset operationVivien Didelot4-40/+172
Marvell chips have different way to issue a software reset. Old chips (such as 88E6060) have a reset bit in an ATU control register. Newer chips moved this bit in a Global control register. Chips with controllable PPU should reset the PPU when resetting the switch. Add a new reset operation to implement these differences and introduce a mv88e6xxx_software_reset() helper to wrap it conveniently. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-12-06net: dsa: mv88e6xxx: add helper to hardware resetVivien Didelot1-8/+14
Add an helper to toggle the eventual GPIO connected to the reset pin. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-12-06net: dsa: mv88e6xxx: add helper to disable portsVivien Didelot1-10/+22
Before resetting a switch, the ports should be set to the Disabled state and the transmit queues should be drained. Add an helper to explicit that. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-12-06net: dsa: mv88e6xxx: Use EDSA on mv88e6097Stefan Eichenberger1-0/+1
Use DSA_TAG_PROTO_EDSA as tag_protocol for the mv88e6097. The initialisation was missing before. Fixes: a1f482aa8c33 ("net: dsa: mv88e6xxx: Move the tagging protocol into info") Signed-off-by: Stefan Eichenberger <stefan.eichenberger@netmodule.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-12-03net: dsa: mv88e6xxx: Implement mv88e6390 pause controlAndrew Lunn4-0/+23
The mv88e6390 has a number flow control registers accessed via the Flow Control register. Use these to set the pause control. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-12-03net: dsa: mv88e6xxx: Refactor pause configurationAndrew Lunn4-8/+33
The mv88e6390 has a different mechanism for configuring pause. Refactor the code into an ops function, and for the moment, don't add any mv88e6390 code yet. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-12-03net: dsa: mv88e6xxx: Refactor egress rate limitingAndrew Lunn4-12/+35
There are two different rate limiting configurations, depending on the switch generation. Refactor this into ops. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-12-03net: dsa: mv88e6xxx: Refactor setting of jumbo framesAndrew Lunn4-5/+38
Some switches support jumbo frames. Refactor this code into operations in the ops structure. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-12-03net: dsa: mv88e6xxx: Reserved Management frames to CPUAndrew Lunn6-18/+97
Older devices have a couple of registers in global2. The mv88e6390 family has a single register in global1 behind which hides similar configuration. Implement and op for this. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-12-03net: dsa: mv88e6xxx: Refactor CPU and DSA port setupAndrew Lunn4-49/+319
Older chips only support DSA tagging. Newer chips have both DSA and EDSA tagging. Refactor the code by adding port functions for setting the frame mode, egress mode, and if to forward unknown frames. This results in the helper mv88e6xxx_6065_family() becoming unused, so remove it. Signed-off-by: Andrew Lunn <andrew@lunn.ch> v3: Verify mandatory ops for port setup Don't set ether type for DSA port. Signed-off-by: David S. Miller <davem@davemloft.net>
2016-12-03net: dsa: mv88e6xxx: Move the tagging protocol into infoAndrew Lunn2-19/+31
Older chips support a single tagging protocol, DSA. New chips support both DSA and EDSA, an enhanced version. Having both as an option changes the register layouts. Up until now, it has been assumed that if EDSA is supported, it will be used. Hence the register layout has been determined by which protocol should be used. However, mv88e6390 has a different implementation of EDSA, which requires we need to use the DSA tagging. Hence separate the selection of the protocol from the register layout. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-12-03net: dsa: mv88e6xxx: Monitor and Management tablesAndrew Lunn4-9/+145
The mv88e6390 changes the monitor control register into the Monitor and Management control, which is an indirection register to various registers. Add ops to set the CPU port and the ingress/egress port for both register layouts, to global1 Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-12-03net: dsa: mv88e6xxx: Implement mv88e6390 tag remapAndrew Lunn4-13/+101
The mv88e6390 does not have the two registers to set the frame priority map. Instead it has an indirection registers for setting a number of different priority maps. Refactor the old code into an function, implement the mv88e6390 version, and use an op to call the right one. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-28net: dsa: mv88e6xxx: Fix mv88e6xxx_g1_irq_free() interrupt countAndreas Färber1-1/+1
mv88e6xxx_g1_irq_setup() sets up chip->g1_irq.nirqs interrupt mappings, so free the same amount. This will be 8 or 9 in practice, less than 16. Fixes: dc30c35be720 ("net: dsa: mv88e6xxx: Implement interrupt support.") Cc: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-28net: dsa: mv88e6xxx: add missing comment for MV88E6097Stefan Eichenberger1-0/+1
Add a missing comment for the MV88E6097 because of unification. Signed-off-by: Stefan Eichenberger <stefan.eichenberger@netmodule.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-28net: dsa: mv88e6xxx: add g1_irqs definition for MV88E6097Stefan Eichenberger1-0/+1
Add the missing definition of g1_irqs for MV88E6097. Signed-off-by: Stefan Eichenberger <stefan.eichenberger@netmodule.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-24net: dsa: bcm_sf2: Ensure we re-negotiate EEE during after link changeFlorian Fainelli1-0/+4
In case the link change and EEE is enabled or disabled, always try to re-negotiate this with the link partner. Fixes: 450b05c15f9c ("net: dsa: bcm_sf2: add support for controlling EEE") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-24net: dsa: mv88e6xxx: add MV88E6097 switchStefan Eichenberger2-0/+28
Add support for the MV88E6097 switch. The change was tested on an Armada based platform with a MV88E6097 switch. Signed-off-by: Stefan Eichenberger <stefan.eichenberger@netmodule.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-22Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller1-12/+4
All conflicts were simple overlapping changes except perhaps for the Thunder driver. That driver has a change_mtu method explicitly for sending a message to the hardware. If that fails it returns an error. Normally a driver doesn't need an ndo_change_mtu method becuase those are usually just range changes, which are now handled generically. But since this extra operation is needed in the Thunder driver, it has to stay. However, if the message send fails we have to restore the original MTU before the change because the entire call chain expects that if an error is thrown by ndo_change_mtu then the MTU did not change. Therefore code is added to nicvf_change_mtu to remember the original MTU, and to restore it upon nicvf_update_hw_max_frs() failue. Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-22net: dsa: mv88e6xxx: Move g1 stats code in global1.[ch]Andrew Lunn3-52/+36
Move the stats functions which access global 1 registers into global1.c. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-22net: dsa: mv88e6xxx: Implement mv88e6390 get_statsAndrew Lunn2-10/+32
The mv88e6390 uses a different bit to select between bank0 and bank1 of the statistics. So implement an ops function for this, and pass the selector bit to the generic stats read function. Also, the histogram selection has moved for the mv88e6390, so abstract its selection as well. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-22net: dsa: mv88e6xxx: Add stats_get_stats to ops structureAndrew Lunn2-28/+57
Different families have different sets of statistics. Abstract this using a stats_get_stats op. The mv88e6390 needs a different implementation, which will be added later. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-22net: dsa: mv88e6xxx: Add stats_get_sset_count|string to ops structureAndrew Lunn2-80/+177
Different families have different sets of statistics. Abstract this using a stats_get_sset_count and stats_get_strings op. Each stat has a bitmap, and the ops implementer uses a bit map mask to count the statistics which apply for the family, or return the list of strings. Signed-off-by: Andrew Lunn <andrew@lunn.ch> v2: Rename functions to avoid _ prefix. Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-22net: dsa: mv88e6xxx: Add mv88e6390 statistics unit initAndrew Lunn4-0/+46
The statistics unit on the mv88e6390 needs the histogram mode to be configured in a different register compared to other devices. Add an ops to do this. Signed-off-by: Andrew Lunn <andrew@lunn.ch> v2: Rename to mv88e6390_g1_stats_set_histogram Move into global1.c Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-22net: dsa: mv88e6xxx: Add mv88e6390 stats snapshot operationAndrew Lunn4-1/+27
The MV88E6390 has a control register for what the histogram statistics actually contain. This means the stat_snapshot method should not set this information. So implement the 6390 stats_snapshot function without these bits. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-22net: dsa: mv88e6xxx: Add comment about family a device belongs toAndrew Lunn1-0/+24
Knowing the family of device belongs to helps with picking the ops implementation which is appropriate to the device. So add a comment to each structure of ops. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-22net: dsa: mv88e6xxx: Abstract stats_snapshot into ops structureAndrew Lunn4-15/+56
Taking a stats snapshot differs between same families. Abstract this into an ops member. At the same time, move the code into global1.[ch], since the registers are in the global1 range. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-22net: dsa: mv88e6xxx: Add the mv88e6390 familyAndrew Lunn2-0/+180
With the devices added to the tables, the probe will recognize the switch. This however is not sufficient to make it work properly, other changes are needed because of incompatibilities. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-22net: dsa: mv88e6xxx: Fix unused variable warning by using variableAndrew Lunn1-0/+3
_mv88e6xxx_stats_wait() did not check the return value from mv88e6xxx_g1_read(), so the compiler complained about set but unused err. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-22net: dsa: mv88e6xxx: Take switch out of reset before probeAndrew Lunn1-4/+4
The switch needs to be taken out of reset before we can read its ID register on the MDIO bus. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-20net: dsa: mv88e6xxx: Hold the mutex while freeing g1 interruptsAndrew Lunn1-1/+4
Freeing interrupts requires switch register access to mask the interrupts. Hence we must hold the register mutex. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-20net: dsa: mv88e6xxx: Fix releasing for the global2 interruptsAndrew Lunn2-10/+19
It is not possible to use devm_request_threaded_irq() because we have two stacked interrupt controllers in one device. The lower interrupt controller cannot be removed until the upper is fully removed. This happens too late with the devm API, resulting in error messages about removing a domain while there is still an active interrupt. Swap to using request_threaded_irq() and manage the release of the interrupt manually. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-20net: dsa: mv88e6xxx: Fix cleanup on error for g1 interrupt setupAndrew Lunn1-11/+20
On error, remask the interrupts, release all maps, and remove the domain. This cannot be done using the mv88e6xxx_g1_irq_free() because some of these actions are not idempotent. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-20net: dsa: mv88e6xxx: Mask g1 interrupts and free interruptAndrew Lunn1-0/+7
Fix the g1 interrupt free code such that is masks any further interrupts, and then releases the interrupt. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-20net: dsa: mv88e6xxx: Fix unconditional irq freeingAndrew Lunn1-5/+8
Trying to remove an IRQ domain that was not created results in an Opps. Add the necessary checks that the irqs were created before freeing them. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-20net: dsa: mv88e6xxx: Fix typos when removing g1 interruptsAndrew Lunn1-2/+2
Simple typos, s/g2/g1/ Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-18net: dsa: mv88e6xxx: Select IRQ_DOMAINFlorian Fainelli1-0/+1
Some architectures may not define IRQ_DOMAIN (like m32r), fixes undefined references to IRQ_DOMAIN functions. Fixes: dc30c35be720 ("net: dsa: mv88e6xxx: Implement interrupt support.") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-16net: dsa: b53: Fix VLAN usage and how we treat CPU portFlorian Fainelli1-12/+4
We currently have a fundamental problem in how we treat the CPU port and its VLAN membership. As soon as a second VLAN is configured to be untagged, the CPU automatically becomes untagged for that VLAN as well, and yet, we don't gracefully make sure that the CPU becomes tagged in the other VLANs it could be a member of. This results in only one VLAN being effectively usable from the CPU's perspective. Instead of having some pretty complex logic which tries to maintain the CPU port's default VLAN and its untagged properties, just do something very simple which consists in neither altering the CPU port's PVID settings, nor its untagged settings: - whenever a VLAN is added, the CPU is automatically a member of this VLAN group, as a tagged member - PVID settings for downstream ports do not alter the CPU port's PVID since it now is part of all VLANs in the system This means that a typical example where e.g: LAN ports are in VLAN1, and WAN port is in VLAN2, now require having two VLAN interfaces for the host to properly terminate and send traffic from/to. Fixes: Fixes: a2482d2ce349 ("net: dsa: b53: Plug in VLAN support") Reported-by: Hartmut Knaack <knaack.h@gmx.de> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-16net: dsa: mv88e6xxx: Respect SPEED_UNFORCED, don't set force bitAndrew Lunn1-1/+1
The SPEED_UNFORCED indicates the MAC & PHY should perform auto-negotiation to determine a speed which works. If this is called for, don't set the force bit. If it is set, the MAC actually does 10Gbps, why the internal PHYs don't support. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-13net: dsa: mv88e6xxx: 6351 family also has RGMII delaysAndrew Lunn1-0/+4
The recent refactoring of setting the MAC configuration broke setting of RGMII delays, via the phy-mode, on the 6351 family. Add the missing ops to the structure. Fixes: 7340e5ecdbb1 ("net: dsa: mv88e6xxx: setup port's MAC") Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-13net: dsa: mv88e6xxx: Don't modify RGMII delays when not RGMII modeAndrew Lunn1-2/+3
The RGMII modes delays can be set via strapping pings or EEPROM. Don't change them unless explicitly asked to change them. The recent refactoring of setting the MAC configuration changed this behaviours, in that CPU and DSA ports have any pre-configured RGMII delays removed. This breaks the Armada 370RD board. Restore the previous behaviour, in that RGMII delays are only applied/removed when explicitly asked for via an phy-mode being PHY_INTERFACE_MODE_RGMII* Fixes: 7340e5ecdbb1 ("net: dsa: mv88e6xxx: setup port's MAC") Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-04net: dsa: mv88e6xxx: setup port's MACVivien Didelot1-80/+60
Now that we have setters to configure the port's MAC, use them to refactor the port setup and adjust_link code. Note that port's MAC speed, duplex or RGMII delay must not be changed unless the port's link is forced down. So wrap all that in a mv88e6xxx_port_setup_mac function. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-04net: dsa: mv88e6xxx: add port's MAC speed setterVivien Didelot4-12/+189
While the two bits for link, duplex or RGMII delays are used the same way on chips supporting the said feature, the two bits for speed have different meaning for most of the chips out there. Speed value is stored in bits 1:0, 0x3 means unforce (normal detection). Some chips reuse values for alternative speeds when bit 12 is set. Newer chips with speed > 1Gbps reuse value 0x3 thus need a new bit 13. Here are the values to write in register 0x1 to (un)force speed: | Speed | 88E6065 | 88E6185 | 88E6352 | 88E6390 | 88E6390X | | ------- | ------- | ------- | ------- | ------- | -------- | | 10 | 0x0000 | 0x0000 | 0x0000 | 0x2000 | 0x2000 | | 100 | 0x0001 | 0x0001 | 0x0001 | 0x2001 | 0x2001 | | 200 | 0x0002 | NA | 0x1001 | 0x3001 | 0x3001 | | 1000 | NA | 0x0002 | 0x0002 | 0x2002 | 0x2002 | | 2500 | NA | NA | NA | 0x3003 | 0x3003 | | 10000 | NA | NA | NA | NA | 0x2003 | | unforce | 0x0003 | 0x0003 | 0x0003 | 0x0000 | 0x0000 | This patch implements a generic mv88e6xxx_port_set_speed() function used by chip-specific wrappers to filter supported ports and speeds. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-04net: dsa: mv88e6xxx: add port's RGMII delay setterVivien Didelot4-0/+73
Some chips such as 88E6352 and 88E6390 can be programmed to add delays to RXCLK for IND inputs or to GTXCLK for OUTD outputs when port is in RGMII mode. Add a port function to program such delays according to the provided PHY interface mode. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-04net: dsa: mv88e6xxx: add port duplex setterVivien Didelot4-0/+64
Similarly to port's link, add setter to force port's half duplex, full duplex or let normal duplex detection occurs. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-04net: dsa: mv88e6xxx: add port link setterVivien Didelot4-0/+70
Most of the chips will have a port register control bits to force the port's link up, down, or let normal link detection occurs. Implement such operation to use it later when setting duplex, etc. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-04net: dsa: mv88e6xxx: add port 802.1Q mode setterVivien Didelot3-31/+37
Add port functions to set the port 802.1Q mode. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-04net: dsa: mv88e6xxx: add port PVID accessorsVivien Didelot3-47/+45
Add port functions to access the ports default VID. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-04net: dsa: mv88e6xxx: add port FID accessorsVivien Didelot3-73/+74
Add functions to port files to access the ports default FID. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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