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2018-02-16mtd: nand: move raw NAND related code to the raw/ subdirBoris Brezillon1-2321/+0
As part of the process of sharing more code between different NAND based devices, we need to move all raw NAND related code to the raw/ subdirectory. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
2018-01-25mtd: nand: sunxi: Fix ECC strength choiceMiquel Raynal1-1/+7
When the requested ECC strength does not exactly match the strengths supported by the ECC engine, the driver is selecting the closest strength meeting the 'selected_strength > requested_strength' constraint. Fix the fact that, in this particular case, ecc->strength value was not updated to match the 'selected_strength'. For instance, one can encounter this issue when no ECC requirement is filled in the device tree while the NAND chip minimum requirement is not a strength/step_size combo natively supported by the ECC engine. Fixes: 1fef62c1423b ("mtd: nand: add sunxi NAND flash controller support") Cc: <stable@vger.kernel.org> Suggested-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-12-14mtd: nand: squash struct nand_buffers into struct nand_chipMasahiro Yamada1-3/+3
struct nand_buffers is malloc'ed in nand_scan_tail() just for containing three pointers. Squash this struct into nand_chip. Move and rename as follows: chip->buffers->ecccalc -> chip->ecc.calc_buf chip->buffers->ecccode -> chip->ecc.code_buf chip->buffers->databuf -> chip->data_buf Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-12-14mtd: nand: force drivers to explicitly send READ/PROG commandsBoris Brezillon1-12/+22
The core currently send the READ0 and SEQIN+PAGEPROG commands in nand_do_read/write_ops(). This is inconsistent with ->read/write_oob[_raw]() hooks behavior which are expected to send these commands. There's already a flag (NAND_ECC_CUSTOM_PAGE_ACCESS) to inform the core that a specific controller wants to send the READ/SEQIN+PAGEPROG commands on its own, but it's an opt-in flag, and existing drivers are unlikely to be updated to pass it. Moreover, some controllers cannot dissociate the READ/PAGEPROG commands from the associated data transfer and ECC engine activation, and developers have to hack things in their ->cmdfunc() implementation to handle such complex cases, or have to accept the perf penalty of sending twice the same command. To address this problem we are planning on adding a new interface which is passed all information about a NAND operation (including the amount of data to transfer) and replacing all calls to ->cmdfunc() to calls to this new ->exec_op() hook. But, in order to do that, we need to have all ->cmdfunc() calls placed near their associated ->read/write_buf/byte() calls. Modify the core and relevant drivers to make NAND_ECC_CUSTOM_PAGE_ACCESS the default case, and remove this flag. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [miquel.raynal@free-electrons.com: tested, fixed and rebased on nand/next] Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-12-14mtd: nand: provide several helpers to do common NAND operationsBoris Brezillon1-38/+33
This is part of the process of removing direct calls to ->cmdfunc() outside of the core in order to introduce a better interface to execute NAND operations. Here we provide several helpers and make use of them to remove all direct calls to ->cmdfunc(). This way, we can easily modify those helpers to make use of the new ->exec_op() interface when available. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [miquel.raynal@free-electrons.com: rebased and fixed some conflicts] Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-09-01Merge tag 'nand/for-4.14' of git://git.infradead.org/l2-mtd into mtd/nextBoris Brezillon1-2/+2
From Boris: " This pull request contains the following core changes: * Fix memory leaks in the core * Remove unused NAND locking support * Rename nand.h into rawnand.h (preparing support for spi NANDs) * Use NAND_MAX_ID_LEN where appropriate * Fix support for 20nm Hynix chips * Fix support for Samsung and Hynix SLC NANDs and the following driver changes: * Various cleanup, improvements and fixes in the qcom driver * Fixes for bugs detected by various static code analysis tools * Fix mxc ooblayout definition * Add a new part_parsers to tmio and sharpsl platform data in order to define a custom list of partition parsers * Request the reset line in exclusive mode in the sunxi driver * Fix a build error in the orion-nand driver when compiled for ARMv4 * Allow 64-bit mvebu platforms to select the PXA3XX driver "
2017-08-23Merge branch 'nand/rename-header-file' of git://git.infradead.org/l2-mtd ↵Boris Brezillon1-1/+1
into nand/next
2017-08-23mtd: nand: sunxi: explicitly request exclusive reset controlPhilipp Zabel1-1/+1
Commit a53e35db70d1 ("reset: Ensure drivers are explicit when requesting reset lines") started to transition the reset control request API calls to explicitly state whether the driver needs exclusive or shared reset control behavior. Convert all drivers requesting exclusive resets to the explicit API call so the temporary transition helpers can be removed. No functional changes. Cc: Boris Brezillon <boris.brezillon@free-electrons.com> Cc: Richard Weinberger <richard@nod.at> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Marek Vasut <marek.vasut@gmail.com> Cc: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Chen-Yu Tsai <wens@csie.org> Cc: linux-mtd@lists.infradead.org Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-08-13mtd: nand: Rename nand.h into rawnand.hBoris Brezillon1-1/+1
We are planning to share more code between different NAND based devices (SPI NAND, OneNAND and raw NANDs), but before doing that we need to move the existing include/linux/mtd/nand.h file into include/linux/mtd/rawnand.h so we can later create a nand.h header containing all common structure and function prototypes. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Peter Pan <peterpandong@micron.com> Acked-by: Vladimir Zapolskiy <vz@mleia.com> Acked-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Acked-by: Wenyou Yang <wenyou.yang@microchip.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Han Xu <han.xu@nxp.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-By: Harvey Hunt <harveyhuntnexus@gmail.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Krzysztof Halasa <khalasa@piap.pl>
2017-08-02mtd: nand: sunxi: fix potential divide-by-zero errorBryan O'Donoghue1-0/+4
clk_round_rate() can return <= 0. Currently the value returned by clk_round_rate() is used directly for a division. This patch introduces a guard to ensure a divide-by-zero or a divide by a negative number for that matter can't happen by bugging out returning -EINVAL if clk_round_rate() returns <= 0. Fixes: 2d43457f79e4 ("mtd: nand: sunxi: fix EDO mode selection") Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-06-01mtd: nand: sunxi: Remove unneeded ->cmdfunc(NAND_CMD_READ0, 0, page)Boris Brezillon1-1/+0
The core already sends the NAND_CMD_READ0 for us. Duplicating this call in the driver is useless and introduces a perf penalty. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-06-01mtd: nand: sunxi: Actually use DMA for subpage readsBoris Brezillon1-1/+0
ecc->read_subpage is set to sunxi_nfc_hw_ecc_read_subpage_dma when ->dmac != NULL, but is then unconditionally overwritten in the common init path. Remove this extra assignment to allow usage of the DMA operation when possible. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-06-01mtd: nand: Pass the CS line to ->setup_data_interface()Boris Brezillon1-4/+3
Some NAND controllers can assign different NAND timings to different CS lines. Pass the CS line information to ->setup_data_interface() so that the NAND controller driver knows which CS line is concerned by the setup_data_interface() request. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-03-16mtd: nand: sunxi: simplify optional reset handlingPhilipp Zabel1-11/+9
As of commit bb475230b8e5 ("reset: make optional functions really optional"), the reset framework API calls use NULL pointers to describe optional, non-present reset controls. This allows to return errors from devm_reset_control_get_optional and to call reset_control_(de)assert unconditionally. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-02-06mtd: nand: sunxi: Improve sunxi_nfc_cmd_ctrl()Boris Brezillon1-4/+4
We only need to call sunxi_nfc_wait_cmd_fifo_empty() if we want to send a new command. Move the sunxi_nfc_wait_cmd_fifo_empty() call to right place to avoid extra register reads. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-02-06mtd: nand: sunxi: Stop using polling mode when waiting for long operationsBoris Brezillon1-6/+18
Some operations, like read/write an entire page of data with the ECC engine enabled, are known to take a lot of time. Use the interrupt-based waiting mode in these situation. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-02-06mtd: nand: sunxi: Fix the non-polling case in sunxi_nfc_wait_events()Boris Brezillon1-0/+4
wait_for_completion_timeout() returns 0 if a timeout occurred, 1 otherwise. Fix the sunxi_nfc_wait_events() accordingly. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-10-21mtd: nand: sunxi: fix support for 512bytes ECC chunksBoris Brezillon1-0/+4
The driver is incorrectly assuming that the ECC block size is always 1k which is not always true. Also take the other cases into account. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-09-23mtd: nand: sunxi: Support ECC maximizationBoris Brezillon1-0/+29
Setup the maximum ECC config when NAND_ECC_MAXIMIZE is set. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand: sunxi: switch from manual to automated timing configSascha Hauer1-62/+14
The NAND framework is now able to select the best NAND timings for us. All we have to do is implement a ->setup_data_interface() function to apply those timings and remove the timing selection code from the sunxi driver. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand: import nand_hw_control_init()Marc Gonzalez1-2/+1
The code to initialize a struct nand_hw_control is duplicated across several drivers. Factorize it using an inline function. Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-07-11mtd: nand: sunxi: prevent a small memory leakDan Carpenter1-3/+3
I moved the sanity check on ecc->size before the allocation so that we don't leak memory on error. Fixes: 05af074a4b73 ('mtd: nand: sunxi: check ecc->size values') Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-07-11mtd: nand: sunxi: add reset line supportIcenowy Zheng1-2/+23
The NAND controller on some sun8i chips needs its reset line to be deasserted before they can enter working state. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-07-11mtd: nand: sunxi: fix subpage writeBoris Brezillon1-1/+32
Implement ecc->write_subpage() to prevent core code from assigning this hook to nand_write_subpage_hwecc(). This default implementation tries to call ecc->hwctl() which in our case is NULL, thus leading to a NULL pointer dereference. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-07-11mtd: nand: sunxi: check ecc->size valuesBoris Brezillon1-0/+3
Verify that the ecc->size value is either 512 or 1024 bytes. This should always be the case if this field was assigned to the nand->ecc_step_size_ds value, but can be wrong when the user overloaded this value with the nand-ecc-step-size DT property. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-07-11mtd: nand: sunxi: prefer 1k ECC blocks when applicableBoris Brezillon1-0/+6
Switching to 1k ECC blocks when possible provides better resistance against concentrated bitflips. Say you have those two configurations: 1/ 16bits/512bytes 2/ 32bits/1024bytes Both of them require the same amount of ECC bytes (only true for this specific engine), but the second config allows you to correct the case where most of your bitflips are concentrated in a single 512bytes portion. This fact makes the 1k ECC block size more advantageous than the 512bytes one. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-07-11mtd: nand: sunxi: Fix OOB bytes retrieval in read_chunks_dma()Boris Brezillon1-2/+4
The column address passed to the RNDOUT operation was missing the page size offset. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Fixes: 614049a8d904 ("mtd: nand: sunxi: add support for DMA assisted operations")
2016-07-11mtd: nand: sunxi: fix return value check in sunxi_nfc_dma_op_prepare()Wei Yongjun1-2/+2
In case of error, the function dmaengine_prep_slave_sg() returns NULL pointer not ERR_PTR(). The IS_ERR() test in the return value check should be replaced with NULL test. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Fixes: 614049a8d904 ("mtd: nand: sunxi: add support for DMA assisted operations") Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-06-06mtd: nand: sunxi: add support for DMA assisted operationsBoris Brezillon1-7/+323
The sunxi NAND controller is able to pipeline ECC operations only when operated in DMA mode, which improves a lot NAND throughput while keeping CPU usage low. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: mtd: drop NAND_ECC_SOFT_BCH enum valueRafał Miłecki1-2/+0
This value should not be part of nand_ecc_modes_t as it specifies algorithm not a mode. We successfully managed to introduce new "algo" field which is respected now. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: nand: sunxi: switch to mtd_ooblayout_opsBoris Brezillon1-62/+52
Implementing the mtd_ooblayout_ops interface is the new way of exposing ECC/OOB layout to MTD users. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-04-19mtd: nand: sunxi: make cur_off parameter optional in extra oob helpersBoris Brezillon1-4/+6
Allow for NULL cur_offs values when the caller does not know where the NAND page register pointer points to. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-04-19mtd: nand: sunxi: make OOB retrieval optionalBoris Brezillon1-11/+16
sunxi_nfc_hw_ecc_read_chunk() always retrieves the ECC and protected free bytes, no matter if the user really asked for it or not. This can take a non negligible amount of time, especially on NAND chips exposing large OOB areas (> 1KB). Make it optional. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-04-19mtd: nand: sunxi: move some ECC related operations to their own functionsBoris Brezillon1-55/+108
In order to support DMA operations in a clean way we need to extract some of the logic coded in sunxi_nfc_hw_ecc_read/write_page() into their own function. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-04-19mtd: nand: sunxi: poll for events instead of using interruptsBoris Brezillon1-14/+31
Some NAND operations are so fast that it doesn't make any sense to use interrupt based waits (the scheduling overhead is not worth it). Rename sunxi_nfc_wait_int() into sunxi_nfc_wait_events() and add a parameter to specify whether polling should be used or not. Note that all sunxi_nfc_wait_int() are moved to the polling approach now, but this should change as soon as we have more information about the approximate time we are about to wait (can be extracted from the NAND timings, and the type of operation). Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-04-19mtd: nand: sunxi: make use of readl_poll_timeout()Boris Brezillon1-17/+17
Replace open coded polling loops by readl_poll_timeout() calls. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-04-19mtd: nand: sunxi: fix ->dev_ready() implementationBoris Brezillon1-7/+0
->dev_ready() is not supposed to wait for busy to ready solution (this is the role of ->waitfunc()). Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-04-19mtd: nand: enable ECC pipeliningBoris Brezillon1-1/+2
When the NAND controller operates in DMA mode it can pipeline ECC operations which improves the throughput. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-04-19mtd: nand: sunxi: disable clks on device removalBoris Brezillon1-0/+2
mod and ahb clocks are not disabled when the NAND controller device is removed. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-04-19mtd: nand: sunxi: fix NFC_CTL settingBoris Brezillon1-1/+1
NFC_PAGE_SHIFT() already takes the real page_shift value and subtract 10 to it. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-04-19mtd: nand: sunxi: fix the NFC_ECC_ERR_CNT() macroBoris Brezillon1-1/+1
NFC_ECC_ERR_CNT() is not taking into account the case when the NAND chip contains more than 4 ECC blocks (NANDs with 4kB+ pages). Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-04-19mtd: nand: sunxi: let the NAND controller control the CE lineBoris Brezillon1-10/+0
We don't need to manually toggle the CE line since the controller handles it for us. Moreover, keeping the CE line low when interacting with a DDR NAND can be problematic (data loss in some corner cases). Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-04-19mtd: nand: sunxi: improve ->cmd_ctrl() functionBoris Brezillon1-8/+44
Try to pack address and command cycles into a single NAND controller command to avoid polling the status register for each single change on the NAND bus. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-04-19mtd: nand: sunxi: implement ->read_subpage()Boris Brezillon1-0/+36
Being able to read subpages can greatly improve read performances if the MTD user is only interested in a small section of a NAND page. This is particularly true with large pages (>= 8k). Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-04-19mtd: nand: sunxi: implement ->read_oob()/->write_oob()Boris Brezillon1-0/+40
Allwinner's ECC engine is capable of protecting a few bytes of the OOB area. Implement specific OOB functions to benefit from this capability. Also, when in raw mode, the randomizer is disabled, which means you'll only be able to retrieve randomized data, which is not really useful for most applications. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-04-19mtd: nand: sunxi: adapt clk_rate to tWB, tADL, tWHR and tRHW timingsBoris Brezillon1-0/+12
Adapt the NAND controller clk rate to the tWB, tADL, tWHR and tRHW timings instead of returning an error when the maximum clk divisor is not big enough to provide an appropriate timing. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-04-19mtd: nand: sunxi: fix EDO mode selectionBoris Brezillon1-7/+11
The ONFI spec says that EDO should be enabled if the host drives tRC less than 30ns, but the code just tests for the tRC_min value extracted from the timings exposed by the NAND chip not the timings actually configured in the NAND controller. Fix that by first rounding down the requested clk_rate with clk_round_rate() and then checking if tRC is actually smaller than 30ns. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-04-19mtd: nand: sunxi: fix clk rate calculationBoris Brezillon1-5/+5
Unlike what is specified in the Allwinner datasheets, the NAND clock rate is not equal to 2/T but 1/T. Fix the clock rate selection accordingly. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-04-19mtd: nand: sunxi: fix call order in sunxi_nand_chip_init()Boris Brezillon1-15/+15
sunxi_nand_chip_set_timings() is extracting a pointer to the nfc from the nand->controller field, but this field is initialized after sunxi_nand_chip_set_timings() call. Reorder the calls to avoid any problem. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-04-19mtd: nand: remove unneeded of_mtd.h inclusionsBoris Brezillon1-1/+0
Some drivers are including linux/of_mtd.h even if they don't use any of the of_get_nand_xxx() helpers. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Harvey Hunt <harvey.hunt@imgtec.com>
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