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2018-02-16mtd: nand: move raw NAND related code to the raw/ subdirBoris Brezillon1-2182/+0
As part of the process of sharing more code between different NAND based devices, we need to move all raw NAND related code to the raw/ subdirectory. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
2018-01-29Merge tag 'mtd/for-4.16' of git://git.infradead.org/linux-mtdLinus Torvalds1-65/+46
Pull MTD updates from Boris Brezillon: "MTD core changes: - Rework core functions to avoid duplicating generic checks in NAND/OneNAND sub-layers - Update the MAINTAINERS entry to reflect the fact that MTD maintainers now use a single git tree MTD driver changes: - CFI: use macros instead of inline functions to limit stack usage and make KASAN happy NAND core changes: - Fix NAND_CMD_NONE handling in nand_command[_lp]() hooks - Introduce the ->exec_op() infrastructure - Rework NAND buffers handling - Fix ECC requirements for K9F4G08U0D - Fix nand_do_read_oob() to return the number of bitflips - Mark K9F1G08U0E as not supporting subpage writes NAND driver changes: - MTK: Rework the driver to support new IP versions - OMAP OneNAND: Full rework to use new APIs (libgpio, dmaengine) and fix DT support - Marvell: Add a new driver to replace the pxa3xx one SPI NOR core changes: - Add support to new ISSI and Cypress/Spansion memory parts. - Fix support of Micron memories by checking error bits in the FSR. - Fix update of block-protection bits by reading back the SR. - Restore the internal state of the SPI flash memory when removing the device. SPI NOR driver changes: - Maintenance for Freescale, Intel and Metiatek drivers. - Add support of the direct access mode for the Cadence QSPI controller" * tag 'mtd/for-4.16' of git://git.infradead.org/linux-mtd: (93 commits) mtd: nand: sunxi: Fix ECC strength choice mtd: nand: gpmi: Fix subpage reads mtd: nand: Fix build issues due to an anonymous union mtd: nand: marvell: Fix missing memory allocation modifier mtd: nand: marvell: remove redundant variable 'oob_len' mtd: nand: marvell: fix spelling mistake: "suceed"-> "succeed" mtd: onenand: omap2: Remove redundant dev_err call in omap2_onenand_probe() mtd: Remove duplicate checks on mtd_oob_ops parameter mtd: Fallback to ->_read/write_oob() when ->_read/write() is missing mtd: mtdpart: Make ECC stat handling consistent mtd: onenand: omap2: print resource using %pR format string mtd: mtk-nor: modify functions' name more generally mtd: onenand: samsung: remove incorrect __iomem annotation MAINTAINERS: Add entry for Marvell NAND controller driver ARM: OMAP2+: Remove gpmc-onenand mtd: onenand: omap2: Configure driver from DT mtd: onenand: omap2: Decouple DMA enabling from INT pin availability mtd: onenand: omap2: Do not make delay for GPIO OMAP3 specific mtd: onenand: omap2: Convert to use dmaengine for memcpy mtd: onenand: omap2: Unify OMAP2 and OMAP3 DMA implementation ...
2018-01-25mtd: nand: gpmi: Fix subpage readsBoris Brezillon1-5/+13
Commit 25f815f66a14 ("mtd: nand: force drivers to explicitly send READ/PROG commands") added a call to nand_read_page_op() in gpmi_ecc_read_page(), which means this function now sends a READ0 command and place the data pointer at the beginning of the page. This logic is breaking gpmi_ecc_read_subpage() which was calling gpmi_ecc_read_page() and expected it to only retrieve the data without sending the READ0 command. Create a gpmi_ecc_read_page_data() helper which only does the data retrieval and ECC correction steps and implement gpmi_ecc_read_page() as a wrapper that calls nand_read_page_op()+gpmi_ecc_read_page_data(). This way, gpmi_ecc_read_subpage() can call gpmi_ecc_read_page_data() which restores the logic we had before commit 25f815f66a14 ("mtd: nand: force drivers to explicitly send READ/PROG commands"). Fixes: 25f815f66a14 ("mtd: nand: force drivers to explicitly send READ/PROG commands") Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Reviewed-by: Miquel Raynal <miquel.raynal@free-electrons.com> Acked-by: Han Xu <han.xu@nxp.com>
2017-12-15mtd: nand: gpmi: Fix failure when a erased page has a bitflip at BBMSascha Hauer1-3/+3
When erased subpages are read then the BCH decoder returns STATUS_ERASED if they are all empty, or STATUS_UNCORRECTABLE if there are bitflips. When there are bitflips, we have to set these bits again to show the upper layers a completely erased page. When a bitflip happens in the exact byte where the bad block marker is, then this byte is swapped with another byte in block_mark_swapping(). The correction code then detects a bitflip in another subpage and no longer corrects the bitflip where it really happens. Correct this behaviour by calling block_mark_swapping() after the bitflips have been corrected. In our case UBIFS failed with this bug because it expects erased pages to be really empty: UBIFS error (pid 187): ubifs_scan: corrupt empty space at LEB 36:118735 UBIFS error (pid 187): ubifs_scanned_corruption: corruption at LEB 36:118735 UBIFS error (pid 187): ubifs_scanned_corruption: first 8192 bytes from LEB 36:118735 UBIFS error (pid 187): ubifs_scan: LEB 36 scanning failed UBIFS error (pid 187): do_commit: commit failed, error -117 Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Richard Weinberger <richard@nod.at> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Richard Weinberger <richard@nod.at>
2017-12-14mtd: nand: squash struct nand_buffers into struct nand_chipMasahiro Yamada1-2/+2
struct nand_buffers is malloc'ed in nand_scan_tail() just for containing three pointers. Squash this struct into nand_chip. Move and rename as follows: chip->buffers->ecccalc -> chip->ecc.calc_buf chip->buffers->ecccode -> chip->ecc.code_buf chip->buffers->databuf -> chip->data_buf Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-12-14mtd: nand: force drivers to explicitly send READ/PROG commandsBoris Brezillon1-15/+16
The core currently send the READ0 and SEQIN+PAGEPROG commands in nand_do_read/write_ops(). This is inconsistent with ->read/write_oob[_raw]() hooks behavior which are expected to send these commands. There's already a flag (NAND_ECC_CUSTOM_PAGE_ACCESS) to inform the core that a specific controller wants to send the READ/SEQIN+PAGEPROG commands on its own, but it's an opt-in flag, and existing drivers are unlikely to be updated to pass it. Moreover, some controllers cannot dissociate the READ/PAGEPROG commands from the associated data transfer and ECC engine activation, and developers have to hack things in their ->cmdfunc() implementation to handle such complex cases, or have to accept the perf penalty of sending twice the same command. To address this problem we are planning on adding a new interface which is passed all information about a NAND operation (including the amount of data to transfer) and replacing all calls to ->cmdfunc() to calls to this new ->exec_op() hook. But, in order to do that, we need to have all ->cmdfunc() calls placed near their associated ->read/write_buf/byte() calls. Modify the core and relevant drivers to make NAND_ECC_CUSTOM_PAGE_ACCESS the default case, and remove this flag. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [miquel.raynal@free-electrons.com: tested, fixed and rebased on nand/next] Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-12-14mtd: nand: provide several helpers to do common NAND operationsBoris Brezillon1-39/+19
This is part of the process of removing direct calls to ->cmdfunc() outside of the core in order to introduce a better interface to execute NAND operations. Here we provide several helpers and make use of them to remove all direct calls to ->cmdfunc(). This way, we can easily modify those helpers to make use of the new ->exec_op() interface when available. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [miquel.raynal@free-electrons.com: rebased and fixed some conflicts] Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-11-30mtd: nand: gpmi: replace _manual_ swap with swap macroGustavo A. R. Silva1-12/+4
Make use of the swap macro and remove unnecessary variables swap. This makes the code easier to read and maintain. This code was detected with the help of Coccinelle. Signed-off-by: Gustavo A. R. Silva <garsilva@embeddedor.com> Acked-by: Han Xu <han.xu@nxp.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-06-01mtd: nand: gpmi: Kill gpmi_nand_exit()Boris Brezillon1-7/+2
The only user of gpmi_nand_exit() is gpmi_nand_remove(). Move its content to the caller. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Reviewed-by: Marek Vasut <marek.vasut@gmail.com> Acked-by: Han Xu <han.xu@nxp.com>
2017-06-01mtd: nand: gpmi: Fix gpmi_nand_init() error pathBoris Brezillon1-4/+6
The GPMI driver is wrongly assuming that nand_release() can safely be called on an uninitialized/unregistered NAND device. Add a new err_nand_cleanup label in the error path and only execute if nand_scan_tail() succeeded. Note that we now call nand_cleanup() instead of nand_release() (nand_release() is actually grouping the mtd_device_unregister() and nand_cleanup() in one call) because there's no point in trying to unregister a device that has never been registered. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Reviewed-by: Marek Vasut <marek.vasut@gmail.com> Acked-by: Han Xu <han.xu@nxp.com> Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
2017-06-01mtd: nand: gpmi: add i.MX 7 SoC supportStefan Agner1-0/+15
Add support for i.MX 7 SoC. The i.MX 7 has a slightly different clock architecture requiring only two clocks to be referenced. The IP is slightly different compared to i.MX 6, but currently none of this differences are in use, therefore reuse GPMI_IS_MX6. Signed-off-by: Stefan Agner <stefan@agner.ch> Reviewed-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-06-01mtd: nand: gpmi: unify clock handlingStefan Agner1-23/+18
Add device specific list of clocks required, and handle all clocks in a single for loop. This avoids further code duplication when adding i.MX 7 support. Signed-off-by: Stefan Agner <stefan@agner.ch> Reviewed-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-03-02sched/headers: Prepare for new header dependencies before moving code to ↵Ingo Molnar1-0/+1
<linux/sched/task_stack.h> We are going to split <linux/sched/task_stack.h> out of <linux/sched.h>, which will have to be picked up from other headers and a couple of .c files. Create a trivial placeholder <linux/sched/task_stack.h> file that just maps to <linux/sched.h> to make this patch obviously correct and bisectable. Include the new header in the files that are going to need it. Acked-by: Linus Torvalds <torvalds@linux-foundation.org> Cc: Mike Galbraith <efault@gmx.de> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-kernel@vger.kernel.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
2016-09-23mtd: nand: gpmi: get correct free oob spaceHan Xu1-1/+2
change the way to calculate pagesize to get correct free oob space for legacy_set_geometry function. Signed-off-by: Han Xu <han.xu@nxp.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05gpmi-nand: Handle ECC Errors in erased pagesMarkus Pargmann1-5/+73
ECC is only calculated for written pages. As erased pages are not actively written the ECC is always invalid. For this purpose the Hardware BCH unit is able to check for erased pages and does not raise an ECC error in this case. This behaviour can be influenced using the BCH_MODE register which sets the number of allowed bitflips in an erased page. Unfortunately the unit is not capable of fixing the bitflips in memory. To avoid complete software checks for erased pages, we can simply check buffers with uncorrectable ECC errors because we know that any erased page with errors is uncorrectable by the BCH unit. This patch adds the generic nand_check_erased_ecc_chunk() to gpmi-nand to correct erased pages. To have the valid data in the buffer before using them, this patch moves the read_page_swap_end() call before the ECC status checking for-loop. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> [Squashed patches by Stefan and Boris to check ECC area] Tested-by: Stefan Christ <s.christ@phytec.de> Acked-by: Han xu <han.xu@nxp.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: nand: gpmi: rely on generic DT parsing done in nand_scan_ident()Boris Brezillon1-11/+10
The core now takes care of parsing generic DT properties in nand_scan_ident() when nand_set_flash_node() has been called. Rely on this initialization instead of calling of_get_nand_xxx() manually. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Han xu <han.xu@nxp.com>
2016-05-05mtd: nand: gpmi: switch to mtd_ooblayout_opsBoris Brezillon1-12/+40
Implementing the mtd_ooblayout_ops interface is the new way of exposing ECC/OOB layout to MTD users. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Han Xu <han.xu@nxp.com> Tested-by: Han Xu <han.xu@nxp.com>
2016-04-19mtd: nand: gpmi: use mtd_ooblayout_xxx() helpers where appropriateBoris Brezillon1-4/+5
The mtd_ooblayout_xxx() helper functions have been added to avoid direct accesses to the ecclayout field, and thus ease for future reworks. Use these helpers in all places where the oobfree[] and eccpos[] arrays where directly accessed. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-04-19mtd: gpmi: fix raw_buffer pointer double free issueHan Xu1-0/+1
fix the raw_buffer pointer double free issue found by coverify. CID 18344 (#2 of 2): Double free (USE_AFTER_FREE) 3. double_free: Calling gpmi_alloc_dma_buffer frees pointer this->raw_buffer which has already been freed Signed-off-by: Han Xu <han.xu@nxp.com> Reviewed-by: Richard Weinberger <richard@nod.at> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-01-23mtd: nand: gpmi: may use minimum required ecc for 744 oobsize NANDHan Xu1-12/+14
By default NAND driver will choose the highest ecc strength that oob could contain, in this case, for some 8K+744 NAND flash, the ecc strength will be up to 52bit, which beyonds the i.MX6QDL BCH capability (40bit). This patch allows the NAND driver try to use minimum required ecc strength if it failed to use the highest ecc, even without explicitly claiming "fsl,use-minimum-ecc" in dts. Signed-off-by: Han Xu <b45815@freescale.com> Acked-by: Huang Shijie <shijie.huang@arm.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-01-23mtd: nand: gpmi: add gpmi dsm supend/resume supportHuang Shijie1-1/+46
i.MX6SX supports deep sleep mode(DSM) that may turn off GPMI/BCH power during suspend, add gpmi nand suspend/resume function to release DMA channel in suspend function and re-init GPMI/BCH controller during resume function. Although it is not necessary to restore GPMI/BCH registers value for i.MX6QDL, the code doesn't distinguish different platforms to keep the code simple. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Han Xu <han.xu@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-01-07mtd: nand: make use of nand_set/get_controller_data() helpersBoris BREZILLON1-14/+14
New helpers have been added to avoid directly accessing chip->field. Use them where appropriate. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [Brian: fixed a few rebase conflicts] Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-12-18mtd: nand: remove useless mtd->priv = chip assignmentsBoris BREZILLON1-1/+0
mtd_to_nand() now uses the container_of() approach to transform an mtd_info pointer into a nand_chip one. Drop useless mtd->priv assignments from NAND controller drivers. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-12-18mtd: nand: gpmi: use the mtd instance embedded in struct nand_chipBoris BREZILLON1-12/+11
struct nand_chip now embeds an mtd device. Make use of this mtd instance. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-12-08mtd: nand: make use of mtd_to_nand() in NAND driversBoris BREZILLON1-9/+9
mtd_to_nand() was recently introduced to avoid direct accesses to the mtd->priv field. Update all NAND drivers to use it. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-11-11mtd: nand: drop unnecessary partition parser dataBrian Norris1-3/+2
All of these drivers set up a parser data struct just to communicate DT partition data. This field has been deprecated and is instead supported by telling nand_scan_ident() about the 'flash_node'. This patch: * sets chip->flash_node for those drivers that didn't already (but used OF partitioning) * drops the parser data * switches to the simpler mtd_device_register() where possible, now that we've eliminated one of the auxiliary parameters Now that we've assigned chip->flash_node for these drivers, we can probably rely on nand_dt_init() to do more of the DT parsing for us, but for now, I don't want to fiddle with each of these drivers. The parsing is done in duplicate for now on some drivers. I don't think this should break things. (Famous last words.) (Rolled in some changes by Boris Brezillon) Signed-off-by: Brian Norris <computersforpeace@gmail.com> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2015-10-13mtd: nand: pass page number to ecc->write_xxx() methodsBoris BREZILLON1-4/+4
The ->read_xxx() methods are all passed the page number the NAND controller is supposed to read, but ->write_xxx() do not have such a parameter. This is a problem if we want to properly implement data scrambling/randomization in order to mitigate MLC sensibility to repeated pattern: to prevent bitflips in adjacent pages in the same block we need to avoid repeating the same pattern at the same offset in those pages, hence the randomizer/scrambler engine need to be passed the page value in order to adapt its seed accordingly. Moreover, adding the page parameter to the ->write_xxx() methods add some consistency to the current API. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> CC: Josh Wu <josh.wu@atmel.com> CC: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> CC: Maxime Ripard <maxime.ripard@free-electrons.com> CC: Greg Kroah-Hartman <gregkh@linuxfoundation.org> CC: Huang Shijie <shijie.huang@arm.com> CC: Stefan Agner <stefan@agner.ch> CC: devel@driverdev.osuosl.org CC: linux-arm-kernel@lists.infradead.org CC: linux-kernel@vger.kernel.org Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-10-13mtd: nand: gpmi-nand: show parent device in sysfsFrans Klaver1-1/+1
Fix a bug where parent device symlinks aren't shown in sysfs. While at it, make use of the default owner set by mtdcore. Signed-off-by: Frans Klaver <fransklaver@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-03-30mtd: nand: gpmi: Check for scan_bbt() errorFabio Estevam1-1/+3
In case of scan_bbt() failure, we should better propagate it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Huang Shijie <shijie.huang@intel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-03-30mtd: nand: gpmi: fixup return type of wait_for_completion_timeoutNicholas Mc Guire1-6/+6
return type of wait_for_completion_timeout is unsigned long not int. The return variable is renamed to reflect its use and the type adjusted to unsigned long. Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Huang Shijie <shijie.huang@intel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-12-22mtd: nand: gpmi: remove deprecated commentBoris BREZILLON1-8/+0
Now that we have raw functions properly implemented we can remove this FIXME. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Huang Shijie <shijie.huang@intel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-12-22mtd: gpmi: Remove noisy error messageFabio Estevam1-1/+0
mx28evk board has a socket for NAND flash that comes with no NAND flash populated, and then we get this message on every boot: [ 1.657603] gpmi-nand 8000c000.gpmi-nand: driver registration failed: -19 which is not very helpful, so get rid of this error message. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-12-01mtd: nand: gpmi: add raw oob access functionsBoris BREZILLON1-0/+18
Implement raw OOB access functions to retrieve OOB bytes when accessing the NAND in raw mode. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Tested-by: Huang Shijie <shijie8@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-12-01mtd: nand: gpmi: add proper raw access supportBoris BREZILLON1-0/+183
Several MTD users (either in user or kernel space) expect a valid raw access support to NAND chip devices. This is particularly true for testing tools which are often touching the data stored in a NAND chip in raw mode to artificially generate errors. The GPMI drivers do not implemenent raw access functions, and thus rely on default HW_ECC scheme implementation. The default implementation consider the data and OOB area as properly separated in their respective NAND section, which is not true for the GPMI controller. In this driver/controller some OOB data are stored at the beginning of the NAND data area (these data are called metadata in the driver), then ECC bytes are interleaved with data chunk (which is similar to the HW_ECC_SYNDROME scheme), and eventually the remaining bytes are used as OOB data. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Tested-by: Huang Shijie <shijie8@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-07-27mtd: gpmi: make blockmark swapping optionalLothar Waßmann1-19/+32
With a flash-based BBT there is no reason to move the Factory Bad Block Marker from the data area buffer (to where it is mapped by the GPMI NAND controller) to the OOB buffer. Thus, make this feature configurable via DT. This is required for the Ka-Ro electronics platforms. In the original code 'this->swap_block_mark' was synonymous with '!GPMI_IS_MX23()', so use the latter at the relevant places. Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Acked-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-07-27mtd: gpmi: remove line breaks from error messages and improve wordingLothar Waßmann1-5/+5
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-07-27mtd: gpmi: remove useless (void *) type casts and spaces between type casts ↵Lothar Waßmann1-5/+5
and variables Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-05-28mtd: gpmi: add gpmi support for imx6sxHuang Shijie1-5/+14
The gpmi's IP for imx6sx is nearly the same as the gpmi's IP for imx6q, except the following two new features: (1) the new BCH contoller has 62-BIT correcting ECC strength (The BCH for imx6q only has 40-BIT ECC strength). (2) add the hardware Randomizer support. This patch does the follow changes: (1) add a new macro GPMI_IS_MX6SX to represent the imx6sx's gpmi. (2) add a new macro GPMI_IS_MX6. We use this macro to initialize the same registers for both imx6sx and imx6q, and so on. (3) add a new gpmi_devdata instance, the gpmi_devdata_imx6sx, for imx6sx. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-04-16mtd: gpmi: add gpmi_devdata{} to simplify the codeHuang Shijie1-25/+28
More and more chips use the GPMI controller, but these chips may use different version of the IPs for GPMI and BCH. Different IPs have different features, such as the BCH's maximum ECC strength: imx23/imx28 -- the BCH's maximum ECC strength is 20 imx6q -- the BCH's maximum ECC strength is 40 imx6sx -- the BCH's maximum ECC strength is 62 This patch does the following things: [1] add a new data structure, gpmi_devdata{}, to store the information for each IP. Besides the IP version, we store the following information: <1> BCH's maximum ECC strength. <2> the maximum chain delay in ns used by the EDO mode. but we may add more information in future. [2] add the gpmi_devdata_imx{23|28|6q} to replace the gpmi_ids. [3] simplify the code by using the ECC strength from gpmi_devdata, such as gpmi_check_ecc() and legacy_set_geometry(); [4] use the maximum chain delay to initialize the EDO mode, see gpmi_compute_edo_timing(). [5] rewrite the macros, such GPMI_IS_MX{23|28|6Q}. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-10mtd: gpmi: add subpage read supportHuang Shijie1-0/+96
1) Why add the subpage read support? The page size of the nand chip becomes larger and larger, the imx6 has to supports the 16K page or even bigger page. But sometimes, the upper layer only needs a small part of the page, such as 512 bytes or less. For example, ubiattach may only read 64 bytes per page. 2) We only enable the subpage read support when it meets the conditions: <1> the chip is imx6 (or later chips) which can supports large nand page. <2> the size of ECC parity is byte aligned. If the size of ECC parity is not byte aligned, the calling of NAND_CMD_RNDOUT will fail. 3) What does this patch do? This patch will fake a virtual small page for the subpage read, and call the gpmi_ecc_read_page() to do the real work. In order to fake a virtual small page, the patch changes the BCH registers and the bch_geometry{}. After the subpage read finished, we will restore them back. 4) Performace: 4.1) Tested with Toshiba TC58NVG2S0F(4096 + 224) with the following command: #ubiattach /dev/ubi_ctrl -m 4 The detail information of /dev/mtd4 shows below: -------------------------------------------------------------- #mtdinfo /dev/mtd4 mtd4 Name: test Type: nand Eraseblock size: 262144 bytes, 256.0 KiB Amount of eraseblocks: 1856 (486539264 bytes, 464.0 MiB) Minimum input/output unit size: 4096 bytes Sub-page size: 4096 bytes OOB size: 224 bytes Character device major/minor: 90:8 Bad blocks are allowed: true Device is writable: true -------------------------------------------------------------- 4.2) Before this patch: -------------------------------------------------------------- [ 94.530495] UBI: attaching mtd4 to ubi0 [ 98.928850] UBI: scanning is finished [ 98.953594] UBI: attached mtd4 (name "test", size 464 MiB) to ubi0 [ 98.958562] UBI: PEB size: 262144 bytes (256 KiB), LEB size: 253952 bytes [ 98.964076] UBI: min./max. I/O unit sizes: 4096/4096, sub-page size 4096 [ 98.969518] UBI: VID header offset: 4096 (aligned 4096), data offset: 8192 [ 98.975128] UBI: good PEBs: 1856, bad PEBs: 0, corrupted PEBs: 0 [ 98.979843] UBI: user volume: 1, internal volumes: 1, max. volumes count: 128 [ 98.985878] UBI: max/mean erase counter: 2/1, WL threshold: 4096, image sequence number: 2024916145 [ 98.993635] UBI: available PEBs: 0, total reserved PEBs: 1856, PEBs reserved for bad PEB handling: 40 [ 99.001807] UBI: background thread "ubi_bgt0d" started, PID 831 -------------------------------------------------------------- The attach time is about 98.9 - 94.5 = 4.4s 4.3) After this patch: -------------------------------------------------------------- [ 286.464906] UBI: attaching mtd4 to ubi0 [ 289.186129] UBI: scanning is finished [ 289.211416] UBI: attached mtd4 (name "test", size 464 MiB) to ubi0 [ 289.216360] UBI: PEB size: 262144 bytes (256 KiB), LEB size: 253952 bytes [ 289.221858] UBI: min./max. I/O unit sizes: 4096/4096, sub-page size 4096 [ 289.227293] UBI: VID header offset: 4096 (aligned 4096), data offset: 8192 [ 289.232878] UBI: good PEBs: 1856, bad PEBs: 0, corrupted PEBs: 0 [ 289.237628] UBI: user volume: 0, internal volumes: 1, max. volumes count: 128 [ 289.243553] UBI: max/mean erase counter: 1/1, WL threshold: 4096, image sequence number: 2024916145 [ 289.251348] UBI: available PEBs: 1812, total reserved PEBs: 44, PEBs reserved for bad PEB handling: 40 [ 289.259417] UBI: background thread "ubi_bgt0d" started, PID 847 -------------------------------------------------------------- The attach time is about 289.18 - 286.46 = 2.7s 4.4) The conclusion: We achieve (4.4 - 2.7) / 4.4 = 38.6% faster in the ubiattach. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-10mtd: gpmi: do not use the mtd->writesizeHuang Shijie1-3/+3
The nfc_geo->payload_size is equal to the mtd->writesize now, use the nfc_geo->payload_size to replace the mtd->writesize. This patch makes preparation for the gpmi's subpage read support. In the subpage support, the nfc_geo->payload_size maybe smaller then the mtd->writesize. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-01-27mtd: gpmi: add sanity check when mapping DMA for read_buf/write_bufHuang Shijie1-14/+17
The buffer pointer passed from the upper layer may points to a buffer in the stack or a buffer allocated by vmalloc, and etc.. This patch adds more sanity check to this buffer. After this patch, if we meet a buffer which is allocated by vmalloc or a buffer in the stack, we will use our own DMA buffer @data_buffer_dma to do the DMA operations. If the buffer is not the cases above, we will map it for DMA operations directly. Signed-off-by: Huang Shijie <shijie8@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-01-27mtd: gpmi: allocate a proper buffer for non ECC read/writeHuang Shijie1-2/+11
The @data_buffer_dma buffer is used for non ECC read/write. Currently, the length of the buffer is PAGE_SIZE, but the NAND chip may has 8K page or 16K page. So we have to extend it for the large page NAND chips. The gpmi_alloc_dma_buffer will be called twice. The first time is to allocate a temporary buffer for scanning the NAND chip; The second time is to allocate a buffer to store the real page content. This patch allocates a buffer of PAGE_SIZE size for scanning the NAND chip when gpmi_alloc_dma_buffer is called the first time, and allocates a buffer of the real NAND page size for the second time gpmi_alloc_dma_buffer is called. Signed-off-by: Huang Shijie <shijie8@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-01-03mtd: gpmi: change pr_debug to dev_dbgHuang Shijie1-8/+5
change all the pr_debug to dev_dbg. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-01-03mtd: gpmi: change pr_err to dev_errHuang Shijie1-23/+21
There are pr_err and dev_err in the gpmi driver now. It makes people confused. This patch changes all the pr_err to dev_err except the one in the gpmi_reset_block(). We also remove the unnecessary print for OOM message. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-01-03mtd: gpmi: use devm_request_irqHuang Shijie1-22/+5
Use devm_request_irq to simplify the code. Also remove the unused fields of structure resources{}. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-01-03mtd: gpmi: use devm_ioremap_resourceHuang Shijie1-23/+3
Use the devm_ioremap_resource to simplify the code. [Note: as a side effect, this adds a missing call to request_memory().] Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-01-03mtd: gpmi: rename the functions from gpmi_nfc_* to gpmi_nand_*Huang Shijie1-5/+5
The gpmi_nfc_* is the legacy name. In order to avoid the confusion, The patch renames the gpmi_nfc_* functions to gpmi_nand_*. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-01-03mtd: gpmi: remove the unused lineHuang Shijie1-1/+0
We do not use the chip->oob_poi in the mx23_write_transcription_stamp. So remove the unused line. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-01-03mtd: gpmi: delete the gpmi_pre_bbt_scanHuang Shijie1-15/+5
We do not scan the BBT after we call the gpmi_pre_bbt_scan, so it has lost the meaning of existence. This patch merges this function into gpmi_init_last, and delete it. This patch does not change any logic. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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