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2017-04-27mfd: axp20x: Support AXP803 variantIcenowy Zheng2-0/+80
AXP803 is a new PMIC chip produced by X-Powers, usually paired with A64 via RSB bus. The PMIC itself is like AXP288, but with RSB support and dedicated VBUS and ACIN. Add support for it in the axp20x mfd driver. Currently only power key function is supported. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: intel_soc_pmic_core: Fix unchecked return valuePan Bian1-0/+3
unction devm_regmap_init_i2c() returns an ERR_PTR on errors, and its return value should be checked before it is dereferenced. However, in function intel_soc_pmic_i2c_probe(), the return value of function devm_regmap_init_i2c() is used without validation. This patch fixes it. Signed-off-by: Pan Bian <bianpan2016@163.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: menelaus: Remove obsolete local_irq_disable() and local_irq_enable()Martin Kepplinger1-4/+0
Since commit e6229bec25be ("rtc: make rtc_update_irq callable with irqs enabled") rtc_update_irq() is callable with irqs enabled, see the rtc drivers. So update this accordingly. Signed-off-by: Martin Kepplinger <martin.kepplinger@ginzinger.com> Acked-by: Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: omap-usb-tll: Configure ULPIAUTOIDLETony Lindgren1-2/+3
The idle mode needs to be only disabled for UTMIAUTOIDLE while ULPIAUTOIDLE can be enabled. This matches the TLL_CHANNEL_CONF_i register configuration for ehci-tll in the Motorola Linux kernel tree for Wrigley 3G LTE modem on droid 4 and the modem still stays responsive. Signed-off-by: Tony Lindgren <tony@atomide.com> Acked-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: omap-usb-tll: Fix inverted bit use for USB TLL modeTony Lindgren1-1/+1
Commit 16fa3dc75c22 ("mfd: omap-usb-tll: HOST TLL platform driver") added support for USB TLL, but uses OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF bit the wrong way. The comments in the code are correct, but the inverted use of OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF causes the register to be enabled instead of disabled unlike what the comments say. Without this change the Wrigley 3G LTE modem on droid 4 EHCI bus can be only pinged few times before it stops responding. Fixes: 16fa3dc75c22 ("mfd: omap-usb-tll: HOST TLL platform driver") Signed-off-by: Tony Lindgren <tony@atomide.com> Acked-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: palmas: Fixed spelling mistake in error messageWillis Monroe1-1/+1
Fixed a small spelling mistake ("updat" -> "update") in an error message. Signed-off-by: Willis Monroe <willismonroe@gmail.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: lpc_ich: Add support for Intel Gemini Lake SoCMika Westerberg1-0/+6
Like Intel Apollo Lake, Gemini Lake exposes the serial SPI flash device BAR through hidden P2SB PCI device. We use the same mechanism than Apollo Lake to read the BAR and pass it to the driver. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: hi655x: Add the clock cell to provide WiFi and BluetoothDaniel Lezcano1-1/+2
The hi655x is a PMIC with regulator but also provides a clock for the WiFi and the bluetooth which is missing in the current implementation. Add the clock cell so it can be used in the next patch via the dts. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: intel_soc_pmic: Fix a mess with compilation unitsAndy Shevchenko2-3/+14
Crystal Cove and Whiskey Cove are two different PMICs which are installed on Intel Atom SoC based platforms. Moreover there are two independent drivers that by some reason were supposed (*) to get into one kernel module. Fix the mess by clarifying Kconfig option for Crystal Cove and split Whiskey Cove out of it. (*) It looks like the configuration was never tested with INTEL_SOC_PMIC=n. The line in Makefile is actually wrong. Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net> (supporter:ACPI) Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: exynos-lpass: Add runtime PM supportMarek Szyprowski1-2/+11
Convert exisitng lpass-suspend/resume callbacks into runtime PM callbacks. This way Exynos LPASS driver will be ready for use with power domains enabled. LPASS will be runtime resumed/suspended as a result of its child devices runtime PM transitions. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: exynos-lpass: Add missing remove() functionMarek Szyprowski1-0/+11
Disable device on driver remove and release allocated regmap. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Acked-for-MFD-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: exynos-lpass: Add support for clocksMarek Szyprowski1-0/+10
Exynos LPASS requires some clocks to be enabled to make any access to its registers. This patch adds code for handling such clocks. For current set of registers it is enough to keep sfr0_ctrl clock enabled. Till now it worked only because those clocks were enabled by bootloader and driver probe() happened before they were disabled by clock core because of lack of users. Handling those clocks is also needed to make it possible to enable support for audio power domain. This patch requires adding sfr0_ctrl clock to device tree. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Acked-by: Rob Herring <robh@kernel.org> Acked-for-MFD-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: exynos-lpass: Remove pad retention controlMarek Szyprowski1-16/+0
Pad retention should be controlled from pin control driver, so remove it from Exynos LPASS driver. After this change, no more access to PMU regmap is needed, so remove also the code for handling PMU regmap. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Acked-by: Rob Herring <robh@kernel.org> Acked-for-MFD-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: cpcap: Fix bad use of IRQ sense registerTony Lindgren1-1/+0
The cpcap INTS registers are for getting the value of the line, not for configuring the type. Fixes: 56e1d40d3bea ("mfd: cpcap: Add minimal support") Reviewed-By: Sebastian Reichel <sre@kernel.org> Tested-by: Sebastian Reichel <sre@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: cpcap: Use ack_invert interruptsTony Lindgren1-0/+3
We should use ack_invert as the int_read_and_clear() in the Motorola kernel tree does "ireg_val & ~mreg_val" before writing to the mask register. Fixes: 56e1d40d3bea ("mfd: cpcap: Add minimal support") Tested-by: Sebastian Reichel <sre@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: cpcap: Fix interrupt to use level interruptTony Lindgren1-1/+1
I made a mistake assuming the device tree configuration for interrupt triggering was somehow passed to the SPI device but it's not. In the Motorola Linux kernel tree CPCAP PMIC is configured as a rising edge triggered interrupt, but then then it's interrupt handler keeps looping until the GPIO line goes down. So the CPCAP interrupt is clearly a level interrupt and not an edge interrupt. Earlier when I tried to configure it as level interrupt using the device tree, I did not account that the triggering only gets passed to the SPI core and it also needs to be specified in the CPCAP driver when we do devm_regmap_add_irq_chip(). Fixes: 56e1d40d3bea ("mfd: cpcap: Add minimal support") Signed-off-by: Tony Lindgren <tony@atomide.com> Acked-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: axp20x: Add MFD cells for AXP20X and AXP22X battery driverQuentin Schulz1-0/+9
The X-Powers AXP20X and AXP22X PMICs can have a battery as power supply. This patch adds the AXP20X/AXP22X battery driver to the MFD cells of the AXP209, AXP221 and AXP223 MFD. Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: Add support for DA9061Steve Twiss2-19/+413
MFD support for DA9061 is provided as part of the DA9062 device driver. The registers header file adds two new chip variant IDs defined in DA9061 and DA9062 hardware. The core header file adds new software enumerations for listing the valid DA9061 IRQs and a da9062_compatible_types enumeration for distinguishing between DA9061/62 devices in software. The core source code adds a new .compatible of_device_id entry. This is extended from DA9062 to support both "dlg,da9061" and "dlg,da9062". The .data entry now holds a reference to the enumerated device type. A new regmap_irq_chip model is added for DA9061 and this supports the new list of regmap_irq entries. A new mfd_cell da9061_devs[] array lists the new sub system components for DA9061. Support is added for a new DA9061 regmap_config which lists the correct readable, writable and volatile ranges for this chip. The probe function uses the device tree compatible string to switch on the da9062_compatible_types and configure the correct mfd cells, irq chip and regmap config. Kconfig is updated to reflect support for DA9061 and DA9062 PMICs. Signed-off-by: Steve Twiss <stwiss.opensource@diasemi.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: stmpe: Fix bit clearing on STMPE1600Hugues Fruchet1-0/+2
GPIO bits clearing on pins assigned to STMPE1600 had no effects due to missing "clear registers" settings within stmpe1600_regs[]. STMPE1600 does not have dedicated "clear registers", but single "set/clear registers", hence stmpe1600_regs[] "clear registers" (STMPE_IDX_GPCR_XXX) must be set to same value as "set registers" (STMPE_IDX_GPSR_XXX), ie STMPE1600_REG_GPSR_XXX. Signed-off-by: Hugues Fruchet <hugues.fruchet@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: bxtwc: Remove unnecessary i2c_addr checks in ipc callsKuppuswamy Sathyanarayanan1-12/+10
In the following code block, BXTWC_DEVICE1_ADDR value is already fixed and hence there no need to check for if (!i2c_addr) in every ipc read/write calls. Even if this check is required it can be moved to probe function. i2c_addr = BXTWC_DEVICE1_ADDR; if (!i2c_addr) { dev_err(pmic->dev, "I2C address not set\n"); return -EINVAL; } This patch remove this extra check and adds some NULL parameter checks. Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: syscon: atmel-smc: Add new helpers to ease SMC regs manipulationBoris Brezillon3-0/+319
These new helpers + macro definitions are meant to replace the old ones which are unpractical to use. Note that the macros and function prefixes have been intentionally changed to ATMEL_[H]SMC_XX and atmel_[h]smc_ to reflect the fact that this IP is also embedded in avr32 SoCs (and not only in at91 ones). Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: ipaq-micro: Delete redundant return value check of platform_get_resource()Belen Sarabia1-3/+0
devm_ioremap_resource does checks on the resource. No need to duplicate this in the driver. Signed-off-by: Belén Sarabia <belensarabia@gmail.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: palmas: Reset the POWERHOLD mux during power offKeerthy1-0/+14
POWERHOLD signal has higher priority over the DEV_ON bit. So power off will not happen if the POWERHOLD is held high. Hence reset the MUX to GPIO_7 mode to release the POWERHOLD and the DEV_ON bit to take effect to power off the PMIC. PMIC Power off happens in dire situations like thermal shutdown so irrespective of the POWERHOLD setting go ahead and turn off the powerhold. Currently poweroff is broken on boards that have powerhold enabled. This fixes poweroff on those boards. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: tc6393xb: Make use of raw_spinlock variantsJulia Cartwright1-26/+26
The tc6393xb mfd driver currently implements an irq_chip for handling interrupts; due to how irq_chip handling is done, it's necessary for the irq_chip methods to be invoked from hardirq context, even on a a real-time kernel. Because the spinlock_t type becomes a "sleeping" spinlock w/ RT kernels, it is not suitable to be used with irq_chips. A quick audit of the operations under the lock reveal that they do only minimal, bounded work, and are therefore safe to do under a raw spinlock. Signed-off-by: Julia Cartwright <julia@ni.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: t7l66xb: Make use of raw_spinlock variantsJulia Cartwright1-10/+10
The t7l66xb mfd driver currently implements an irq_chip for handling interrupts; due to how irq_chip handling is done, it's necessary for the irq_chip methods to be invoked from hardirq context, even on a a real-time kernel. Because the spinlock_t type becomes a "sleeping" spinlock w/ RT kernels, it is not suitable to be used with irq_chips. A quick audit of the operations under the lock reveal that they do only minimal, bounded work, and are therefore safe to do under a raw spinlock. Signed-off-by: Julia Cartwright <julia@ni.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: asic3: Make use of raw_spinlock variantsJulia Cartwright1-28/+28
The asic3 mfd driver currently implements an irq_chip for handling interrupts; due to how irq_chip handling is done, it's necessary for the irq_chip methods to be invoked from hardirq context, even on a a real-time kernel. Because the spinlock_t type becomes a "sleeping" spinlock w/ RT kernels, it is not suitable to be used with irq_chips. A quick audit of the operations under the lock reveal that they do only minimal, bounded work, and are therefore safe to do under a raw spinlock. Signed-off-by: Julia Cartwright <julia@ni.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: intel_soc_pmic_bxtwc: Rename header to follow c-fileAndy Shevchenko1-1/+1
For better understanding of relationship between headers and modules rename: intel_bxtwc.h -> intel_soc_pmic_bxtwc.h While here, remove file name from the file itself. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: intel_soc_pmic_bxtwc: Move inclusion to c-fileAndy Shevchenko1-0/+1
There is no need to include intel_soc_pmic.h into header which doesn't require it. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: arizona: Refactor arizona_poll_regCharles Keepax1-20/+16
Currently, we specify the timeout in terms of the number of polls but it is more clear from a user of the functions perspective to specify the timeout directly in milliseconds, as such update the function to these new semantics. Additionally, arizona_poll_reg essentially hard-codes regmap_read_poll_timeout, update the implementation to use regmap_read_poll_timeout. We still keep arizona_poll_reg around as regmap_read_poll_timeout is a macro so rather than expand this for each caller keep it wrapped in arizona_poll_reg. Whilst we are doing this make the timeouts a little more generous as the previous system had a bit more slack as it was done as a delay per iteration of the loop whereas regmap_read_poll_timeout compares ktime's. Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: arizona: Display register addresses in hexCharles Keepax1-2/+2
Register addresses are normally displayed in hex throughout the Arizona driver. Update the arizona_poll_reg function to follow this convention. Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: arizona: Remove duplicate set of ret variableCharles Keepax1-6/+2
arizona_poll_reg already returns ETIMEDOUT if we don't see the expected register changes before the time out, so remove pointless local setting of ETIMEDOUT. Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: Convert remaining uses of pr_warning to pr_warnJoe Perches3-8/+5
To enable eventual removal of pr_warning This makes pr_warn use consistent for drivers/mfd Prior to this patch, there were 4 uses of pr_warning and 9 uses of pr_warn in drivers/mfd Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: mt6397: Align the placement at which the mfd_cell of LED is definedSean Wang1-2/+1
Align the placement as which the mfd_cell of LED is defined as the other members done on the structure. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: axp20x: Add CHRG_CTRL1/2/3 to writeable regs for AXP20X/AXP22XQuentin Schulz1-0/+2
The CHRG_CTRL1 and CHRG_CTRL2 registers are made for controlling different battery charging settings such as the constant current charge value. The AXP22X also have a third register CHRG_CTRL3 which has settings for battery charging too. This adds the CHRG_CTRL1, CHRG_CTRL2 and CHRG_CTRL3 registers to the list of writeable registers for AXP20X and AXP22X PMICs. Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: axp20x: Add AC power supply cells for AXP22X PMICsQuentin Schulz1-0/+10
The X-Powers AXP20X and AXP22X PMICs expose the status of AC power supply. This adds the AC power supply driver to the MFD cells of the AXP22X PMICs. Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-By: Sebastian Reichel <sre@kernel.org> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: axp20x: Add ADC cells for AXP20X and AXP22X PMICsQuentin Schulz1-0/+6
This adds the AXP20X/AXP22x ADCs driver to the mfd cells of the AXP209, AXP221 and AXP223 MFD. Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: axp20x: Correct name of temperature data ADC registersQuentin Schulz1-1/+1
The registers 0x56 and 0x57 of AXP22X PMIC store the value of the internal temperature of the PMIC. This patch modifies the name of these registers from AXP22X_PMIC_ADC_H/L to AXP22X_PMIC_TEMP_H/L so their purpose is clearer. Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: tps65912: Fix variable name for SPI removeAndrew F. Davis1-2/+2
The SPI interface is mostly a copy/paste from the I2C interface with some minor renaming for consistency. "Client" is an I2C specific term that was left in the SPI remove path, rename this here. Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: altr_a10sr: Add Arria10 DevKit Reset ControllerThor Thayer1-0/+4
Add Peripheral PHY Reset Controller to the Arria10 Development Kit System Resource Chip's MFD. Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: intel-lpss: Remove left over variableAndy Shevchenko1-4/+0
After commit 028af5941dd8 ("mfd: intel-lpss: Pass SDA hold time to I2C host controller driver") the driver still has a non-used variable. Remove it here. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: cros ec: spi: Increase wait time to 200msDoug Anderson1-3/+6
This is a sucky change to bump up the time we'll wait for the EC. Why is it sucky? If 200ms for a transfer is a common thing it will have a massively bad impact on keyboard responsiveness. It still seems like a good idea to do this, though, because we have a gas gauge that claims that in an extreme case it could stretch the i2c clock for 144ms. It's not a common case so it shouldn't affect responsiveness, but it can happen. It's much better to have a single slow keyboard response than to start returning errors when we don't have to. In newer EC designs we should probably implement a virtual battery to respond to the kernel to insulate the kernel from these types of issues. Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: Add TI LMU driverMilo Kim3-0/+273
TI LMU (Lighting Management Unit) driver supports lighting devices below. LM3532, LM3631, LM3632, LM3633, LM3695 and LM3697. LMU devices have common features. - I2C interface for accessing device registers - Hardware enable pin control - Backlight brightness control - Notifier for hardware fault monitoring - Regulators for LCD display bias It contains fault monitor, backlight, LED and regulator driver. LMU fault monitor ----------------- LM3633 and LM3697 provide hardware monitoring feature. It enables open or short circuit detection. After monitoring is done, each device should be re-initialized. Notifier is used for this case. Separate patch for 'ti-lmu-fault-monitor' will be sent later. Backlight --------- It's handled by TI LMU backlight consolidated driver and chip dependent data. Separate patchset will be sent later. LED indicator ------------- LM3633 has 6 indicator LEDs. Programmable dimming pattern is also supported. Separate patch for 'leds-lm3633' will be sent later. Regulator --------- LM3631 has 5 regulators for the display bias. LM3632 supports 3 regulators. One consolidated driver enables it. The lm363x regulator driver is already upstreamed. Signed-off-by: Milo Kim <milo.kim@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: axp20x: Add support for dts property "xpowers,master-mode"Rask Ingemann Lambertsen1-8/+13
commit b101829a029a ("mfd: axp20x: Fix AXP806 access errors on cold boot") was intended to fix the case where a board uses an AXP806 in slave mode, but the boot loader leaves it in master mode for lack of AXP806 support. But now the driver breaks on boards where the PMIC is operating in master mode. This patch lets the driver use the new device tree property "xpowers,master-mode" to set the correct operating mode for the board. Fixes: 8824ee857348 ("mfd: axp20x: Add support for AXP806 PMIC") Signed-off-by: Rask Ingemann Lambertsen <rask@formelder.dk> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: intel_soc_pmic_core: Remove unnecessary functionAndy Shevchenko1-25/+1
Since commit 845c877009cf ("i2c / ACPI: Assign IRQ for devices that have GpioInt automatically") I2C core assigns interrupt line to I2C slave devices with regarding to GpioInt() resources. There is no need to repeat this in the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: stm32-timers: Fix max registerFabrice Gasnier1-1/+1
STM32 timers register bank size is 0x400. Fix regmap max_register. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Acked-by: Benjamin Gaignard <benjamin.gaignard@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: rtsx: Convert forgotten dev_info() statement to pcr_dbg()Borislav Petkov1-1/+1
It is a debugging statement so make it be issued only then. No functionality change. Signed-off-by: Borislav Petkov <bp@suse.de> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: twl4030-power: Fix pmic for boards that need vmmc1 on rebootAdam Ford1-0/+1
At least two different omap3630/3730 boards booting from MMC1 fail to reboot if the "ti,twl4030-power-idle-osc-off" or "ti,twl4030-power-idle" compatible flags are set. This patch will keep the vmmc1 powered up during reboot allowing the bootloader to load. Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: stm32-timers: Fix driver removalFabrice Gasnier1-0/+8
Add missing of_platform_depopulate() upon driver removal. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: lpc_ich: Add PCI ID for Intel Cougar Mountain SoCPriyalee Kushwaha1-0/+6
This patches adds the first minimal support to the upstream Linux tree. Signed-off-by: Priyalee Kushwaha <priyalee.kushwaha@intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: cros_ec: Add ACPI GPE handler for LID0 devicesArchana Patni3-4/+118
This patch installs an ACPI GPE handler for LID0 ACPI device to indicate ACPI core that this GPE should stay enabled for lid to work in suspend to idle path. Signed-off-by: Archana Patni <archana.patni@intel.com> Signed-off-by: Thierry Escande <thierry.escande@collabora.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-04 23:35:45 +0000