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path: root/drivers/mfd/rts5249.c
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2015-10-30mfd: rtsx: Simplify function return logicJavier Martinez Canillas1-5/+1
The invoked functions already return zero on success or a negative errno code so there is no need to open code the logic in the caller. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-03-03mfd: rtsx: Using pcr_dbg replace dev_dbgMicky Ching1-2/+2
pcr_dbg is a wrapper of dev_dbg, which can save some code, and help to enable/disable debug message static. Signed-off-by: Micky Ching <micky_ching@realsil.com.cn> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-03-03mfd: rtsx: Add support for rts525AMicky Ching1-0/+103
Add support for new chip rts525A. Signed-off-by: Micky Ching <micky_ching@realsil.com.cn> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-03-03mfd: rtsx: Add support for rts524AMicky Ching1-28/+158
add support for new chip rts524A. Signed-off-by: Micky Ching <micky_ching@realsil.com.cn> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-03-03mfd: rtsx: Remove LCTLR definationMicky Ching1-2/+1
To enable/disable ASPM we should find LINK CONTROL register in PCI config space. All old chip use 0x80 address, but new chip may use another address, so we using pci_find_capability() to get LINK CONTROL address. rtsx_gops.c was removed, we consider to put some common operations to this file, but the actual thing is, only a group of chips are in common ops1, and another group of chips in common ops2, it is hard to decide put which ops into generic ops file. Signed-off-by: Micky Ching <micky_ching@realsil.com.cn> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-03-03mfd: rtsx: Update phy registerMicky Ching1-12/+17
Update some phy register name and value for rts5249, the updated value makes chip more stable on some platform. Signed-off-by: Micky Ching <micky_ching@realsil.com.cn> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-03-03mfd: rtsx: Update driving settingsMicky Ching1-6/+6
update card drive settings, This setting can be used for rts5249 rts524A and rts525A. Signed-off-by: Micky Ching <micky_ching@realsil.com.cn> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-03-03mfd: rtsx: Update PETXCFG addressMicky Ching1-4/+2
PETXCFG is defined at 0xFF03, the old 0xFE49 not used any more. Signed-off-by: Micky Ching <micky_ching@realsil.com.cn> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2014-11-25mfd: rtsx: Fix PM suspend for 5227 & 5249Micky Ching1-0/+4
Fix rts5227&5249 failed send buffer cmd after suspend, PM_CTRL3 should reset before send any buffer cmd after suspend. Otherwise, buffer cmd will failed, this will lead resume fail. Signed-off-by: Micky Ching <micky_ching@realsil.com.cn> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2013-10-23mfd: rtsx: Modify rts5249_optimize_phyWei WANG1-2/+46
In some platforms, specially Thinkpad series, rts5249 won't be initialized properly. So we need adjust some phy parameters to improve the compatibility issue. It is a little different between simulation and real chip. We have no idea about which configuration is better before tape-out. We set default settings according to simulation, but need to tune these parameters after getting the real chip. I can't explain every change in detail here. The below information is just a rough description: PHY_REG_REV: Disable internal clkreq_tx, enable rx_pwst PHY_BPCR: No change, just turn the magic number to macro definitions PHY_PCR: Change OOBS sensitivity, from 60mV to 90mV PHY_RCR2: Control charge-pump current automatically PHY_FLD4: Use TX cmu reference clock PHY_RDR: Change RXDSEL from 30nF to 1.9nF PHY_RCR1: Change the duration between adp_st and asserting cp_en from 0.32 us to 0.64us PHY_FLD3: Adjust internal timers PHY_TUNE: Fine tune the regulator12 output voltage Signed-off-by: Wei WANG <wei_wang@realsil.com.cn> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2013-08-30mfd: mmc: rtsx: Change default tx phaseWei WANG1-0/+2
The default phase can meet most cards' requirement, but it is not the optimal one. In some extreme situation, the rx phase point produced by the following tuning process will drift quite a distance. Before tuning UHS card, this patch will set a more proper initial tx phase point, which is calculated from statistic data, and can achieve a much better tx signal quality. Signed-off-by: Wei WANG <wei_wang@realsil.com.cn> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Chris Ball <cjb@laptop.org> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2013-08-20mfd: rtsx: Copyright modificationsWei WANG1-1/+0
Update copyright date, remove author address and add Roger Tseng. Signed-off-by: Wei WANG <wei_wang@realsil.com.cn> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2013-08-20mfd: rtsx: Configure to enter a deeper power-saving mode in S3Wei WANG1-1/+5
Set a bit to enable rts5227 and rts5249 to enter a deeper internal power-saving mode in S3, and recover it after resuming. Signed-off-by: Wei WANG <wei_wang@realsil.com.cn> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2013-08-20mfd: rtsx: Move some actions from rtsx_pci_init_hw to individual extra_init_hwWei WANG1-0/+2
These actions are individual for each reader model, so should be put in extra_init_hw instead of rtsx_pci_init_hw. Signed-off-by: Wei WANG <wei_wang@realsil.com.cn> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2013-08-20mfd: rtsx: Add shutdown callback in rtsx_pci_driverWei WANG1-0/+11
Some actions to clear power state should be handled in .shutdown callback in rtsx_pci_driver. This patch adopts the following measures to catch this goal: 1. Add a function rtsx_pci_power_off to abstract the common ops in .shutdown and .suspend 2. Add pcr->ops->force_power_down to fulfill the individual action for each reader model Signed-off-by: Wei WANG <wei_wang@realsil.com.cn> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2013-08-20mfd: rtsx: Read vendor setting from config spaceWei WANG1-20/+70
Normally OEMs will set vendor setting to the config space of Realtek card reader in BIOS stage. This patch reads the setting at the first, and configure the internal registers according to it, to improve card reader's compatibility condition. Signed-off-by: Wei WANG <wei_wang@realsil.com.cn> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2013-04-19mfd: rtsx: Support RTS5249Wei WANG1-0/+241
RTS5249 supports SD UHS-II interface. In order to support SD UHS-IIļ¼Œthe definitions of some internal registers of RTS5249 have to be modified and are different from its predecessors. So we need this patch to ensure RTS5249 can work, even SD/MMC stack doesn't support UHS-II interface. Signed-off-by: Wei WANG <wei_wang@realsil.com.cn> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>