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2019-06-05treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 294Thomas Gleixner1-9/+1
Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license 2 as published by the free software foundation this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation this program is distributed in the hope that it [would] be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 9 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190529141901.804956444@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-01-08mfd: lpc_ich: Do not touch SPI-NOR write protection bit on Apollo LakeMika Westerberg1-5/+0
Just to be on the safe side, don't touch the bit. If write access to the flash chip is needed, the BIOS needs to enable it explicitly. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-10-24mfd: lpc_ich: Avoton/Rangeley uses SPI_BYT methodJoakim Tjernlund1-0/+1
Avoton/Rangeley are based on Silvermount micro-architecture, like Bay Trail, and uses the INTEL_SPI_BYT method to drive SPI. Cc: stable@vger.kernel.org Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-09-05mfd: lpc_ich: Do not touch SPI-NOR write protection bit on Haswell/BroadwellMika Westerberg1-10/+0
At least on Lenovo Thinkpad Yoga, the BIOS seems to monitor the SPI-NOR write protection bit and if it is flipped to read/write it assumes the BIOS configuration was changed on next reboot. It then, for unknown reasons, resets the BIOS settings back to default. We can prevent this by just leaving the write protection bit intact and let the SPI-NOR driver know whether the device is writable or not. In case of this particular Lenovo the SPI-NOR flash will be exposed as read-only. Fixes: ff00d7a32a1b ("mfd: lpc_ich: Add support for SPI serial flash host controller") Link: https://bugzilla.kernel.org/show_bug.cgi?id=195951 Reported-by: Abdó Roig-Marange <abdo.roig@gmail.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: lpc_ich: Add support for Intel Gemini Lake SoCMika Westerberg1-0/+6
Like Intel Apollo Lake, Gemini Lake exposes the serial SPI flash device BAR through hidden P2SB PCI device. We use the same mechanism than Apollo Lake to read the BAR and pass it to the driver. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-04-27mfd: lpc_ich: Add PCI ID for Intel Cougar Mountain SoCPriyalee Kushwaha1-0/+6
This patches adds the first minimal support to the upstream Linux tree. Signed-off-by: Priyalee Kushwaha <priyalee.kushwaha@intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-02-13mfd: lpc_ich: Enable watchdog on Intel Apollo Lake PCHTan Jui Nee1-0/+1
Assign iTCO_version which effectively enables watchdog device on Intel Apollo Lake PCH. Signed-off-by: Tan Jui Nee <jui.nee.tan@intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-02-13mfd: lpc_ich: Remove useless comments in core partAndy Shevchenko1-16/+0
First of all, remove stalled references to datasheets. If someone knows the document numbers, it would be added later. Second, remove FSF snail address since it's subject to change. Actual information can be found on FSF site on the internet. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-01-03mfd: lpc_ich: Add support for Intel Apollo Lake SoCMika Westerberg1-0/+39
Intel Apollo Lake SoC exposes serial SPI flash through the LPC device. The SPI flash host controller is not discoverable through PCI config cycles because P2SB (function 0 of the device 13) is hidden by the BIOS. We unhide the device briefly in order to read BAR 0 of the SPI host controller. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-01-03mfd: lpc_ich: Add support for SPI serial flash host controllerMika Westerberg1-0/+92
Many Intel CPUs including Haswell, Broadwell and Baytrail have SPI serial flash host controller as part of the LPC device. This will populate an MFD cell suitable for the SPI host controller driver if we know that the LPC device has one. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2016-11-21mfd: lpc_ich: Use gpio-ich driver for 8-series and 9-series Intel PCH devicesDan Gora1-0/+2
The Intel 8-series and 9-series PCH devices, described by the descriptors LPC_LPT and LPC_9S although codenamed 'lynxpoint' do not use the same GPIO register layout which is used by the gpio-lynxpoint driver. They use the same ICH_V5_GPIO layout as the gpio-ich driver. See: http://www.intel.com/content/www/us/en/chipsets/8-series-chipset-pch-datasheet.html http://www.intel.com/content/www/us/en/chipsets/9-series-chipset-pch-datasheet.html The devices described by "Mobile 4th Generation Intel Core Processor Family I/O" manual use the gpio-lynxpoint driver and are described by the LPC_LPT_LP descriptor. See: http://www.intel.com/content/www/us/en/processors/core/4th-gen-core-family-mobile-i-o-datasheet.html Signed-off-by: Dan Gora <dg@adax.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2016-09-28mfd: lpc_ich: Do not create iTCO watchdog when WDAT table existsMika Westerberg1-0/+4
ACPI WDAT table is the preferred way to use hardware watchdog over the native iTCO_wdt. Windows only uses this table for its hardware watchdog implementation so we should be relatively safe to trust it has been validated by OEMs Prevent iTCO watchdog creation if we detect that there is ACPI WDAT table. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-11-24mfd: lpc_ich: Intel device IDs for PCHAlexandra Yates1-0/+15
Adding Intel codename Lewisburg platform device IDs for PCH. Signed-off-by: Alexandra Yates <alexandra.yates@linux.intel.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-10-30mfd: lpc_ich: Separate device cells for clarityAaron Sierra1-24/+18
The lpc_ich_cells array gives the wrong impression about the relationship between the watchdog and GPIO devices. They are completely distinct devices, so this patch separates the array into distinct mfd_cell structs per device. A side effect of removing the array, is that the lpc_cells enum is no longer needed. Signed-off-by: Aaron Sierra <asierra@xes-inc.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-08-11mfd: watchdog: iTCO_wdt: Expose watchdog properties using platform dataMatt Fleming1-3/+29
Intel Sunrisepoint (Skylake PCH) has the iTCO watchdog accessible across the SMBus, unlike previous generations of PCH/ICH where it was on the LPC bus. Because it's on the SMBus, it doesn't make sense to pass around a 'struct lpc_ich_info', and leaking the type of bus into the iTCO watchdog driver is kind of backwards anyway. This change introduces a new 'struct itco_wdt_platform_data' for use inside the iTCO watchdog driver and by the upcoming Intel Sunrisepoint code, which neatly avoids having to include lpc_ich headers in the i801 i2c driver. This change is overdue because lpc_ich_info has already found its way into other TCO watchdog users, notably the intel_pmc_ipc driver where the watchdog actually isn't on the LPC bus as far as I can see. A simple translation layer is provided for converting from the existing 'struct lpc_ich_info' inside the lpc_ich mfd driver. Signed-off-by: Matt Fleming <matt.fleming@intel.com> Acked-by: Darren Hart <dvhart@linux.intel.com> [drivers/x86 refactoring] Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-06-22mfd: lpc_ich: Assign subdevice ids automaticallyMika Westerberg1-4/+4
Using -1 as platform device id means that the platform driver core will not assign any id to the device (the device name will not have id at all). This results problems on systems that have multiple PCHs (Platform Controller HUBs) because all of them also include their own copy of LPC device. All the subsequent device creations will fail because there already exists platform device with the same name. Fix this by passing PLATFORM_DEVID_AUTO as platform device id. This makes the platform device core to allocate new ids automatically. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-04-09mfd: lpc_ich: Sort IDsAndy Shevchenko1-9/+9
The patch sorts IDs in the table for easier maintenance. There is no functional change. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-03-30mfd: lpc_ich: Sort IDsAndy Shevchenko1-86/+86
This patch just sorts IDs in the table for better maintenance. There is no functional change. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2014-09-26mfd: lpc_ich: Add Device IDs for Intel 9 Series PCHJames Ralston1-0/+11
This patch adds the LPC Device IDs for the Intel 9 Series PCH. Signed-off-by: James Ralston <james.d.ralston@intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2014-09-26mfd: lpc_ich: Add PCI ID for Intel BraswellAlan Cox1-0/+6
This is the same as used in Baytrail so add the new PCI ID to the driver's list of supported IDs. Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2014-06-03mfd: lpc_ich: Enable GPIO for Panther PointGuenter Roeck1-0/+1
Panther Point PCH GPIO configuration is similar to V5 PCHs. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2014-03-19mfd: lpc_ich: Add support for Intel Bay Trail SoCPeter Tyser1-0/+6
This patch adds the LPC Controller Device IDs for Watchdog and GPIO for the Intel Bay Trail Atom SoC. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2014-03-19mfd: lpc_ich: Add support for NM10 GPIOPeter Tyser1-0/+1
The NM10's GPIO is compatible with ICH v7 GPIO. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Tested-by: Dan Weinlader <danw@vs-networks.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2014-03-19mfd: lpc_ich: Change Avoton to iTCO v3Peter Tyser1-1/+1
The register layout of the Avoton is compatible with the iTCO v3 register layout. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Tested-by: Rajat Jain <rajatjain@juniper.net> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2014-03-19mfd: lpc_ich: Add support for iTCO v3Peter Tyser1-14/+67
Some newer Atom CPUs, eg Avoton and Bay Trail, use slightly different register layouts for the iTCO than the current v1 and v2 iTCO. Differences from previous iTCO versions include: - The ACPI space is enabled in the "ACPI base address" register instead of the "ACPI control register" - The "no reboot" functionality is set in the "Power Management Configuration" register instead of the "General Control and Status" (GCS) register or PCI configuration space. - The "ACPI Control Register" is not present on v3. The "Power Management Configuration Base Address" register resides at the same address is Avoton/Bay Trail. To differentiate these newer chipsets create a new v3 iTCO version and update the MFD driver to support them. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Tested-by: Rajat Jain <rajatjain@juniper.net> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2014-03-19mfd: lpc_ich: Remove lpc_ich_cfg struct usePeter Tyser1-31/+32
Future chipsets will use different register layouts that don't map cleanly to the lpc_ich_cfg fields. Remove the lpc_ich_cfg struct and add explicit fields to the higher level lpc_ich_priv structure. This change should have no functional impact. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Tested-by: Rajat Jain <rajatjain@juniper.net> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2014-03-19mfd: lpc_ich: Only configure watchdog or GPIO when presentPeter Tyser1-6/+10
Some chipsets don't currently have GPIO support enabled. For these chipsets don't go through the process of initializing the GPIO region. Make the same change for the watchdog initialization for chipsets which may not enable the WDT in the future. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Tested-by: Rajat Jain <rajatjain@juniper.net> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2014-03-19mfd: lpc_ich: Fix ACPI enable bitmaskPeter Tyser1-1/+1
The original bitmask of 0x10 was incorrect and would result in a write to a reserved read-only bit instead of enabling the ACPI I/O region. Update it to the proper value of 0x80. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Tested-by: Rajat Jain <rajatjain@juniper.net> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2014-03-19mfd: lpc_ich: Add support for Intel Avoton GPIOsVincent Donnefort1-0/+1
Signed-off-by: Vincent Donnefort <vdonnefort@gmail.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2014-03-19mfd: Delete non-required instances of include <linux/init.h>Paul Gortmaker1-1/+0
None of these files are actually using any __init type directives and hence don't need to include <linux/init.h>. Most are just a left over from __devinit and __cpuinit removal, or simply due to code getting copied from one driver to the next. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2014-01-21mfd: Remove DEFINE_PCI_DEVICE_TABLE macroJingoo Han1-1/+1
Don't use DEFINE_PCI_DEVICE_TABLE macro, because this macro is not preferred. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2013-11-27mfd: lpc_ich: Fix Wildcat Point info name fieldJames Ralston1-1/+1
Fix a copy paste error from the WPT support initial patch. Signed-off-by: James Ralston <james.d.ralston@intel.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2013-11-04mfd: lpc_ich: Add Device IDs for Intel Wildcat Point-LP PCHJames Ralston1-0/+13
This patch adds the TCO Watchdog Device IDs for the Intel Wildcat Point-LP PCH. Signed-off-by: James Ralston <james.d.ralston@intel.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2013-10-23mfd: lpc_ich: Remove unnecessary pci_set_drvdata()Jingoo Han1-2/+0
The driver core clears the driver data to NULL after device_release or on probe failure. Thus, it is not needed to manually clear the device driver data to NULL. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2013-08-01mfd: lpc_ich: Staticize struct 'lpc_chipset_info'Jingoo Han1-1/+1
'lpc_chipset_info' is used only in this file. Fix the following sparse warning: drivers/mfd/lpc_ich.c:216:21: warning: symbol 'lpc_chipset_info' was not declared. Should it be static? Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2013-06-20mfd: lpc_ich: iTCO_wdt patch for Intel Coleto Creek DeviceIDsSeth Heasley1-0/+7
This patch adds the LPC Controller DeviceIDs for iTCO Watchdog for the Intel Coleto Creek PCH. Signed-off-by: Seth Heasley <seth.heasley@intel.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2013-06-18mfd: lpc_ich: Convert to module_pci_driverLibo Chen1-12/+1
use module_pci_driver instead of init/exit, make code cleaner. Signed-off-by: Libo Chen <libo.chen@huawei.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2013-06-11mfd: lpc_ich: Add support for Intel Avoton SoCJames Ralston1-0/+10
This patch adds the LPC Controller Device IDs for Watchdog and GPIO for Intel Avoton SoC, to the lpc_ich driver. Signed-off-by: James Ralston <james.d.ralston@intel.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2013-02-15mfd: lpc_ich: Use devres API to allocate private dataAaron Sierra1-5/+2
And fix a kzalloc argument inversion bug while converting to devres. Signed-off-by: Aaron Sierra <asierra@xes-inc.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2013-02-14mfd: lpc_ich: Add Device IDs for Intel Wellsburg PCHJames Ralston1-0/+38
This patch adds the Watchdog Timer Device IDs for the Intel Wellsburg PCH Signed-off-by: James Ralston <james.d.ralston@intel.com> Acked-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2013-02-14mfd: lpc_ich: Fix gpio base and control offsetsAaron Sierra1-33/+76
In ICH5 and earlier the GPIOBASE and GPIOCTRL registers are found at offsets 0x58 and 0x5C, respectively. This patch allows GPIO access to properly be enabled (and disabled) for these chipsets. Signed-off-by: Agócs Pál <agocs.pal.86@gmail.com> Signed-off-by: Aaron Sierra <asierra@xes-inc.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2012-12-16Merge tag 'mfd-3.8-1' of ↵Linus Torvalds1-6/+10
git://git.kernel.org/pub/scm/linux/kernel/git/sameo/mfd-2.6 Pull MFS update from Samuel Ortiz: "This is the MFD patch set for the 3.8 merge window. We have several new drivers, most of the time coming with their sub devices drivers: - Austria Microsystem's AS3711 - Nano River's viperboard - TI's TPS80031, AM335x TS/ADC, - Realtek's MMC/memstick card reader - Nokia's retu We also got some notable cleanups and improvements: - tps6586x got converted to IRQ domains. - tps65910 and tps65090 moved to the regmap IRQ API. - STMPE is now Device Tree aware. - A general twl6040 and twl-core cleanup, with moves to the regmap I/O and IRQ APIs and a conversion to the recently added PWM framework. - sta2x11 gained regmap support. Then the rest is mostly tiny cleanups and fixes, among which we have Mark's wm5xxx and wm8xxx patchset." Far amount of annoying but largely trivial conflicts. Many due to __devinit/exit removal, others due to one or two of the new drivers also having come in through another tree. * tag 'mfd-3.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sameo/mfd-2.6: (119 commits) mfd: tps6507x: Convert to devm_kzalloc mfd: stmpe: Update DT support for stmpe driver mfd: wm5102: Add readback of DSP status 3 register mfd: arizona: Log if we fail to create the primary IRQ domain mfd: tps80031: MFD_TPS80031 needs to select REGMAP_IRQ mfd: tps80031: Add terminating entry for tps80031_id_table mfd: sta2x11: Fix potential NULL pointer dereference in __sta2x11_mfd_mask() mfd: wm5102: Add tuning for revision B mfd: arizona: Defer patch initialistation until after first device boot mfd: tps65910: Fix wrong ack_base register mfd: tps65910: Remove unused data mfd: stmpe: Get rid of irq_invert_polarity mfd: ab8500-core: Fix invalid free of devm_ allocated data mfd: wm5102: Mark DSP memory regions as volatile mfd: wm5102: Correct default for LDO1_CONTROL_2 mfd: arizona: Register haptics devices mfd: wm8994: Make current device behaviour the default mfd: tps65090: MFD_TPS65090 needs to select REGMAP_IRQ mfd: Fix stmpe.c build when OF is not enabled mfd: jz4740-adc: Use devm_kzalloc ...
2012-11-28mfd: remove use of __devexitBill Pemberton1-1/+1
CONFIG_HOTPLUG is going away as an option so __devexit is no longer needed. Signed-off-by: Bill Pemberton <wfp5p@virginia.edu> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Peter Tyser <ptyser@xes-inc.com> Cc: Daniel Walker <dwalker@fifo99.com> Cc: Bryan Huntsman <bryanh@codeaurora.org> Acked-by: David Brown <davidb@codeaurora.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-11-28mfd: remove use of __devinitdataBill Pemberton1-1/+1
CONFIG_HOTPLUG is going away as an option so __devinitdata is no longer needed. Signed-off-by: Bill Pemberton <wfp5p@virginia.edu> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Peter Tyser <ptyser@xes-inc.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-11-28mfd: remove use of __devinitBill Pemberton1-7/+7
CONFIG_HOTPLUG is going away as an option so __devinit is no longer needed. Signed-off-by: Bill Pemberton <wfp5p@virginia.edu> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Peter Tyser <ptyser@xes-inc.com> Cc: Daniel Walker <dwalker@fifo99.com> Cc: Bryan Huntsman <bryanh@codeaurora.org> Acked-by: David Brown <davidb@codeaurora.org> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-11-28mfd: remove use of __devexit_pBill Pemberton1-1/+1
CONFIG_HOTPLUG is going away as an option so __devexit_p is no longer needed. Signed-off-by: Bill Pemberton <wfp5p@virginia.edu> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Peter Tyser <ptyser@xes-inc.com> Cc: Daniel Walker <dwalker@fifo99.com> Cc: Bryan Huntsman <bryanh@codeaurora.org> Acked-by: David Brown <davidb@codeaurora.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-11-21mfd: lpc_ich: One uninitialized cell is no errorPaul Bolle1-5/+6
At every boot of an (outdated) laptop lpc_ich prints an error: lpc_ich 0000:00:1f.0: I/O space for GPIO uninitialized But if one looks at lpc_ich's probe function one notices that the code only cares if both lpc_ich_init_wdt() and lpc_ich_init_gpio() fail to add any cells. So stop treating the failure to add a single cell as an error. Those messages can be printed at notice level. And then only warn if no cells were added. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2012-11-21mfd: lpc_ich: Fix resource request for [mem 0x00000000]Peter Hurley1-1/+4
The older southbridges supported by the lpc_ich driver do not provide memory-mapped space of the root complex. The driver correctly avoids computing the iomem address in this case, yet submits a zeroed resource request anyway (via mfd_add_devices()). Remove the iomem resource from the resource array submitted to the mfd core for the older southbridges. Acked-by: Aaron Sierra <asierra@xes-inc.com> Cc: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Peter Hurley <peter@hurleysoftware.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2012-09-16mfd: lpc_ich: Add Device IDs for Intel Lynx Point-LP PCHJames Ralston1-0/+14
This patch adds the Watchdog Timer Device IDs for the Intel Lynx Point-LP PCH. The Device IDs are defined in drivers/mfd/lpc_ich.c Signed-off-by: James Ralston <james.d.ralston@intel.com> Acked-by: Wim Van Sebroeck <wim@iguana.be> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2012-09-14gpio: gpio-ich: Share ownership of GPIO groupsJean Delvare1-2/+27
The ICH chips have their GPIO pins organized in 2 or 3 independent groups of 32 GPIO pins. It can happen that the ACPI BIOS wants to make use of pins in one group, preventing the OS to access these. This does not prevent the OS from accessing the other group(s). This is the case for example on my Asus Z8NA-D6 board. The ACPI BIOS wants to control GPIO 18 (group 1), while I (the OS) need to control GPIO 52 and 53 (group 2) for SMBus multiplexing. So instead of checking for ACPI resource conflict on the whole I/O range, check on a per-group basis, and consider it a success if at least one of the groups is available for the OS to use. Signed-off-by: Jean Delvare <khali@linux-fr.org> Cc: Peter Tyser <ptyser@xes-inc.com> Cc: Aaron Sierra <asierra@xes-inc.com> Cc: Grant Likely <grant.likely@secretlab.ca> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-18 14:49:12 +0000