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2021-11-25memory: mtk-smi: Fix a null dereference for the ostdYong Wu1-1/+1
We add the ostd setting for mt8195. It introduces a KE for the previous SoC which doesn't have ostd setting. This is the log: Unable to handle kernel NULL pointer dereference at virtual address 0000000000000080 ... pc : mtk_smi_larb_config_port_gen2_general+0x64/0x130 lr : mtk_smi_larb_resume+0x54/0x98 ... Call trace: mtk_smi_larb_config_port_gen2_general+0x64/0x130 pm_generic_runtime_resume+0x2c/0x48 __genpd_runtime_resume+0x30/0xa8 genpd_runtime_resume+0x94/0x2c8 __rpm_callback+0x44/0x150 rpm_callback+0x6c/0x78 rpm_resume+0x310/0x558 __pm_runtime_resume+0x3c/0x88 In the code: larbostd = larb->larb_gen->ostd[larb->larbid], if "larb->larb_gen->ostd" is null, the "larbostd" is the offset(e.g. 0x80 above), it's also a valid value, then accessing "larbostd[i]" in the "for" loop will cause the KE above. To avoid this issue, initialize "larbostd" to NULL when the SoC doesn't have ostd setting. Fixes: fe6dd2a4017d ("memory: mtk-smi: mt8195: Add initial setting for smi-larb") Signed-off-by: Yong Wu <yong.wu@mediatek.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20211108082429.15080-1-yong.wu@mediatek.com Link: https://lore.kernel.org/r/20211124085042.9649-3-krzysztof.kozlowski@canonical.com' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-21Merge tag 'memory-controller-drv-5.16-2' of ↵Arnd Bergmann6-14/+371
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers Memory controller drivers for v5.16, part two 1. Convert LPDDR2 bindings to dtschema and extend them with new properties. 2. Tegra 20 EMC: support matching timings by LPDDR2 configuration from devicetree. * tag 'memory-controller-drv-5.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: memory: tegra20-emc: Add runtime dependency on devfreq governor module memory: tegra20-emc: Support matching timings by LPDDR2 configuration memory: Add LPDDR2-info helpers dt-bindings: memory: tegra20: emc: Document new LPDDR2 sub-node dt-bindings: Add vendor prefix for Elpida Memory dt-bindings: memory: lpddr2: Document Elpida B8132B2PB-6D-F dt-bindings: memory: lpddr2: Add revision-id properties dt-bindings: memory: lpddr2: Convert to schema dt-bindings: Relocate DDR bindings Link: https://lore.kernel.org/r/20211021093002.118192-1-krzysztof.kozlowski@canonical.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-21memory: tegra20-emc: Add runtime dependency on devfreq governor moduleDmitry Osipenko1-0/+1
Tegra20 EMC driver uses simple devfreq governor. Add simple devfreq governor to the list of the Tegra20 EMC driver module softdeps to allow userspace initramfs tools like dracut to automatically pull the devfreq module into ramfs image together with the EMC module. Reported-by: Nicolas Chauvet <kwizart@gmail.com> Suggested-by: Nicolas Chauvet <kwizart@gmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Link: https://lore.kernel.org/r/20211019231524.888-1-digetx@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-15memory: tegra20-emc: Support matching timings by LPDDR2 configurationDmitry Osipenko2-14/+186
ASUS Transformer TF101 doesn't provide RAM code and in this case memory timings should be selected based on identity information read out from SDRAM chip. Support matching timings by LPDDR2 configuration. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Link: https://lore.kernel.org/r/20211006224659.21434-10-digetx@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-15memory: Add LPDDR2-info helpersDmitry Osipenko4-0/+184
Add common helpers for reading and parsing standard LPDDR2 configuration properties. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Link: https://lore.kernel.org/r/20211006224659.21434-9-digetx@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-11Merge tag 'memory-controller-drv-5.16' of ↵Arnd Bergmann4-51/+139
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers Memory controller drivers for v5.16 1. Renesas RPC: fix unaligned bus access and QSPI data transfers in manual modes. 2. Renesas RPC: select RESET_CONTROLLER as it is necessary for operation. 3. FSL IFC: fix error paths. 4. Broadcom: allow building as module. * tag 'memory-controller-drv-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: memory: fsl_ifc: fix leak of irq and nand_irq in fsl_ifc_ctrl_probe memory: renesas-rpc-if: RENESAS_RPCIF should select RESET_CONTROLLER memory: brcmstb_dpfe: Allow building Broadcom STB DPFE as module memory: samsung: describe drivers in KConfig memory: renesas-rpc-if: Avoid unaligned bus access for HyperFlash memory: renesas-rpc-if: Correct QSPI data transfer in Manual mode dt-bindings: rpc: renesas-rpc-if: Add support for the R8A779A0 RPC-IF Link: https://lore.kernel.org/r/20211010175836.13302-1-krzysztof.kozlowski@canonical.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-11Merge tag 'memory-controller-drv-mtk-5.16' of ↵Arnd Bergmann1-247/+349
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers Memory controller drivers for v5.14 - Mediatek Add MT8195 support to the Mediatek SMI memory controller driver. This brings also several cleanups and minor enhancements before adding actual new device support. * tag 'memory-controller-drv-mtk-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: MAINTAINERS: Add entry for MediaTek SMI memory: mtk-smi: mt8195: Add initial setting for smi-larb memory: mtk-smi: mt8195: Add initial setting for smi-common memory: mtk-smi: mt8195: Add smi support memory: mtk-smi: Use devm_platform_ioremap_resource memory: mtk-smi: Add clocks for smi-sub-common memory: mtk-smi: Add device link for smi-sub-common memory: mtk-smi: Add error handle for smi_probe memory: mtk-smi: Adjust some code position memory: mtk-smi: Rename smi_gen to smi_type memory: mtk-smi: Use clk_bulk clock ops dt-bindings: memory: mediatek: Add mt8195 smi sub common dt-bindings: memory: mediatek: Add mt8195 smi binding Link: https://lore.kernel.org/r/20211010175836.13302-2-krzysztof.kozlowski@canonical.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-10Merge branch 'for-v5.16/renesas-rpc' into mem-ctrl-nextKrzysztof Kozlowski2-36/+124
2021-10-07memory: fsl_ifc: fix leak of irq and nand_irq in fsl_ifc_ctrl_probeDongliang Mu1-7/+6
The error handling code of fsl_ifc_ctrl_probe is problematic. When fsl_ifc_ctrl_init fails or request_irq of fsl_ifc_ctrl_dev->irq fails, it forgets to free the irq and nand_irq. Meanwhile, if request_irq of fsl_ifc_ctrl_dev->nand_irq fails, it will still free nand_irq even if the request_irq is not successful. Fix this by refactoring the error handling code. Fixes: d2ae2e20fbdd ("driver/memory:Move Freescale IFC driver to a common driver") Signed-off-by: Dongliang Mu <mudongliangabcd@gmail.com> Link: https://lore.kernel.org/r/20210925151434.8170-1-mudongliangabcd@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-07memory: tegra210-emc: replace DEFINE_SIMPLE_ATTRIBUTE withKai Song1-1/+1
fix debugfs_simple_attr.cocci warning: drivers/memory/tegra/tegra210-emc-core.c:1665:0-23: WARNING:tegra210_emc_debug_min_rate_fops should be defined with DEFINE_DEBUGFS_ATTRIBUTE Commit 6fc5f1adf5a1 ("memory: tegra210-emc: replace DEFINE_SIMPLE_ATTRIBUTE with DEFINE_DEBUGFS_ATTRIBUTE") fixed the same warning, but didn't fix all matches in this file at once. Signed-off-by: Kai Song <songkai01@inspur.com> Acked-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20211005043514.9650-1-songkai01@inspur.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-07memory: renesas-rpc-if: RENESAS_RPCIF should select RESET_CONTROLLERGeert Uytterhoeven1-0/+1
The Renesas RPC-IF driver calls devm_reset_control_get_exclusive(), which returns -ENOTSUPP if CONFIG_RESET_CONTROLLER is not enabled. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/e443aa66d146da5646b7ebece8876545b8621063.1633447756.git.geert+renesas@glider.be Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-07memory: tegra186-emc: Fix error return code in tegra186_emc_probe()Yang Yingliang1-0/+1
Return the error code when command fails. Fixes: 13324edbe926 ("memory: tegra186-emc: Handle errors in BPMP response") Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Link: https://lore.kernel.org/r/20210928021545.3774677-1-yangyingliang@huawei.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-09-30memory: brcmstb_dpfe: Allow building Broadcom STB DPFE as moduleFlorian Fainelli1-2/+2
Allow building the Broadcom STB DPFE driver as a module, it is already a platform driver proper with all of the resource releasing device managed. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Markus Mayer <mmayer@broadcom.com> Link: https://lore.kernel.org/r/20210924031459.8911-1-f.fainelli@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-09-28memory: samsung: describe drivers in KConfigKrzysztof Kozlowski1-6/+7
Rephrase the Kconfig option and make it clear it applies only to Samsung SoC. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20210924133406.112174-1-krzysztof.kozlowski@canonical.com
2021-09-28memory: renesas-rpc-if: Avoid unaligned bus access for HyperFlashAndrew Gabbasov1-2/+46
HyperFlash devices in Renesas SoCs use 2-bytes addressing, according to HW manual paragraph 62.3.3 (which officially describes Serial Flash access, but seems to be applicable to HyperFlash too). And 1-byte bus read operations to 2-bytes unaligned addresses in external address space read mode work incorrectly (returns the other byte from the same word). Function memcpy_fromio(), used by the driver to read data from the bus, in ARM64 architecture (to which Renesas cores belong) uses 8-bytes bus accesses for appropriate aligned addresses, and 1-bytes accesses for other addresses. This results in incorrect data read from HyperFlash in unaligned cases. This issue can be reproduced using something like the following commands (where mtd1 is a parition on Hyperflash storage, defined properly in a device tree): [Correct fragment, read from Hyperflash] root@rcar-gen3:~# dd if=/dev/mtd1 of=/tmp/zz bs=32 count=1 root@rcar-gen3:~# hexdump -C /tmp/zz 00000000 f4 03 00 aa f5 03 01 aa f6 03 02 aa f7 03 03 aa |................| 00000010 00 00 80 d2 40 20 18 d5 00 06 81 d2 a0 18 a6 f2 |....@ ..........| 00000020 [Incorrect read of the same fragment: see the difference at offsets 8-11] root@rcar-gen3:~# dd if=/dev/mtd1 of=/tmp/zz bs=12 count=1 root@rcar-gen3:~# hexdump -C /tmp/zz 00000000 f4 03 00 aa f5 03 01 aa 03 03 aa aa |............| 0000000c Fix this issue by creating a local replacement of the copying function, that performs only properly aligned bus accesses, and is used for reading from HyperFlash. Fixes: ca7d8b980b67f ("memory: add Renesas RPC-IF driver") Cc: <stable@vger.kernel.org> Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com> Link: https://lore.kernel.org/r/20210922184830.29147-1-andrew_gabbasov@mentor.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-09-28memory: renesas-rpc-if: Correct QSPI data transfer in Manual modeWolfram Sang1-35/+78
This patch fixes 2 problems: [1] The output warning logs and data loss when performing mount/umount then remount the device with jffs2 format. [2] The access width of SMWDR[0:1]/SMRDR[0:1] register is wrong. This is the sample warning logs when performing mount/umount then remount the device with jffs2 format: jffs2: jffs2_scan_inode_node(): CRC failed on node at 0x031c51d4: Read 0x00034e00, calculated 0xadb272a7 The reason for issue [1] is that the writing data seems to get messed up. Data is only completed when the number of bytes is divisible by 4. If you only have 3 bytes of data left to write, 1 garbage byte is inserted after the end of the write stream. If you only have 2 bytes of data left to write, 2 bytes of '00' are added into the write stream. If you only have 1 byte of data left to write, 2 bytes of '00' are added into the write stream. 1 garbage byte is inserted after the end of the write stream. To solve problem [1], data must be written continuously in serial and the write stream ends when data is out. Following HW manual 62.2.15, access to SMWDR0 register should be in the same size as the transfer size specified in the SPIDE[3:0] bits in the manual mode enable setting register (SMENR). Be sure to access from address 0. So, in 16-bit transfer (SPIDE[3:0]=b'1100), SMWDR0 should be accessed by 16-bit width. Similar to SMWDR1, SMDDR0/1 registers. In current code, SMWDR0 register is accessed by regmap_write() that only set up to do 32-bit width. To solve problem [2], data must be written 16-bit or 8-bit when transferring 1-byte or 2-byte. Fixes: ca7d8b980b67 ("memory: add Renesas RPC-IF driver") Cc: <stable@vger.kernel.org> Signed-off-by: Duc Nguyen <duc.nguyen.ub@renesas.com> [wsa: refactored to use regmap only via reg_read/reg_write] Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20210922091007.5516-1-wsa+renesas@sang-engineering.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-09-24memory: tegra: Make use of the helper function devm_add_action_or_reset()Cai Huoqing1-4/+2
Use devm_add_action_or_reset() instead of devm_add_action() to simplify the error handling. Signed-off-by: Cai Huoqing <caihuoqing@baidu.com> Link: https://lore.kernel.org/r/20210922130002.586-1-caihuoqing@baidu.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-09-22memory: mtk-smi: mt8195: Add initial setting for smi-larbYong Wu1-1/+78
To improve the performance, We add some initial setting for smi larbs. there are two part: 1), Each port has the special ostd(outstanding) value in each larb. 2), Two general settings for each larb. a. THRT_UPDATE: the value in bits[7:4] of 0x24 is not so good. The HW default is 4, and we expect it is 5, thus, add a flag to update it. This is only a DE recommendatory value, not a actual issue. The register name(THRT_CON) means: throttling control, and the field RD_NU_LMT means: Read Non-ultra commands limit. This change means update the Read non-ultra command from 4 to 5 here. b. SW_FLAG: Set 1 to the FLAG register. this is only for helping debug. We could confirm if the larb is reset from this value is 1 or 0. In some SoC, this setting maybe changed dynamically for some special case like 4K, and this initial setting is enough in mt8195. Signed-off-by: Yong Wu <yong.wu@mediatek.com> Link: https://lore.kernel.org/r/20210914113703.31466-13-yong.wu@mediatek.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-09-22memory: mtk-smi: mt8195: Add initial setting for smi-commonYong Wu1-4/+38
To improve the performance, add initial setting for smi-common. some register use some fix setting(suggested from DE). Signed-off-by: Yong Wu <yong.wu@mediatek.com> Link: https://lore.kernel.org/r/20210914113703.31466-12-yong.wu@mediatek.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-09-22memory: mtk-smi: mt8195: Add smi supportYong Wu1-0/+26
MT8195 has two smi-common, their IP are the same. Only the larbs that connect with the smi-common are different. thus the bus_sel are different for the two smi-common. Signed-off-by: Yong Wu <yong.wu@mediatek.com> Reviewed-by: Ikjoon Jang <ikjn@chromium.org> Link: https://lore.kernel.org/r/20210914113703.31466-11-yong.wu@mediatek.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-09-22memory: mtk-smi: Use devm_platform_ioremap_resourceYong Wu1-8/+3
No functional change. Simplify probing code. Signed-off-by: Yong Wu <yong.wu@mediatek.com> Reviewed-by: Ikjoon Jang <ikjn@chromium.org> Link: https://lore.kernel.org/r/20210914113703.31466-10-yong.wu@mediatek.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-09-22memory: mtk-smi: Add clocks for smi-sub-commonYong Wu1-2/+8
SMI sub common only have one output port. thus it has only one gals clocks(gals0). then, smi-sub-common require the three clocks(apb/smi/gals0) in has_gals case. Signed-off-by: Yong Wu <yong.wu@mediatek.com> Link: https://lore.kernel.org/r/20210914113703.31466-9-yong.wu@mediatek.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-09-22memory: mtk-smi: Add device link for smi-sub-commonYong Wu1-24/+51
In mt8195, there are some larbs connect with the smi-sub-common, then connect with smi-common. Before we create device link between smi-larb with smi-common. If we have sub-common, we should use device link the smi-larb and smi-sub-common, then use device link between the smi-sub-common with smi-common. This is for enabling clock/power automatically. Move the device link code to a new interface for reusing. Signed-off-by: Yong Wu <yong.wu@mediatek.com> Reviewed-by: Ikjoon Jang <ikjn@chromium.org> Link: https://lore.kernel.org/r/20210914113703.31466-8-yong.wu@mediatek.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-09-22memory: mtk-smi: Add error handle for smi_probeYong Wu1-1/+9
Add error handle while component_add fail. Signed-off-by: Yong Wu <yong.wu@mediatek.com> Reviewed-by: Ikjoon Jang <ikjn@chromium.org> Link: https://lore.kernel.org/r/20210914113703.31466-7-yong.wu@mediatek.com Fixes: 6ce2c05b2118 ("memory: mtk-smi: Add device-link between smi-larb and smi-common") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-09-22memory: mtk-smi: Adjust some code positionYong Wu1-113/+75
No functional change. Only move the code position to make the code more readable. 1. Put the register smi-common above smi-larb. Prepare to add some others register setting. 2. Put mtk_smi_larb_unbind around larb_bind. 3. Sort the SoC data alphabetically. and put them in one line as the current kernel allow it. Signed-off-by: Yong Wu <yong.wu@mediatek.com> Reviewed-by: Ikjoon Jang <ikjn@chromium.org> Link: https://lore.kernel.org/r/20210914113703.31466-6-yong.wu@mediatek.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-09-22memory: mtk-smi: Rename smi_gen to smi_typeYong Wu1-14/+14
Prepare for adding smi sub common. Only rename from smi_gen to smi_type. No functional change. About the current "smi_gen", we have gen1/gen2 that stand for the generation number for HW. I plan to add a new type(sub_common), then the name "gen" is not proper. Signed-off-by: Yong Wu <yong.wu@mediatek.com> Reviewed-by: Ikjoon Jang <ikjn@chromium.org> Link: https://lore.kernel.org/r/20210914113703.31466-5-yong.wu@mediatek.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-09-22memory: mtk-smi: Use clk_bulk clock opsYong Wu1-88/+55
Use clk_bulk interface instead of the orginal one to simplify the code. For SMI larbs: Require apb/smi clocks while gals is optional. For SMI common: Require apb/smi/gals0/gal1 in has_gals case. Otherwise, also only require apb/smi, No optional clk here. About the "has_gals" flag, for smi larbs, the gals clock also may be optional even this platform support it. thus it always use *_bulk_get_optional, then the flag has_gals is unnecessary. Remove it. The smi_common's has_gals still keep it. Also remove clk fail logs since bulk interface already output fail log. Signed-off-by: Yong Wu <yong.wu@mediatek.com> Link: https://lore.kernel.org/r/20210914113703.31466-4-yong.wu@mediatek.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-09-20memory: tegra186-emc: Handle errors in BPMP responseMikko Perttunen1-0/+4
The return value from tegra_bpmp_transfer indicates the success or failure of the IPC transaction with BPMP. If the transaction succeeded, we also need to check the actual command's result code. Add code to do this. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Link: https://lore.kernel.org/r/20210915085517.1669675-3-mperttunen@nvidia.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-09-20memory: tegra: Remove interconnect state syncing hackDmitry Osipenko1-9/+10
State syncing works properly now, previously the sync callback was never invoked. Apparently it was fixed in drivers core, so let's remove the hack. The state won't be synced until all consumer drivers of devices that reference memory controller in a device-tree are probed, i.e. keeping bandwidth at maximum until both display and devfreq drivers are probed. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Link: https://lore.kernel.org/r/20210912183009.6400-1-digetx@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-09-15memory: tegra210-emc: replace DEFINE_SIMPLE_ATTRIBUTE with ↵Jing Yangyang1-2/+2
DEFINE_DEBUGFS_ATTRIBUTE Fix the following coccicheck warning: drivers/memory/tegra/tegra210-emc-core.c:1665:0-23:WARNING tegra210_emc_debug_min_rate_fops should be defined with DEFINE_DEBUGFS_ATTRIBUTE Signed-off-by: Jing Yangyang <jing.yangyang@zte.com.cn> Link: https://lore.kernel.org/r/20210825063739.70260-1-deng.changcheng@zte.com.cn Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-09-15memory: tegra30-emc: replace DEFINE_SIMPLE_ATTRIBUTE with ↵jing yangyang1-2/+2
DEFINE_DEBUGFS_ATTRIBUTE Fix the following coccicheck warning: drivers/memory/tegra/tegra30-emc.c:1322:0-23:WARNING: tegra_emc_debug_max_rate_fops should be defined with DEFINE_DEBUGFS_ATTRIBUTE Signed-off-by: jing yangyang <jing.yangyang@zte.com.cn> Link: https://lore.kernel.org/r/20210821035223.28282-1-jing.yangyang@zte.com.cn Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-09-15memory: tegra: make the array list static const, makes object smallerColin Ian King1-1/+1
Don't populate the array list on the stack but instead it static const. Makes the object code smaller by 110 bytes: Before: text data bss dec hex filename 37713 21992 64 59769 e979 .../tegra/tegra210-emc-cc-r21021.o After: text data bss dec hex filename 37539 22056 64 59659 e90b .../tegra/tegra210-emc-cc-r21021.o (gcc version 10.3.0) Signed-off-by: Colin Ian King <colin.king@canonical.com> Acked-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20210819133155.10441-1-colin.king@canonical.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-07-29Merge branch 'for-v5.15/omap-gpmc' into for-nextKrzysztof Kozlowski1-73/+118
2021-07-29memory: omap-gpmc: Drop custom PM calls with cpu_pm notifierTony Lindgren1-75/+118
We can now switch over to using cpu_pm instead of custom calls and make the context save and restore functions static. Let's also move the save and restore functions to avoid adding forward declarations for them. And get rid of the static data pointer while at it. Cc: Roger Quadros <rogerq@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20210727101034.32148-2-tony@atomide.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-07-29memory: omap-gpmc: Clear GPMC_CS_CONFIG7 register on restore if unusedTony Lindgren1-0/+2
We want to clear any unused GPMC_CS_CONFIG7 register on restore to ensure unused chip selects are not enabled. Cc: Roger Quadros <rogerq@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20210727101034.32148-1-tony@atomide.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-07-23memory: tegra: fix unused-function warningArnd Bergmann1-0/+2
The tegra186_mc_client_sid_override() is only called from an #ifdef block: drivers/memory/tegra/tegra186.c:74:13: error: 'tegra186_mc_client_sid_override' defined but not used [-Werror=unused-function] 74 | static void tegra186_mc_client_sid_override(struct tegra_mc *mc, | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Add another #ifdef around the called function. Fixes: 393d66fd2cac ("memory: tegra: Implement SID override programming") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Jon Hunter <jonathanh@nvidia.com> Link: https://lore.kernel.org/r/20210722090748.1157470-1-arnd@kernel.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-16Merge tag 'memory-controller-drv-tegra-5.14-2' of ↵Olof Johansson15-3879/+5027
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers Memory controller drivers for v5.14 - Tegra SoC, part two Second set of changes for Tegra SoC memory controller drivers, containing patchset from Thierry Reding: "The goal here is to avoid early identity mappings altogether and instead postpone the need for the identity mappings to when devices are attached to the SMMU. This works by making the SMMU driver coordinate with the memory controller driver on when to start enforcing SMMU translations. This makes Tegra behave in a more standard way and pushes the code to deal with the Tegra-specific programming into the NVIDIA SMMU implementation." This pulls a dependency from Will Deacon (ARM SMMU driver) and contains further ARM SMMU driver patches to resolve complex dependencies between different patchsets. The pull from Will contains only one patch ("Implement ->probe_finalize()"). Further work in Will's tree might depend on this patch, therefore patch was applied there. On the other hand, this ("Implement ->probe_finalize()") patch is also a dependency for ARM SMMU driver changes for Tegra. These changes, bringing seamless transition from the firmware framebuffer to the OS framebuffer, depend on earlier Tegra memory controller driver patches. * tag 'memory-controller-drv-tegra-5.14-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: (37 commits) iommu/arm-smmu: Use Tegra implementation on Tegra186 iommu/arm-smmu: tegra: Implement SID override programming iommu/arm-smmu: tegra: Detect number of instances at runtime dt-bindings: arm-smmu: Add Tegra186 compatible string memory: tegra: Delete dead debugfs checking code iommu/arm-smmu: Implement ->probe_finalize() memory: tegra: Implement SID override programming memory: tegra: Split Tegra194 data into separate file memory: tegra: Add memory client IDs to tables memory: tegra: Unify drivers memory: tegra: Only initialize reset controller if available memory: tegra: Make IRQ support opitonal memory: tegra: Parameterize interrupt handler memory: tegra: Extract setup code into callback memory: tegra: Make per-SoC setup more generic memory: tegra: Push suspend/resume into SoC drivers memory: tegra: Introduce struct tegra_mc_ops memory: tegra: Unify struct tegra_mc across SoC generations memory: tegra: Consolidate register fields memory: tegra30-emc: Use devm_tegra_core_dev_init_opp_table() ... Link: https://lore.kernel.org/r/20210614195200.21657-1-krzysztof.kozlowski@canonical.com Signed-off-by: Olof Johansson <olof@lixom.net>
2021-06-12Merge tag 'memory-controller-drv-pl353-5.14' of ↵Olof Johansson1-304/+10
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers Memory controller drivers for v5.14 - PL353 Bigger work around ARM Primecell PL35x SMC memory controller driver by Miquel Raynal built on previous series from Naga Sureshkumar Relli. This includes bindings cleanup and correction, converting these to dtschema and several cleanyps in pl353-smc driver. * tag 'memory-controller-drv-pl353-5.14' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: dt-binding: memory: pl353-smc: Convert to yaml MAINTAINERS: Add PL353 SMC entry memory: pl353-smc: Declare variables following a reverse christmas tree order memory: pl353-smc: Avoid useless acronyms in descriptions memory: pl353-smc: Let lower level controller drivers handle inits memory: pl353-smc: Rename goto labels memory: pl353-smc: Fix style dt-binding: memory: pl353-smc: Fix the NAND controller node in the example dt-binding: memory: pl353-smc: Drop unsupported nodes from the example dt-binding: memory: pl353-smc: Fix the example syntax and style dt-binding: memory: pl353-smc: Describe the child reg property dt-binding: memory: pl353-smc: Drop the partitioning section dt-binding: memory: pl353-smc: Document the range property dt-binding: memory: pl353-smc: Rephrase the binding Link: https://lore.kernel.org/r/20210611140659.61980-2-krzysztof.kozlowski@canonical.com Signed-off-by: Olof Johansson <olof@lixom.net>
2021-06-10memory: pl353-smc: Declare variables following a reverse christmas tree orderMiquel Raynal1-3/+3
This is a purely cosmetic change. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20210610082040.2075611-15-miquel.raynal@bootlin.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-10memory: pl353-smc: Avoid useless acronyms in descriptionsMiquel Raynal1-1/+1
APER does not mean anything, while it seems legitimate to call this clock the AXI peripheral clock. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20210610082040.2075611-14-miquel.raynal@bootlin.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-10memory: pl353-smc: Let lower level controller drivers handle initsMiquel Raynal1-294/+0
There is no point in having all these definitions at the SMC bus level, these are extremely tight to the NAND controller driver implementation, are not particularly generic, imply more boilerplate than needed, do not really follow the device model by receiving no argument and some of them are actually buggy. Let's get rid of these right now as there is no current user and keep this driver at a simple level: only the SMC bare initializations. The NAND controller driver which I am going to introduce will take care of redefining properly all these helpers and using them directly. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20210610082040.2075611-13-miquel.raynal@bootlin.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-10memory: pl353-smc: Rename goto labelsMiquel Raynal1-4/+4
A goto label is better named do_something: than out_something_to_do: Use the former wording and really describe what the jump involves. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20210610082040.2075611-12-miquel.raynal@bootlin.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-10memory: pl353-smc: Fix styleMiquel Raynal1-2/+2
Use proper spacing. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20210610082040.2075611-11-miquel.raynal@bootlin.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-10memory: emif: remove unused frequency and voltage notifiersKrzysztof Kozlowski1-678/+0
The driver defined several functions related to handling of frequency and voltage changes: - freq_post_notify_handling - freq_pre_notify_handling - volt_notify_handling All these are static, not used inside or outside of driver, and marked as unused with comment: "TODO: voltage notify handling should be hooked up to regulator framework as soon as the necessary support is available in mainline kernel. This function is un-used right now.". These have been added with commit a93de288aad3 ("memory: emif: handle frequency and voltage change events") in 2012 and are unused since then. Additionally mentioned regulator and clock hooking did not happen since then. If it did not happen for nine years, let's assume it will not happen suddenly now. Remove all unused functions which also allows removal of "t_ck" static variable "t_ck" and "addressing" member of private structure. No functionality is lost. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20210527154101.80556-1-krzysztof.kozlowski@canonical.com
2021-06-10memory: fsl_ifc: fix leak of private memory on probe failureKrzysztof Kozlowski1-2/+2
On probe error the driver should free the memory allocated for private structure. Fix this by using resource-managed allocation. Fixes: a20cbdeffce2 ("powerpc/fsl: Add support for Integrated Flash Controller") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20210527154322.81253-2-krzysztof.kozlowski@canonical.com
2021-06-10memory: fsl_ifc: fix leak of IO mapping on probe failureKrzysztof Kozlowski1-2/+2
On probe error the driver should unmap the IO memory. Smatch reports: drivers/memory/fsl_ifc.c:298 fsl_ifc_ctrl_probe() warn: 'fsl_ifc_ctrl_dev->gregs' not released on lines: 298. Fixes: a20cbdeffce2 ("powerpc/fsl: Add support for Integrated Flash Controller") Reported-by: kernel test robot <lkp@intel.com> Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20210527154322.81253-1-krzysztof.kozlowski@canonical.com
2021-06-10memory: tegra: Delete dead debugfs checking codeDan Carpenter4-16/+0
The debugfs_create_dir() function does not return NULL, it returns error pointers. But in normal situations like this where the caller is not dereferencing "emc->debugfs.root" then we are not supposed to check the return. So instead of fixing these checks, we should delete them. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Link: https://lore.kernel.org/r/YMCQDTSyG8UuQoh0@mwanda Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-03memory: tegra: Implement SID override programmingThierry Reding2-0/+81
Instead of programming all SID overrides during early boot, perform the operation on-demand after the SMMU translations have been set up for a device. This reuses data from device tree to match memory clients for a device and programs the SID specified in device tree, which corresponds to the SID used for the SMMU context banks for the device. Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20210603164632.1000458-2-thierry.reding@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-03memory: tegra: Split Tegra194 data into separate fileThierry Reding4-1349/+1358
Keep the directory structure consistent by splitting the Tegra194 data into a separate file. Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20210602163302.120041-13-thierry.reding@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-03memory: tegra: Add memory client IDs to tablesThierry Reding1-0/+205
The memory client IDs will subsequently be used to program override SIDs for the given clients depending on the device tree configuration. Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20210602163302.120041-12-thierry.reding@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
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